| 1 | /* SPDX-License-Identifier: GPL-2.0 */ | 
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| 2 | #ifndef _ASM_X86_HWEIGHT_H | 
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| 3 | #define _ASM_X86_HWEIGHT_H | 
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| 4 |  | 
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| 5 | #include <asm/cpufeatures.h> | 
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| 6 |  | 
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| 7 | #ifdef CONFIG_64BIT | 
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| 8 | #define REG_IN "D" | 
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| 9 | #define REG_OUT "a" | 
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| 10 | #else | 
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| 11 | #define REG_IN "a" | 
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| 12 | #define REG_OUT "a" | 
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| 13 | #endif | 
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| 14 |  | 
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| 15 | static __always_inline unsigned int __arch_hweight32(unsigned int w) | 
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| 16 | { | 
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| 17 | unsigned int res; | 
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| 18 |  | 
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| 19 | asm_inline (ALTERNATIVE( "call __sw_hweight32", | 
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| 20 | "popcntl %[val], %[cnt]", X86_FEATURE_POPCNT) | 
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| 21 | : [cnt] "="REG_OUT (res), ASM_CALL_CONSTRAINT | 
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| 22 | : [val] REG_IN (w)); | 
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| 23 |  | 
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| 24 | return res; | 
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| 25 | } | 
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| 26 |  | 
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| 27 | static inline unsigned int __arch_hweight16(unsigned int w) | 
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| 28 | { | 
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| 29 | return __arch_hweight32(w: w & 0xffff); | 
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| 30 | } | 
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| 31 |  | 
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| 32 | static inline unsigned int __arch_hweight8(unsigned int w) | 
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| 33 | { | 
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| 34 | return __arch_hweight32(w: w & 0xff); | 
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| 35 | } | 
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| 36 |  | 
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| 37 | #ifdef CONFIG_X86_32 | 
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| 38 | static inline unsigned long __arch_hweight64(__u64 w) | 
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| 39 | { | 
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| 40 | return  __arch_hweight32((u32)w) + | 
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| 41 | __arch_hweight32((u32)(w >> 32)); | 
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| 42 | } | 
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| 43 | #else | 
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| 44 | static __always_inline unsigned long __arch_hweight64(__u64 w) | 
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| 45 | { | 
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| 46 | unsigned long res; | 
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| 47 |  | 
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| 48 | asm_inline (ALTERNATIVE( "call __sw_hweight64", | 
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| 49 | "popcntq %[val], %[cnt]", X86_FEATURE_POPCNT) | 
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| 50 | : [cnt] "="REG_OUT (res), ASM_CALL_CONSTRAINT | 
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| 51 | : [val] REG_IN (w)); | 
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| 52 |  | 
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| 53 | return res; | 
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| 54 | } | 
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| 55 | #endif /* CONFIG_X86_32 */ | 
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| 56 |  | 
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| 57 | #endif | 
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| 58 |  | 
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