| 1 | /* SPDX-License-Identifier: GPL-2.0 */ | 
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| 2 | #ifndef _ASM_X86_HARDIRQ_H | 
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| 3 | #define _ASM_X86_HARDIRQ_H | 
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| 4 |  | 
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| 5 | #include <linux/threads.h> | 
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| 6 |  | 
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| 7 | typedef struct { | 
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| 8 | #if IS_ENABLED(CONFIG_KVM_INTEL) | 
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| 9 | u8	     kvm_cpu_l1tf_flush_l1d; | 
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| 10 | #endif | 
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| 11 | unsigned int __nmi_count;	/* arch dependent */ | 
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| 12 | #ifdef CONFIG_X86_LOCAL_APIC | 
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| 13 | unsigned int apic_timer_irqs;	/* arch dependent */ | 
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| 14 | unsigned int irq_spurious_count; | 
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| 15 | unsigned int icr_read_retry_count; | 
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| 16 | #endif | 
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| 17 | #if IS_ENABLED(CONFIG_KVM) | 
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| 18 | unsigned int kvm_posted_intr_ipis; | 
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| 19 | unsigned int kvm_posted_intr_wakeup_ipis; | 
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| 20 | unsigned int kvm_posted_intr_nested_ipis; | 
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| 21 | #endif | 
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| 22 | unsigned int x86_platform_ipis;	/* arch dependent */ | 
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| 23 | unsigned int apic_perf_irqs; | 
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| 24 | unsigned int apic_irq_work_irqs; | 
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| 25 | #ifdef CONFIG_SMP | 
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| 26 | unsigned int irq_resched_count; | 
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| 27 | unsigned int irq_call_count; | 
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| 28 | #endif | 
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| 29 | unsigned int irq_tlb_count; | 
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| 30 | #ifdef CONFIG_X86_THERMAL_VECTOR | 
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| 31 | unsigned int irq_thermal_count; | 
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| 32 | #endif | 
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| 33 | #ifdef CONFIG_X86_MCE_THRESHOLD | 
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| 34 | unsigned int irq_threshold_count; | 
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| 35 | #endif | 
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| 36 | #ifdef CONFIG_X86_MCE_AMD | 
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| 37 | unsigned int irq_deferred_error_count; | 
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| 38 | #endif | 
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| 39 | #ifdef CONFIG_X86_HV_CALLBACK_VECTOR | 
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| 40 | unsigned int irq_hv_callback_count; | 
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| 41 | #endif | 
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| 42 | #if IS_ENABLED(CONFIG_HYPERV) | 
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| 43 | unsigned int irq_hv_reenlightenment_count; | 
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| 44 | unsigned int hyperv_stimer0_count; | 
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| 45 | #endif | 
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| 46 | #ifdef CONFIG_X86_POSTED_MSI | 
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| 47 | unsigned int posted_msi_notification_count; | 
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| 48 | #endif | 
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| 49 | } ____cacheline_aligned irq_cpustat_t; | 
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| 50 |  | 
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| 51 | DECLARE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat); | 
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| 52 |  | 
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| 53 | #ifdef CONFIG_X86_POSTED_MSI | 
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| 54 | DECLARE_PER_CPU_ALIGNED(struct pi_desc, posted_msi_pi_desc); | 
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| 55 | #endif | 
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| 56 | #define __ARCH_IRQ_STAT | 
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| 57 |  | 
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| 58 | #define inc_irq_stat(member)	this_cpu_inc(irq_stat.member) | 
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| 59 |  | 
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| 60 | extern void ack_bad_irq(unsigned int irq); | 
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| 61 |  | 
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| 62 | extern u64 arch_irq_stat_cpu(unsigned int cpu); | 
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| 63 | #define arch_irq_stat_cpu	arch_irq_stat_cpu | 
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| 64 |  | 
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| 65 | extern u64 arch_irq_stat(void); | 
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| 66 | #define arch_irq_stat		arch_irq_stat | 
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| 67 |  | 
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| 68 | DECLARE_PER_CPU_CACHE_HOT(u16, __softirq_pending); | 
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| 69 | #define local_softirq_pending_ref       __softirq_pending | 
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| 70 |  | 
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| 71 | #if IS_ENABLED(CONFIG_KVM_INTEL) | 
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| 72 | /* | 
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| 73 | * This function is called from noinstr interrupt contexts | 
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| 74 | * and must be inlined to not get instrumentation. | 
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| 75 | */ | 
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| 76 | static __always_inline void kvm_set_cpu_l1tf_flush_l1d(void) | 
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| 77 | { | 
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| 78 | __this_cpu_write(irq_stat.kvm_cpu_l1tf_flush_l1d, 1); | 
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| 79 | } | 
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| 80 |  | 
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| 81 | static __always_inline void kvm_clear_cpu_l1tf_flush_l1d(void) | 
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| 82 | { | 
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| 83 | __this_cpu_write(irq_stat.kvm_cpu_l1tf_flush_l1d, 0); | 
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| 84 | } | 
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| 85 |  | 
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| 86 | static __always_inline bool kvm_get_cpu_l1tf_flush_l1d(void) | 
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| 87 | { | 
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| 88 | return __this_cpu_read(irq_stat.kvm_cpu_l1tf_flush_l1d); | 
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| 89 | } | 
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| 90 | #else /* !IS_ENABLED(CONFIG_KVM_INTEL) */ | 
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| 91 | static __always_inline void kvm_set_cpu_l1tf_flush_l1d(void) { } | 
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| 92 | #endif /* IS_ENABLED(CONFIG_KVM_INTEL) */ | 
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| 93 |  | 
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| 94 | #endif /* _ASM_X86_HARDIRQ_H */ | 
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| 95 |  | 
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