1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_X86_INTEL_FAMILY_H
3#define _ASM_X86_INTEL_FAMILY_H
4
5/*
6 * "Big Core" Processors (Branded as Core, Xeon, etc...)
7 *
8 * While adding a new CPUID for a new microarchitecture, add a new
9 * group to keep logically sorted out in chronological order. Within
10 * that group keep the CPUID for the variants sorted by model number.
11 *
12 * The defined symbol names have the following form:
13 * INTEL_{OPTFAMILY}_{MICROARCH}{OPTDIFF}
14 * where:
15 * OPTFAMILY Describes the family of CPUs that this belongs to. Default
16 * is assumed to be "_CORE" (and should be omitted). Other values
17 * currently in use are _ATOM and _XEON_PHI
18 * MICROARCH Is the code name for the micro-architecture for this core.
19 * N.B. Not the platform name.
20 * OPTDIFF If needed, a short string to differentiate by market segment.
21 *
22 * Common OPTDIFFs:
23 *
24 * - regular client parts
25 * _L - regular mobile parts
26 * _G - parts with extra graphics on
27 * _X - regular server parts
28 * _D - micro server parts
29 * _N,_P - other mobile parts
30 * _H - premium mobile parts
31 * _S - other client parts
32 *
33 * Historical OPTDIFFs:
34 *
35 * _EP - 2 socket server parts
36 * _EX - 4+ socket server parts
37 *
38 * The #define line may optionally include a comment including platform or core
39 * names. An exception is made for skylake/kabylake where steppings seem to have gotten
40 * their own names :-(
41 */
42
43#define IFM(_fam, _model) VFM_MAKE(X86_VENDOR_INTEL, _fam, _model)
44
45/* Wildcard match so X86_MATCH_VFM(ANY) works */
46#define INTEL_ANY IFM(X86_FAMILY_ANY, X86_MODEL_ANY)
47
48/* Family 5 */
49#define INTEL_FAM5_START IFM(5, 0x00) /* Notational marker, also P5 A-step */
50#define INTEL_PENTIUM_75 IFM(5, 0x02) /* P54C */
51#define INTEL_PENTIUM_MMX IFM(5, 0x04) /* P55C */
52#define INTEL_QUARK_X1000 IFM(5, 0x09) /* Quark X1000 SoC */
53
54/* Family 6, 18, 19 */
55#define INTEL_PENTIUM_PRO IFM(6, 0x01)
56#define INTEL_PENTIUM_II_KLAMATH IFM(6, 0x03)
57#define INTEL_PENTIUM_III_DESCHUTES IFM(6, 0x05)
58#define INTEL_PENTIUM_III_TUALATIN IFM(6, 0x0B)
59#define INTEL_PENTIUM_M_DOTHAN IFM(6, 0x0D)
60
61#define INTEL_CORE_YONAH IFM(6, 0x0E)
62
63#define INTEL_CORE2_MEROM IFM(6, 0x0F)
64#define INTEL_CORE2_MEROM_L IFM(6, 0x16)
65#define INTEL_CORE2_PENRYN IFM(6, 0x17)
66#define INTEL_CORE2_DUNNINGTON IFM(6, 0x1D)
67
68#define INTEL_NEHALEM IFM(6, 0x1E)
69#define INTEL_NEHALEM_G IFM(6, 0x1F) /* Auburndale / Havendale */
70#define INTEL_NEHALEM_EP IFM(6, 0x1A)
71#define INTEL_NEHALEM_EX IFM(6, 0x2E)
72
73#define INTEL_WESTMERE IFM(6, 0x25)
74#define INTEL_WESTMERE_EP IFM(6, 0x2C)
75#define INTEL_WESTMERE_EX IFM(6, 0x2F)
76
77#define INTEL_SANDYBRIDGE IFM(6, 0x2A)
78#define INTEL_SANDYBRIDGE_X IFM(6, 0x2D)
79#define INTEL_IVYBRIDGE IFM(6, 0x3A)
80#define INTEL_IVYBRIDGE_X IFM(6, 0x3E)
81
82#define INTEL_HASWELL IFM(6, 0x3C)
83#define INTEL_HASWELL_X IFM(6, 0x3F)
84#define INTEL_HASWELL_L IFM(6, 0x45)
85#define INTEL_HASWELL_G IFM(6, 0x46)
86
87#define INTEL_BROADWELL IFM(6, 0x3D)
88#define INTEL_BROADWELL_G IFM(6, 0x47)
89#define INTEL_BROADWELL_X IFM(6, 0x4F)
90#define INTEL_BROADWELL_D IFM(6, 0x56)
91
92#define INTEL_SKYLAKE_L IFM(6, 0x4E) /* Sky Lake */
93#define INTEL_SKYLAKE IFM(6, 0x5E) /* Sky Lake */
94#define INTEL_SKYLAKE_X IFM(6, 0x55) /* Sky Lake */
95/* CASCADELAKE_X 0x55 Sky Lake -- s: 7 */
96/* COOPERLAKE_X 0x55 Sky Lake -- s: 11 */
97
98#define INTEL_KABYLAKE_L IFM(6, 0x8E) /* Sky Lake */
99/* AMBERLAKE_L 0x8E Sky Lake -- s: 9 */
100/* COFFEELAKE_L 0x8E Sky Lake -- s: 10 */
101/* WHISKEYLAKE_L 0x8E Sky Lake -- s: 11,12 */
102
103#define INTEL_KABYLAKE IFM(6, 0x9E) /* Sky Lake */
104/* COFFEELAKE 0x9E Sky Lake -- s: 10-13 */
105
106#define INTEL_COMETLAKE IFM(6, 0xA5) /* Sky Lake */
107#define INTEL_COMETLAKE_L IFM(6, 0xA6) /* Sky Lake */
108
109#define INTEL_CANNONLAKE_L IFM(6, 0x66) /* Palm Cove */
110
111#define INTEL_ICELAKE_X IFM(6, 0x6A) /* Sunny Cove */
112#define INTEL_ICELAKE_D IFM(6, 0x6C) /* Sunny Cove */
113#define INTEL_ICELAKE IFM(6, 0x7D) /* Sunny Cove */
114#define INTEL_ICELAKE_L IFM(6, 0x7E) /* Sunny Cove */
115#define INTEL_ICELAKE_NNPI IFM(6, 0x9D) /* Sunny Cove */
116
117#define INTEL_ROCKETLAKE IFM(6, 0xA7) /* Cypress Cove */
118
119#define INTEL_TIGERLAKE_L IFM(6, 0x8C) /* Willow Cove */
120#define INTEL_TIGERLAKE IFM(6, 0x8D) /* Willow Cove */
121
122#define INTEL_SAPPHIRERAPIDS_X IFM(6, 0x8F) /* Golden Cove */
123
124#define INTEL_EMERALDRAPIDS_X IFM(6, 0xCF) /* Raptor Cove */
125
126#define INTEL_GRANITERAPIDS_X IFM(6, 0xAD) /* Redwood Cove */
127#define INTEL_GRANITERAPIDS_D IFM(6, 0xAE)
128
129#define INTEL_DIAMONDRAPIDS_X IFM(19, 0x01) /* Panther Cove */
130
131#define INTEL_BARTLETTLAKE IFM(6, 0xD7) /* Raptor Cove */
132
133/* "Hybrid" Processors (P-Core/E-Core) */
134
135#define INTEL_LAKEFIELD IFM(6, 0x8A) /* Sunny Cove / Tremont */
136
137#define INTEL_ALDERLAKE IFM(6, 0x97) /* Golden Cove / Gracemont */
138#define INTEL_ALDERLAKE_L IFM(6, 0x9A) /* Golden Cove / Gracemont */
139
140#define INTEL_RAPTORLAKE IFM(6, 0xB7) /* Raptor Cove / Enhanced Gracemont */
141#define INTEL_RAPTORLAKE_P IFM(6, 0xBA)
142#define INTEL_RAPTORLAKE_S IFM(6, 0xBF)
143
144#define INTEL_METEORLAKE IFM(6, 0xAC) /* Redwood Cove / Crestmont */
145#define INTEL_METEORLAKE_L IFM(6, 0xAA)
146
147#define INTEL_ARROWLAKE_H IFM(6, 0xC5) /* Lion Cove / Skymont */
148#define INTEL_ARROWLAKE IFM(6, 0xC6)
149#define INTEL_ARROWLAKE_U IFM(6, 0xB5)
150
151#define INTEL_LUNARLAKE_M IFM(6, 0xBD) /* Lion Cove / Skymont */
152
153#define INTEL_PANTHERLAKE_L IFM(6, 0xCC) /* Cougar Cove / Crestmont */
154
155#define INTEL_WILDCATLAKE_L IFM(6, 0xD5)
156
157#define INTEL_NOVALAKE IFM(18, 0x01)
158#define INTEL_NOVALAKE_L IFM(18, 0x03)
159
160/* "Small Core" Processors (Atom/E-Core) */
161
162#define INTEL_ATOM_BONNELL IFM(6, 0x1C) /* Diamondville, Pineview */
163#define INTEL_ATOM_BONNELL_MID IFM(6, 0x26) /* Silverthorne, Lincroft */
164
165#define INTEL_ATOM_SALTWELL IFM(6, 0x36) /* Cedarview */
166#define INTEL_ATOM_SALTWELL_MID IFM(6, 0x27) /* Penwell */
167#define INTEL_ATOM_SALTWELL_TABLET IFM(6, 0x35) /* Cloverview */
168
169#define INTEL_ATOM_SILVERMONT IFM(6, 0x37) /* Bay Trail, Valleyview */
170#define INTEL_ATOM_SILVERMONT_D IFM(6, 0x4D) /* Avaton, Rangely */
171#define INTEL_ATOM_SILVERMONT_MID IFM(6, 0x4A) /* Merriefield */
172#define INTEL_ATOM_SILVERMONT_MID2 IFM(6, 0x5A) /* Anniedale */
173
174#define INTEL_ATOM_AIRMONT IFM(6, 0x4C) /* Cherry Trail, Braswell */
175#define INTEL_ATOM_AIRMONT_NP IFM(6, 0x75) /* Lightning Mountain */
176
177#define INTEL_ATOM_GOLDMONT IFM(6, 0x5C) /* Apollo Lake */
178#define INTEL_ATOM_GOLDMONT_D IFM(6, 0x5F) /* Denverton */
179
180/* Note: the micro-architecture is "Goldmont Plus" */
181#define INTEL_ATOM_GOLDMONT_PLUS IFM(6, 0x7A) /* Gemini Lake */
182
183#define INTEL_ATOM_TREMONT_D IFM(6, 0x86) /* Jacobsville */
184#define INTEL_ATOM_TREMONT IFM(6, 0x96) /* Elkhart Lake */
185#define INTEL_ATOM_TREMONT_L IFM(6, 0x9C) /* Jasper Lake */
186
187#define INTEL_ATOM_GRACEMONT IFM(6, 0xBE) /* Alderlake N */
188
189#define INTEL_ATOM_CRESTMONT_X IFM(6, 0xAF) /* Sierra Forest */
190#define INTEL_ATOM_CRESTMONT IFM(6, 0xB6) /* Grand Ridge */
191
192#define INTEL_ATOM_DARKMONT_X IFM(6, 0xDD) /* Clearwater Forest */
193
194/* Xeon Phi */
195
196#define INTEL_XEON_PHI_KNL IFM(6, 0x57) /* Knights Landing */
197#define INTEL_XEON_PHI_KNM IFM(6, 0x85) /* Knights Mill */
198
199/* Notational marker denoting the last Family 6 model */
200#define INTEL_FAM6_LAST IFM(6, 0xFF)
201
202/* Family 15 - NetBurst */
203#define INTEL_P4_WILLAMETTE IFM(15, 0x01) /* Also Xeon Foster */
204#define INTEL_P4_PRESCOTT IFM(15, 0x03)
205#define INTEL_P4_PRESCOTT_2M IFM(15, 0x04)
206#define INTEL_P4_CEDARMILL IFM(15, 0x06) /* Also Xeon Dempsey */
207
208/*
209 * Intel CPU core types
210 *
211 * CPUID.1AH.EAX[31:0] uniquely identifies the microarchitecture
212 * of the core. Bits 31-24 indicates its core type (Core or Atom)
213 * and Bits [23:0] indicates the native model ID of the core.
214 * Core type and native model ID are defined in below enumerations.
215 */
216enum intel_cpu_type {
217 INTEL_CPU_TYPE_UNKNOWN,
218 INTEL_CPU_TYPE_ATOM = 0x20,
219 INTEL_CPU_TYPE_CORE = 0x40,
220};
221
222enum intel_native_id {
223 INTEL_ATOM_CMT_NATIVE_ID = 0x2, /* Crestmont */
224 INTEL_ATOM_SKT_NATIVE_ID = 0x3, /* Skymont */
225};
226
227#endif /* _ASM_X86_INTEL_FAMILY_H */
228