1#ifndef _ASM_INTEL_DS_H
2#define _ASM_INTEL_DS_H
3
4#include <linux/percpu-defs.h>
5
6#define BTS_BUFFER_SIZE (PAGE_SIZE << 4)
7#define PEBS_BUFFER_SIZE (PAGE_SIZE << 4)
8
9/* The maximal number of PEBS events: */
10#define MAX_PEBS_EVENTS_FMT4 8
11#define MAX_PEBS_EVENTS 32
12#define MAX_PEBS_EVENTS_MASK GENMASK_ULL(MAX_PEBS_EVENTS - 1, 0)
13#define MAX_FIXED_PEBS_EVENTS 16
14
15/*
16 * A debug store configuration.
17 *
18 * We only support architectures that use 64bit fields.
19 */
20struct debug_store {
21 u64 bts_buffer_base;
22 u64 bts_index;
23 u64 bts_absolute_maximum;
24 u64 bts_interrupt_threshold;
25 u64 pebs_buffer_base;
26 u64 pebs_index;
27 u64 pebs_absolute_maximum;
28 u64 pebs_interrupt_threshold;
29 u64 pebs_event_reset[MAX_PEBS_EVENTS + MAX_FIXED_PEBS_EVENTS];
30} __aligned(PAGE_SIZE);
31
32DECLARE_PER_CPU_PAGE_ALIGNED(struct debug_store, cpu_debug_store);
33
34struct debug_store_buffers {
35 char bts_buffer[BTS_BUFFER_SIZE];
36 char pebs_buffer[PEBS_BUFFER_SIZE];
37};
38
39#endif
40