| 1 | /* SPDX-License-Identifier: GPL-2.0 */ | 
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| 2 | /* | 
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| 3 | * Machine dependent access functions for RTC registers. | 
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| 4 | */ | 
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| 5 | #ifndef _ASM_X86_MC146818RTC_H | 
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| 6 | #define _ASM_X86_MC146818RTC_H | 
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| 7 |  | 
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| 8 | #include <asm/io.h> | 
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| 9 | #include <asm/processor.h> | 
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| 10 |  | 
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| 11 | #ifndef RTC_PORT | 
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| 12 | #define RTC_PORT(x)	(0x70 + (x)) | 
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| 13 | #define RTC_ALWAYS_BCD	1	/* RTC operates in binary mode */ | 
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| 14 | #endif | 
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| 15 |  | 
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| 16 | #if defined(CONFIG_X86_32) | 
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| 17 | /* | 
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| 18 | * This lock provides nmi access to the CMOS/RTC registers.  It has some | 
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| 19 | * special properties.  It is owned by a CPU and stores the index register | 
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| 20 | * currently being accessed (if owned).  The idea here is that it works | 
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| 21 | * like a normal lock (normally).  However, in an NMI, the NMI code will | 
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| 22 | * first check to see if its CPU owns the lock, meaning that the NMI | 
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| 23 | * interrupted during the read/write of the device.  If it does, it goes ahead | 
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| 24 | * and performs the access and then restores the index register.  If it does | 
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| 25 | * not, it locks normally. | 
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| 26 | * | 
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| 27 | * Note that since we are working with NMIs, we need this lock even in | 
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| 28 | * a non-SMP machine just to mark that the lock is owned. | 
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| 29 | * | 
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| 30 | * This only works with compare-and-swap.  There is no other way to | 
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| 31 | * atomically claim the lock and set the owner. | 
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| 32 | */ | 
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| 33 | #include <linux/smp.h> | 
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| 34 | extern volatile unsigned long cmos_lock; | 
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| 35 |  | 
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| 36 | /* | 
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| 37 | * All of these below must be called with interrupts off, preempt | 
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| 38 | * disabled, etc. | 
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| 39 | */ | 
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| 40 |  | 
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| 41 | static inline void lock_cmos(unsigned char reg) | 
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| 42 | { | 
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| 43 | unsigned long new; | 
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| 44 | new = ((smp_processor_id() + 1) << 8) | reg; | 
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| 45 | for (;;) { | 
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| 46 | if (cmos_lock) { | 
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| 47 | cpu_relax(); | 
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| 48 | continue; | 
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| 49 | } | 
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| 50 | if (__cmpxchg(&cmos_lock, 0, new, sizeof(cmos_lock)) == 0) | 
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| 51 | return; | 
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| 52 | } | 
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| 53 | } | 
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| 54 |  | 
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| 55 | static inline void unlock_cmos(void) | 
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| 56 | { | 
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| 57 | cmos_lock = 0; | 
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| 58 | } | 
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| 59 |  | 
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| 60 | static inline int do_i_have_lock_cmos(void) | 
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| 61 | { | 
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| 62 | return (cmos_lock >> 8) == (smp_processor_id() + 1); | 
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| 63 | } | 
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| 64 |  | 
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| 65 | static inline unsigned char current_lock_cmos_reg(void) | 
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| 66 | { | 
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| 67 | return cmos_lock & 0xff; | 
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| 68 | } | 
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| 69 |  | 
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| 70 | #define lock_cmos_prefix(reg)			\ | 
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| 71 | do {					\ | 
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| 72 | unsigned long cmos_flags;	\ | 
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| 73 | local_irq_save(cmos_flags);	\ | 
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| 74 | lock_cmos(reg) | 
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| 75 |  | 
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| 76 | #define lock_cmos_suffix(reg)			\ | 
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| 77 | unlock_cmos();				\ | 
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| 78 | local_irq_restore(cmos_flags);		\ | 
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| 79 | } while (0) | 
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| 80 | #else | 
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| 81 | #define lock_cmos_prefix(reg) do {} while (0) | 
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| 82 | #define lock_cmos_suffix(reg) do {} while (0) | 
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| 83 | #define lock_cmos(reg) do { } while (0) | 
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| 84 | #define unlock_cmos() do { } while (0) | 
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| 85 | #define do_i_have_lock_cmos() 0 | 
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| 86 | #define current_lock_cmos_reg() 0 | 
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| 87 | #endif | 
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| 88 |  | 
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| 89 | /* | 
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| 90 | * The yet supported machines all access the RTC index register via | 
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| 91 | * an ISA port access but the way to access the date register differs ... | 
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| 92 | */ | 
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| 93 | #define CMOS_READ(addr) rtc_cmos_read(addr) | 
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| 94 | #define CMOS_WRITE(val, addr) rtc_cmos_write(val, addr) | 
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| 95 | unsigned char rtc_cmos_read(unsigned char addr); | 
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| 96 | void rtc_cmos_write(unsigned char val, unsigned char addr); | 
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| 97 |  | 
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| 98 | extern int mach_set_cmos_time(const struct timespec64 *now); | 
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| 99 | extern void mach_get_cmos_time(struct timespec64 *now); | 
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| 100 |  | 
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| 101 | #define RTC_IRQ 8 | 
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| 102 |  | 
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| 103 | #endif /* _ASM_X86_MC146818RTC_H */ | 
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| 104 |  | 
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