1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_X86_MSI_H
3#define _ASM_X86_MSI_H
4#include <asm/hw_irq.h>
5#include <asm/irqdomain.h>
6
7typedef struct irq_alloc_info msi_alloc_info_t;
8
9int pci_msi_prepare(struct irq_domain *domain, struct device *dev, int nvec,
10 msi_alloc_info_t *arg);
11
12/* Structs and defines for the X86 specific MSI message format */
13
14typedef struct x86_msi_data {
15 union {
16 struct {
17 u32 vector : 8,
18 delivery_mode : 3,
19 dest_mode_logical : 1,
20 reserved : 2,
21 active_low : 1,
22 is_level : 1;
23 };
24 u32 dmar_subhandle;
25 };
26} __attribute__ ((packed)) arch_msi_msg_data_t;
27#define arch_msi_msg_data x86_msi_data
28
29typedef struct x86_msi_addr_lo {
30 union {
31 struct {
32 u32 reserved_0 : 2,
33 dest_mode_logical : 1,
34 redirect_hint : 1,
35 reserved_1 : 1,
36 virt_destid_8_14 : 7,
37 destid_0_7 : 8,
38 base_address : 12;
39 };
40 struct {
41 u32 dmar_reserved_0 : 2,
42 dmar_index_15 : 1,
43 dmar_subhandle_valid : 1,
44 dmar_format : 1,
45 dmar_index_0_14 : 15,
46 dmar_base_address : 12;
47 };
48 };
49} __attribute__ ((packed)) arch_msi_msg_addr_lo_t;
50#define arch_msi_msg_addr_lo x86_msi_addr_lo
51
52#define X86_MSI_BASE_ADDRESS_LOW (0xfee00000 >> 20)
53
54typedef struct x86_msi_addr_hi {
55 u32 reserved : 8,
56 destid_8_31 : 24;
57} __attribute__ ((packed)) arch_msi_msg_addr_hi_t;
58#define arch_msi_msg_addr_hi x86_msi_addr_hi
59
60#define X86_MSI_BASE_ADDRESS_HIGH (0)
61
62struct msi_msg;
63u32 x86_msi_msg_get_destid(struct msi_msg *msg, bool extid);
64
65#define X86_VECTOR_MSI_FLAGS_SUPPORTED \
66 (MSI_GENERIC_FLAGS_MASK | MSI_FLAG_PCI_MSIX | MSI_FLAG_PCI_MSIX_ALLOC_DYN)
67
68#define X86_VECTOR_MSI_FLAGS_REQUIRED \
69 (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS)
70
71#endif /* _ASM_X86_MSI_H */
72