1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2#ifndef _ASM_X86_KVM_H
3#define _ASM_X86_KVM_H
4
5/*
6 * KVM x86 specific structures and definitions
7 *
8 */
9
10#include <linux/const.h>
11#include <linux/bits.h>
12#include <linux/types.h>
13#include <linux/ioctl.h>
14#include <linux/stddef.h>
15
16#define KVM_PIO_PAGE_OFFSET 1
17#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
18#define KVM_DIRTY_LOG_PAGE_OFFSET 64
19
20#define DE_VECTOR 0
21#define DB_VECTOR 1
22#define BP_VECTOR 3
23#define OF_VECTOR 4
24#define BR_VECTOR 5
25#define UD_VECTOR 6
26#define NM_VECTOR 7
27#define DF_VECTOR 8
28#define TS_VECTOR 10
29#define NP_VECTOR 11
30#define SS_VECTOR 12
31#define GP_VECTOR 13
32#define PF_VECTOR 14
33#define MF_VECTOR 16
34#define AC_VECTOR 17
35#define MC_VECTOR 18
36#define XM_VECTOR 19
37#define VE_VECTOR 20
38#define CP_VECTOR 21
39
40#define HV_VECTOR 28
41#define VC_VECTOR 29
42#define SX_VECTOR 30
43
44/* Select x86 specific features in <linux/kvm.h> */
45#define __KVM_HAVE_PIT
46#define __KVM_HAVE_IOAPIC
47#define __KVM_HAVE_IRQ_LINE
48#define __KVM_HAVE_MSI
49#define __KVM_HAVE_USER_NMI
50#define __KVM_HAVE_MSIX
51#define __KVM_HAVE_MCE
52#define __KVM_HAVE_PIT_STATE2
53#define __KVM_HAVE_XEN_HVM
54#define __KVM_HAVE_VCPU_EVENTS
55#define __KVM_HAVE_DEBUGREGS
56#define __KVM_HAVE_XSAVE
57#define __KVM_HAVE_XCRS
58
59/* Architectural interrupt line count. */
60#define KVM_NR_INTERRUPTS 256
61
62/* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
63struct kvm_pic_state {
64 __u8 last_irr; /* edge detection */
65 __u8 irr; /* interrupt request register */
66 __u8 imr; /* interrupt mask register */
67 __u8 isr; /* interrupt service register */
68 __u8 priority_add; /* highest irq priority */
69 __u8 irq_base;
70 __u8 read_reg_select;
71 __u8 poll;
72 __u8 special_mask;
73 __u8 init_state;
74 __u8 auto_eoi;
75 __u8 rotate_on_auto_eoi;
76 __u8 special_fully_nested_mode;
77 __u8 init4; /* true if 4 byte init */
78 __u8 elcr; /* PIIX edge/trigger selection */
79 __u8 elcr_mask;
80};
81
82#define KVM_IOAPIC_NUM_PINS 24
83struct kvm_ioapic_state {
84 __u64 base_address;
85 __u32 ioregsel;
86 __u32 id;
87 __u32 irr;
88 __u32 pad;
89 union {
90 __u64 bits;
91 struct {
92 __u8 vector;
93 __u8 delivery_mode:3;
94 __u8 dest_mode:1;
95 __u8 delivery_status:1;
96 __u8 polarity:1;
97 __u8 remote_irr:1;
98 __u8 trig_mode:1;
99 __u8 mask:1;
100 __u8 reserve:7;
101 __u8 reserved[4];
102 __u8 dest_id;
103 } fields;
104 } redirtbl[KVM_IOAPIC_NUM_PINS];
105};
106
107#define KVM_IRQCHIP_PIC_MASTER 0
108#define KVM_IRQCHIP_PIC_SLAVE 1
109#define KVM_IRQCHIP_IOAPIC 2
110#define KVM_NR_IRQCHIPS 3
111
112#define KVM_RUN_X86_SMM (1 << 0)
113#define KVM_RUN_X86_BUS_LOCK (1 << 1)
114#define KVM_RUN_X86_GUEST_MODE (1 << 2)
115
116/* for KVM_GET_REGS and KVM_SET_REGS */
117struct kvm_regs {
118 /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
119 __u64 rax, rbx, rcx, rdx;
120 __u64 rsi, rdi, rsp, rbp;
121 __u64 r8, r9, r10, r11;
122 __u64 r12, r13, r14, r15;
123 __u64 rip, rflags;
124};
125
126/* for KVM_GET_LAPIC and KVM_SET_LAPIC */
127#define KVM_APIC_REG_SIZE 0x400
128struct kvm_lapic_state {
129 char regs[KVM_APIC_REG_SIZE];
130};
131
132struct kvm_segment {
133 __u64 base;
134 __u32 limit;
135 __u16 selector;
136 __u8 type;
137 __u8 present, dpl, db, s, l, g, avl;
138 __u8 unusable;
139 __u8 padding;
140};
141
142struct kvm_dtable {
143 __u64 base;
144 __u16 limit;
145 __u16 padding[3];
146};
147
148
149/* for KVM_GET_SREGS and KVM_SET_SREGS */
150struct kvm_sregs {
151 /* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
152 struct kvm_segment cs, ds, es, fs, gs, ss;
153 struct kvm_segment tr, ldt;
154 struct kvm_dtable gdt, idt;
155 __u64 cr0, cr2, cr3, cr4, cr8;
156 __u64 efer;
157 __u64 apic_base;
158 __u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
159};
160
161struct kvm_sregs2 {
162 /* out (KVM_GET_SREGS2) / in (KVM_SET_SREGS2) */
163 struct kvm_segment cs, ds, es, fs, gs, ss;
164 struct kvm_segment tr, ldt;
165 struct kvm_dtable gdt, idt;
166 __u64 cr0, cr2, cr3, cr4, cr8;
167 __u64 efer;
168 __u64 apic_base;
169 __u64 flags;
170 __u64 pdptrs[4];
171};
172#define KVM_SREGS2_FLAGS_PDPTRS_VALID 1
173
174/* for KVM_GET_FPU and KVM_SET_FPU */
175struct kvm_fpu {
176 __u8 fpr[8][16];
177 __u16 fcw;
178 __u16 fsw;
179 __u8 ftwx; /* in fxsave format */
180 __u8 pad1;
181 __u16 last_opcode;
182 __u64 last_ip;
183 __u64 last_dp;
184 __u8 xmm[16][16];
185 __u32 mxcsr;
186 __u32 pad2;
187};
188
189struct kvm_msr_entry {
190 __u32 index;
191 __u32 reserved;
192 __u64 data;
193};
194
195/* for KVM_GET_MSRS and KVM_SET_MSRS */
196struct kvm_msrs {
197 __u32 nmsrs; /* number of msrs in entries */
198 __u32 pad;
199
200 struct kvm_msr_entry entries[];
201};
202
203/* for KVM_GET_MSR_INDEX_LIST */
204struct kvm_msr_list {
205 __u32 nmsrs; /* number of msrs in entries */
206 __u32 indices[];
207};
208
209/* Maximum size of any access bitmap in bytes */
210#define KVM_MSR_FILTER_MAX_BITMAP_SIZE 0x600
211
212/* for KVM_X86_SET_MSR_FILTER */
213struct kvm_msr_filter_range {
214#define KVM_MSR_FILTER_READ (1 << 0)
215#define KVM_MSR_FILTER_WRITE (1 << 1)
216#define KVM_MSR_FILTER_RANGE_VALID_MASK (KVM_MSR_FILTER_READ | \
217 KVM_MSR_FILTER_WRITE)
218 __u32 flags;
219 __u32 nmsrs; /* number of msrs in bitmap */
220 __u32 base; /* MSR index the bitmap starts at */
221 __u8 *bitmap; /* a 1 bit allows the operations in flags, 0 denies */
222};
223
224#define KVM_MSR_FILTER_MAX_RANGES 16
225struct kvm_msr_filter {
226#ifndef __KERNEL__
227#define KVM_MSR_FILTER_DEFAULT_ALLOW (0 << 0)
228#endif
229#define KVM_MSR_FILTER_DEFAULT_DENY (1 << 0)
230#define KVM_MSR_FILTER_VALID_MASK (KVM_MSR_FILTER_DEFAULT_DENY)
231 __u32 flags;
232 struct kvm_msr_filter_range ranges[KVM_MSR_FILTER_MAX_RANGES];
233};
234
235struct kvm_cpuid_entry {
236 __u32 function;
237 __u32 eax;
238 __u32 ebx;
239 __u32 ecx;
240 __u32 edx;
241 __u32 padding;
242};
243
244/* for KVM_SET_CPUID */
245struct kvm_cpuid {
246 __u32 nent;
247 __u32 padding;
248 struct kvm_cpuid_entry entries[];
249};
250
251struct kvm_cpuid_entry2 {
252 __u32 function;
253 __u32 index;
254 __u32 flags;
255 __u32 eax;
256 __u32 ebx;
257 __u32 ecx;
258 __u32 edx;
259 __u32 padding[3];
260};
261
262#define KVM_CPUID_FLAG_SIGNIFCANT_INDEX (1 << 0)
263#define KVM_CPUID_FLAG_STATEFUL_FUNC (1 << 1)
264#define KVM_CPUID_FLAG_STATE_READ_NEXT (1 << 2)
265
266/* for KVM_SET_CPUID2 */
267struct kvm_cpuid2 {
268 __u32 nent;
269 __u32 padding;
270 struct kvm_cpuid_entry2 entries[];
271};
272
273/* for KVM_GET_PIT and KVM_SET_PIT */
274struct kvm_pit_channel_state {
275 __u32 count; /* can be 65536 */
276 __u16 latched_count;
277 __u8 count_latched;
278 __u8 status_latched;
279 __u8 status;
280 __u8 read_state;
281 __u8 write_state;
282 __u8 write_latch;
283 __u8 rw_mode;
284 __u8 mode;
285 __u8 bcd;
286 __u8 gate;
287 __s64 count_load_time;
288};
289
290struct kvm_debug_exit_arch {
291 __u32 exception;
292 __u32 pad;
293 __u64 pc;
294 __u64 dr6;
295 __u64 dr7;
296};
297
298#define KVM_GUESTDBG_USE_SW_BP 0x00010000
299#define KVM_GUESTDBG_USE_HW_BP 0x00020000
300#define KVM_GUESTDBG_INJECT_DB 0x00040000
301#define KVM_GUESTDBG_INJECT_BP 0x00080000
302#define KVM_GUESTDBG_BLOCKIRQ 0x00100000
303
304/* for KVM_SET_GUEST_DEBUG */
305struct kvm_guest_debug_arch {
306 __u64 debugreg[8];
307};
308
309struct kvm_pit_state {
310 struct kvm_pit_channel_state channels[3];
311};
312
313#define KVM_PIT_FLAGS_HPET_LEGACY 0x00000001
314#define KVM_PIT_FLAGS_SPEAKER_DATA_ON 0x00000002
315
316struct kvm_pit_state2 {
317 struct kvm_pit_channel_state channels[3];
318 __u32 flags;
319 __u32 reserved[9];
320};
321
322struct kvm_reinject_control {
323 __u8 pit_reinject;
324 __u8 reserved[31];
325};
326
327/* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */
328#define KVM_VCPUEVENT_VALID_NMI_PENDING 0x00000001
329#define KVM_VCPUEVENT_VALID_SIPI_VECTOR 0x00000002
330#define KVM_VCPUEVENT_VALID_SHADOW 0x00000004
331#define KVM_VCPUEVENT_VALID_SMM 0x00000008
332#define KVM_VCPUEVENT_VALID_PAYLOAD 0x00000010
333#define KVM_VCPUEVENT_VALID_TRIPLE_FAULT 0x00000020
334
335/* Interrupt shadow states */
336#define KVM_X86_SHADOW_INT_MOV_SS 0x01
337#define KVM_X86_SHADOW_INT_STI 0x02
338
339/* for KVM_GET/SET_VCPU_EVENTS */
340struct kvm_vcpu_events {
341 struct {
342 __u8 injected;
343 __u8 nr;
344 __u8 has_error_code;
345 __u8 pending;
346 __u32 error_code;
347 } exception;
348 struct {
349 __u8 injected;
350 __u8 nr;
351 __u8 soft;
352 __u8 shadow;
353 } interrupt;
354 struct {
355 __u8 injected;
356 __u8 pending;
357 __u8 masked;
358 __u8 pad;
359 } nmi;
360 __u32 sipi_vector;
361 __u32 flags;
362 struct {
363 __u8 smm;
364 __u8 pending;
365 __u8 smm_inside_nmi;
366 __u8 latched_init;
367 } smi;
368 struct {
369 __u8 pending;
370 } triple_fault;
371 __u8 reserved[26];
372 __u8 exception_has_payload;
373 __u64 exception_payload;
374};
375
376/* for KVM_GET/SET_DEBUGREGS */
377struct kvm_debugregs {
378 __u64 db[4];
379 __u64 dr6;
380 __u64 dr7;
381 __u64 flags;
382 __u64 reserved[9];
383};
384
385/* for KVM_CAP_XSAVE and KVM_CAP_XSAVE2 */
386struct kvm_xsave {
387 /*
388 * KVM_GET_XSAVE2 and KVM_SET_XSAVE write and read as many bytes
389 * as are returned by KVM_CHECK_EXTENSION(KVM_CAP_XSAVE2)
390 * respectively, when invoked on the vm file descriptor.
391 *
392 * The size value returned by KVM_CHECK_EXTENSION(KVM_CAP_XSAVE2)
393 * will always be at least 4096. Currently, it is only greater
394 * than 4096 if a dynamic feature has been enabled with
395 * ``arch_prctl()``, but this may change in the future.
396 *
397 * The offsets of the state save areas in struct kvm_xsave follow
398 * the contents of CPUID leaf 0xD on the host.
399 */
400 __u32 region[1024];
401 __u32 extra[];
402};
403
404#define KVM_MAX_XCRS 16
405
406struct kvm_xcr {
407 __u32 xcr;
408 __u32 reserved;
409 __u64 value;
410};
411
412struct kvm_xcrs {
413 __u32 nr_xcrs;
414 __u32 flags;
415 struct kvm_xcr xcrs[KVM_MAX_XCRS];
416 __u64 padding[16];
417};
418
419#define KVM_X86_REG_TYPE_MSR 2
420#define KVM_X86_REG_TYPE_KVM 3
421
422#define KVM_X86_KVM_REG_SIZE(reg) \
423({ \
424 reg == KVM_REG_GUEST_SSP ? KVM_REG_SIZE_U64 : 0; \
425})
426
427#define KVM_X86_REG_TYPE_SIZE(type, reg) \
428({ \
429 __u64 type_size = (__u64)type << 32; \
430 \
431 type_size |= type == KVM_X86_REG_TYPE_MSR ? KVM_REG_SIZE_U64 : \
432 type == KVM_X86_REG_TYPE_KVM ? KVM_X86_KVM_REG_SIZE(reg) : \
433 0; \
434 type_size; \
435})
436
437#define KVM_X86_REG_ID(type, index) \
438 (KVM_REG_X86 | KVM_X86_REG_TYPE_SIZE(type, index) | index)
439
440#define KVM_X86_REG_MSR(index) \
441 KVM_X86_REG_ID(KVM_X86_REG_TYPE_MSR, index)
442#define KVM_X86_REG_KVM(index) \
443 KVM_X86_REG_ID(KVM_X86_REG_TYPE_KVM, index)
444
445/* KVM-defined registers starting from 0 */
446#define KVM_REG_GUEST_SSP 0
447
448#define KVM_SYNC_X86_REGS (1UL << 0)
449#define KVM_SYNC_X86_SREGS (1UL << 1)
450#define KVM_SYNC_X86_EVENTS (1UL << 2)
451
452#define KVM_SYNC_X86_VALID_FIELDS \
453 (KVM_SYNC_X86_REGS| \
454 KVM_SYNC_X86_SREGS| \
455 KVM_SYNC_X86_EVENTS)
456
457/* kvm_sync_regs struct included by kvm_run struct */
458struct kvm_sync_regs {
459 /* Members of this structure are potentially malicious.
460 * Care must be taken by code reading, esp. interpreting,
461 * data fields from them inside KVM to prevent TOCTOU and
462 * double-fetch types of vulnerabilities.
463 */
464 struct kvm_regs regs;
465 struct kvm_sregs sregs;
466 struct kvm_vcpu_events events;
467};
468
469#define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0)
470#define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1)
471#define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2)
472#define KVM_X86_QUIRK_OUT_7E_INC_RIP (1 << 3)
473#define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT (1 << 4)
474#define KVM_X86_QUIRK_FIX_HYPERCALL_INSN (1 << 5)
475#define KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS (1 << 6)
476#define KVM_X86_QUIRK_SLOT_ZAP_ALL (1 << 7)
477#define KVM_X86_QUIRK_STUFF_FEATURE_MSRS (1 << 8)
478#define KVM_X86_QUIRK_IGNORE_GUEST_PAT (1 << 9)
479
480#define KVM_STATE_NESTED_FORMAT_VMX 0
481#define KVM_STATE_NESTED_FORMAT_SVM 1
482
483#define KVM_STATE_NESTED_GUEST_MODE 0x00000001
484#define KVM_STATE_NESTED_RUN_PENDING 0x00000002
485#define KVM_STATE_NESTED_EVMCS 0x00000004
486#define KVM_STATE_NESTED_MTF_PENDING 0x00000008
487#define KVM_STATE_NESTED_GIF_SET 0x00000100
488
489#define KVM_STATE_NESTED_SMM_GUEST_MODE 0x00000001
490#define KVM_STATE_NESTED_SMM_VMXON 0x00000002
491
492#define KVM_STATE_NESTED_VMX_VMCS_SIZE 0x1000
493
494#define KVM_STATE_NESTED_SVM_VMCB_SIZE 0x1000
495
496#define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x00000001
497
498/* vendor-independent attributes for system fd (group 0) */
499#define KVM_X86_GRP_SYSTEM 0
500# define KVM_X86_XCOMP_GUEST_SUPP 0
501
502/* vendor-specific groups and attributes for system fd */
503#define KVM_X86_GRP_SEV 1
504# define KVM_X86_SEV_VMSA_FEATURES 0
505
506struct kvm_vmx_nested_state_data {
507 __u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
508 __u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
509};
510
511struct kvm_vmx_nested_state_hdr {
512 __u64 vmxon_pa;
513 __u64 vmcs12_pa;
514
515 struct {
516 __u16 flags;
517 } smm;
518
519 __u16 pad;
520
521 __u32 flags;
522 __u64 preemption_timer_deadline;
523};
524
525struct kvm_svm_nested_state_data {
526 /* Save area only used if KVM_STATE_NESTED_RUN_PENDING. */
527 __u8 vmcb12[KVM_STATE_NESTED_SVM_VMCB_SIZE];
528};
529
530struct kvm_svm_nested_state_hdr {
531 __u64 vmcb_pa;
532};
533
534/* for KVM_CAP_NESTED_STATE */
535struct kvm_nested_state {
536 __u16 flags;
537 __u16 format;
538 __u32 size;
539
540 union {
541 struct kvm_vmx_nested_state_hdr vmx;
542 struct kvm_svm_nested_state_hdr svm;
543
544 /* Pad the header to 128 bytes. */
545 __u8 pad[120];
546 } hdr;
547
548 /*
549 * Define data region as 0 bytes to preserve backwards-compatability
550 * to old definition of kvm_nested_state in order to avoid changing
551 * KVM_{GET,PUT}_NESTED_STATE ioctl values.
552 */
553 union {
554 __DECLARE_FLEX_ARRAY(struct kvm_vmx_nested_state_data, vmx);
555 __DECLARE_FLEX_ARRAY(struct kvm_svm_nested_state_data, svm);
556 } data;
557};
558
559/* for KVM_CAP_PMU_EVENT_FILTER */
560struct kvm_pmu_event_filter {
561 __u32 action;
562 __u32 nevents;
563 __u32 fixed_counter_bitmap;
564 __u32 flags;
565 __u32 pad[4];
566 __u64 events[];
567};
568
569#define KVM_PMU_EVENT_ALLOW 0
570#define KVM_PMU_EVENT_DENY 1
571
572#define KVM_PMU_EVENT_FLAG_MASKED_EVENTS _BITUL(0)
573#define KVM_PMU_EVENT_FLAGS_VALID_MASK (KVM_PMU_EVENT_FLAG_MASKED_EVENTS)
574
575/* for KVM_CAP_MCE */
576struct kvm_x86_mce {
577 __u64 status;
578 __u64 addr;
579 __u64 misc;
580 __u64 mcg_status;
581 __u8 bank;
582 __u8 pad1[7];
583 __u64 pad2[3];
584};
585
586/* for KVM_CAP_XEN_HVM */
587#define KVM_XEN_HVM_CONFIG_HYPERCALL_MSR (1 << 0)
588#define KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL (1 << 1)
589#define KVM_XEN_HVM_CONFIG_SHARED_INFO (1 << 2)
590#define KVM_XEN_HVM_CONFIG_RUNSTATE (1 << 3)
591#define KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL (1 << 4)
592#define KVM_XEN_HVM_CONFIG_EVTCHN_SEND (1 << 5)
593#define KVM_XEN_HVM_CONFIG_RUNSTATE_UPDATE_FLAG (1 << 6)
594#define KVM_XEN_HVM_CONFIG_PVCLOCK_TSC_UNSTABLE (1 << 7)
595#define KVM_XEN_HVM_CONFIG_SHARED_INFO_HVA (1 << 8)
596
597#define KVM_XEN_MSR_MIN_INDEX 0x40000000u
598#define KVM_XEN_MSR_MAX_INDEX 0x4fffffffu
599
600struct kvm_xen_hvm_config {
601 __u32 flags;
602 __u32 msr;
603 __u64 blob_addr_32;
604 __u64 blob_addr_64;
605 __u8 blob_size_32;
606 __u8 blob_size_64;
607 __u8 pad2[30];
608};
609
610struct kvm_xen_hvm_attr {
611 __u16 type;
612 __u16 pad[3];
613 union {
614 __u8 long_mode;
615 __u8 vector;
616 __u8 runstate_update_flag;
617 union {
618 __u64 gfn;
619#define KVM_XEN_INVALID_GFN ((__u64)-1)
620 __u64 hva;
621 } shared_info;
622 struct {
623 __u32 send_port;
624 __u32 type; /* EVTCHNSTAT_ipi / EVTCHNSTAT_interdomain */
625 __u32 flags;
626#define KVM_XEN_EVTCHN_DEASSIGN (1 << 0)
627#define KVM_XEN_EVTCHN_UPDATE (1 << 1)
628#define KVM_XEN_EVTCHN_RESET (1 << 2)
629 /*
630 * Events sent by the guest are either looped back to
631 * the guest itself (potentially on a different port#)
632 * or signalled via an eventfd.
633 */
634 union {
635 struct {
636 __u32 port;
637 __u32 vcpu;
638 __u32 priority;
639 } port;
640 struct {
641 __u32 port; /* Zero for eventfd */
642 __s32 fd;
643 } eventfd;
644 __u32 padding[4];
645 } deliver;
646 } evtchn;
647 __u32 xen_version;
648 __u64 pad[8];
649 } u;
650};
651
652
653/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_SHARED_INFO */
654#define KVM_XEN_ATTR_TYPE_LONG_MODE 0x0
655#define KVM_XEN_ATTR_TYPE_SHARED_INFO 0x1
656#define KVM_XEN_ATTR_TYPE_UPCALL_VECTOR 0x2
657/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */
658#define KVM_XEN_ATTR_TYPE_EVTCHN 0x3
659#define KVM_XEN_ATTR_TYPE_XEN_VERSION 0x4
660/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_RUNSTATE_UPDATE_FLAG */
661#define KVM_XEN_ATTR_TYPE_RUNSTATE_UPDATE_FLAG 0x5
662/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_SHARED_INFO_HVA */
663#define KVM_XEN_ATTR_TYPE_SHARED_INFO_HVA 0x6
664
665struct kvm_xen_vcpu_attr {
666 __u16 type;
667 __u16 pad[3];
668 union {
669 __u64 gpa;
670#define KVM_XEN_INVALID_GPA ((__u64)-1)
671 __u64 hva;
672 __u64 pad[8];
673 struct {
674 __u64 state;
675 __u64 state_entry_time;
676 __u64 time_running;
677 __u64 time_runnable;
678 __u64 time_blocked;
679 __u64 time_offline;
680 } runstate;
681 __u32 vcpu_id;
682 struct {
683 __u32 port;
684 __u32 priority;
685 __u64 expires_ns;
686 } timer;
687 __u8 vector;
688 } u;
689};
690
691/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_SHARED_INFO */
692#define KVM_XEN_VCPU_ATTR_TYPE_VCPU_INFO 0x0
693#define KVM_XEN_VCPU_ATTR_TYPE_VCPU_TIME_INFO 0x1
694#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADDR 0x2
695#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_CURRENT 0x3
696#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_DATA 0x4
697#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADJUST 0x5
698/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */
699#define KVM_XEN_VCPU_ATTR_TYPE_VCPU_ID 0x6
700#define KVM_XEN_VCPU_ATTR_TYPE_TIMER 0x7
701#define KVM_XEN_VCPU_ATTR_TYPE_UPCALL_VECTOR 0x8
702/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_SHARED_INFO_HVA */
703#define KVM_XEN_VCPU_ATTR_TYPE_VCPU_INFO_HVA 0x9
704
705/* Secure Encrypted Virtualization command */
706enum sev_cmd_id {
707 /* Guest initialization commands */
708 KVM_SEV_INIT = 0,
709 KVM_SEV_ES_INIT,
710 /* Guest launch commands */
711 KVM_SEV_LAUNCH_START,
712 KVM_SEV_LAUNCH_UPDATE_DATA,
713 KVM_SEV_LAUNCH_UPDATE_VMSA,
714 KVM_SEV_LAUNCH_SECRET,
715 KVM_SEV_LAUNCH_MEASURE,
716 KVM_SEV_LAUNCH_FINISH,
717 /* Guest migration commands (outgoing) */
718 KVM_SEV_SEND_START,
719 KVM_SEV_SEND_UPDATE_DATA,
720 KVM_SEV_SEND_UPDATE_VMSA,
721 KVM_SEV_SEND_FINISH,
722 /* Guest migration commands (incoming) */
723 KVM_SEV_RECEIVE_START,
724 KVM_SEV_RECEIVE_UPDATE_DATA,
725 KVM_SEV_RECEIVE_UPDATE_VMSA,
726 KVM_SEV_RECEIVE_FINISH,
727 /* Guest status and debug commands */
728 KVM_SEV_GUEST_STATUS,
729 KVM_SEV_DBG_DECRYPT,
730 KVM_SEV_DBG_ENCRYPT,
731 /* Guest certificates commands */
732 KVM_SEV_CERT_EXPORT,
733 /* Attestation report */
734 KVM_SEV_GET_ATTESTATION_REPORT,
735 /* Guest Migration Extension */
736 KVM_SEV_SEND_CANCEL,
737
738 /* Second time is the charm; improved versions of the above ioctls. */
739 KVM_SEV_INIT2,
740
741 /* SNP-specific commands */
742 KVM_SEV_SNP_LAUNCH_START = 100,
743 KVM_SEV_SNP_LAUNCH_UPDATE,
744 KVM_SEV_SNP_LAUNCH_FINISH,
745
746 KVM_SEV_NR_MAX,
747};
748
749struct kvm_sev_cmd {
750 __u32 id;
751 __u32 pad0;
752 __u64 data;
753 __u32 error;
754 __u32 sev_fd;
755};
756
757struct kvm_sev_init {
758 __u64 vmsa_features;
759 __u32 flags;
760 __u16 ghcb_version;
761 __u16 pad1;
762 __u32 pad2[8];
763};
764
765struct kvm_sev_launch_start {
766 __u32 handle;
767 __u32 policy;
768 __u64 dh_uaddr;
769 __u32 dh_len;
770 __u32 pad0;
771 __u64 session_uaddr;
772 __u32 session_len;
773 __u32 pad1;
774};
775
776struct kvm_sev_launch_update_data {
777 __u64 uaddr;
778 __u32 len;
779 __u32 pad0;
780};
781
782
783struct kvm_sev_launch_secret {
784 __u64 hdr_uaddr;
785 __u32 hdr_len;
786 __u32 pad0;
787 __u64 guest_uaddr;
788 __u32 guest_len;
789 __u32 pad1;
790 __u64 trans_uaddr;
791 __u32 trans_len;
792 __u32 pad2;
793};
794
795struct kvm_sev_launch_measure {
796 __u64 uaddr;
797 __u32 len;
798 __u32 pad0;
799};
800
801struct kvm_sev_guest_status {
802 __u32 handle;
803 __u32 policy;
804 __u32 state;
805};
806
807struct kvm_sev_dbg {
808 __u64 src_uaddr;
809 __u64 dst_uaddr;
810 __u32 len;
811 __u32 pad0;
812};
813
814struct kvm_sev_attestation_report {
815 __u8 mnonce[16];
816 __u64 uaddr;
817 __u32 len;
818 __u32 pad0;
819};
820
821struct kvm_sev_send_start {
822 __u32 policy;
823 __u32 pad0;
824 __u64 pdh_cert_uaddr;
825 __u32 pdh_cert_len;
826 __u32 pad1;
827 __u64 plat_certs_uaddr;
828 __u32 plat_certs_len;
829 __u32 pad2;
830 __u64 amd_certs_uaddr;
831 __u32 amd_certs_len;
832 __u32 pad3;
833 __u64 session_uaddr;
834 __u32 session_len;
835 __u32 pad4;
836};
837
838struct kvm_sev_send_update_data {
839 __u64 hdr_uaddr;
840 __u32 hdr_len;
841 __u32 pad0;
842 __u64 guest_uaddr;
843 __u32 guest_len;
844 __u32 pad1;
845 __u64 trans_uaddr;
846 __u32 trans_len;
847 __u32 pad2;
848};
849
850struct kvm_sev_receive_start {
851 __u32 handle;
852 __u32 policy;
853 __u64 pdh_uaddr;
854 __u32 pdh_len;
855 __u32 pad0;
856 __u64 session_uaddr;
857 __u32 session_len;
858 __u32 pad1;
859};
860
861struct kvm_sev_receive_update_data {
862 __u64 hdr_uaddr;
863 __u32 hdr_len;
864 __u32 pad0;
865 __u64 guest_uaddr;
866 __u32 guest_len;
867 __u32 pad1;
868 __u64 trans_uaddr;
869 __u32 trans_len;
870 __u32 pad2;
871};
872
873struct kvm_sev_snp_launch_start {
874 __u64 policy;
875 __u8 gosvw[16];
876 __u16 flags;
877 __u8 pad0[6];
878 __u64 pad1[4];
879};
880
881/* Kept in sync with firmware values for simplicity. */
882#define KVM_SEV_PAGE_TYPE_INVALID 0x0
883#define KVM_SEV_SNP_PAGE_TYPE_NORMAL 0x1
884#define KVM_SEV_SNP_PAGE_TYPE_ZERO 0x3
885#define KVM_SEV_SNP_PAGE_TYPE_UNMEASURED 0x4
886#define KVM_SEV_SNP_PAGE_TYPE_SECRETS 0x5
887#define KVM_SEV_SNP_PAGE_TYPE_CPUID 0x6
888
889struct kvm_sev_snp_launch_update {
890 __u64 gfn_start;
891 __u64 uaddr;
892 __u64 len;
893 __u8 type;
894 __u8 pad0;
895 __u16 flags;
896 __u32 pad1;
897 __u64 pad2[4];
898};
899
900#define KVM_SEV_SNP_ID_BLOCK_SIZE 96
901#define KVM_SEV_SNP_ID_AUTH_SIZE 4096
902#define KVM_SEV_SNP_FINISH_DATA_SIZE 32
903
904struct kvm_sev_snp_launch_finish {
905 __u64 id_block_uaddr;
906 __u64 id_auth_uaddr;
907 __u8 id_block_en;
908 __u8 auth_key_en;
909 __u8 vcek_disabled;
910 __u8 host_data[KVM_SEV_SNP_FINISH_DATA_SIZE];
911 __u8 pad0[3];
912 __u16 flags;
913 __u64 pad1[4];
914};
915
916#define KVM_X2APIC_API_USE_32BIT_IDS (1ULL << 0)
917#define KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK (1ULL << 1)
918
919struct kvm_hyperv_eventfd {
920 __u32 conn_id;
921 __s32 fd;
922 __u32 flags;
923 __u32 padding[3];
924};
925
926#define KVM_HYPERV_CONN_ID_MASK 0x00ffffff
927#define KVM_HYPERV_EVENTFD_DEASSIGN (1 << 0)
928
929/*
930 * Masked event layout.
931 * Bits Description
932 * ---- -----------
933 * 7:0 event select (low bits)
934 * 15:8 umask match
935 * 31:16 unused
936 * 35:32 event select (high bits)
937 * 36:54 unused
938 * 55 exclude bit
939 * 63:56 umask mask
940 */
941
942#define KVM_PMU_ENCODE_MASKED_ENTRY(event_select, mask, match, exclude) \
943 (((event_select) & 0xFFULL) | (((event_select) & 0XF00ULL) << 24) | \
944 (((mask) & 0xFFULL) << 56) | \
945 (((match) & 0xFFULL) << 8) | \
946 ((__u64)(!!(exclude)) << 55))
947
948#define KVM_PMU_MASKED_ENTRY_EVENT_SELECT \
949 (__GENMASK_ULL(7, 0) | __GENMASK_ULL(35, 32))
950#define KVM_PMU_MASKED_ENTRY_UMASK_MASK (__GENMASK_ULL(63, 56))
951#define KVM_PMU_MASKED_ENTRY_UMASK_MATCH (__GENMASK_ULL(15, 8))
952#define KVM_PMU_MASKED_ENTRY_EXCLUDE (_BITULL(55))
953#define KVM_PMU_MASKED_ENTRY_UMASK_MASK_SHIFT (56)
954
955/* for KVM_{GET,SET,HAS}_DEVICE_ATTR */
956#define KVM_VCPU_TSC_CTRL 0 /* control group for the timestamp counter (TSC) */
957#define KVM_VCPU_TSC_OFFSET 0 /* attribute for the TSC offset */
958
959/* x86-specific KVM_EXIT_HYPERCALL flags. */
960#define KVM_EXIT_HYPERCALL_LONG_MODE _BITULL(0)
961
962#define KVM_X86_DEFAULT_VM 0
963#define KVM_X86_SW_PROTECTED_VM 1
964#define KVM_X86_SEV_VM 2
965#define KVM_X86_SEV_ES_VM 3
966#define KVM_X86_SNP_VM 4
967#define KVM_X86_TDX_VM 5
968
969/* Trust Domain eXtension sub-ioctl() commands. */
970enum kvm_tdx_cmd_id {
971 KVM_TDX_CAPABILITIES = 0,
972 KVM_TDX_INIT_VM,
973 KVM_TDX_INIT_VCPU,
974 KVM_TDX_INIT_MEM_REGION,
975 KVM_TDX_FINALIZE_VM,
976 KVM_TDX_GET_CPUID,
977
978 KVM_TDX_CMD_NR_MAX,
979};
980
981struct kvm_tdx_cmd {
982 /* enum kvm_tdx_cmd_id */
983 __u32 id;
984 /* flags for sub-commend. If sub-command doesn't use this, set zero. */
985 __u32 flags;
986 /*
987 * data for each sub-command. An immediate or a pointer to the actual
988 * data in process virtual address. If sub-command doesn't use it,
989 * set zero.
990 */
991 __u64 data;
992 /*
993 * Auxiliary error code. The sub-command may return TDX SEAMCALL
994 * status code in addition to -Exxx.
995 */
996 __u64 hw_error;
997};
998
999struct kvm_tdx_capabilities {
1000 __u64 supported_attrs;
1001 __u64 supported_xfam;
1002
1003 __u64 kernel_tdvmcallinfo_1_r11;
1004 __u64 user_tdvmcallinfo_1_r11;
1005 __u64 kernel_tdvmcallinfo_1_r12;
1006 __u64 user_tdvmcallinfo_1_r12;
1007
1008 __u64 reserved[250];
1009
1010 /* Configurable CPUID bits for userspace */
1011 struct kvm_cpuid2 cpuid;
1012};
1013
1014struct kvm_tdx_init_vm {
1015 __u64 attributes;
1016 __u64 xfam;
1017 __u64 mrconfigid[6]; /* sha384 digest */
1018 __u64 mrowner[6]; /* sha384 digest */
1019 __u64 mrownerconfig[6]; /* sha384 digest */
1020
1021 /* The total space for TD_PARAMS before the CPUIDs is 256 bytes */
1022 __u64 reserved[12];
1023
1024 /*
1025 * Call KVM_TDX_INIT_VM before vcpu creation, thus before
1026 * KVM_SET_CPUID2.
1027 * This configuration supersedes KVM_SET_CPUID2s for VCPUs because the
1028 * TDX module directly virtualizes those CPUIDs without VMM. The user
1029 * space VMM, e.g. qemu, should make KVM_SET_CPUID2 consistent with
1030 * those values. If it doesn't, KVM may have wrong idea of vCPUIDs of
1031 * the guest, and KVM may wrongly emulate CPUIDs or MSRs that the TDX
1032 * module doesn't virtualize.
1033 */
1034 struct kvm_cpuid2 cpuid;
1035};
1036
1037#define KVM_TDX_MEASURE_MEMORY_REGION _BITULL(0)
1038
1039struct kvm_tdx_init_mem_region {
1040 __u64 source_addr;
1041 __u64 gpa;
1042 __u64 nr_pages;
1043};
1044
1045#endif /* _ASM_X86_KVM_H */
1046