1// SPDX-License-Identifier: GPL-2.0
2//
3// Register map access API
4//
5// Copyright 2011 Wolfson Microelectronics plc
6//
7// Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8
9#include <linux/device.h>
10#include <linux/slab.h>
11#include <linux/export.h>
12#include <linux/mutex.h>
13#include <linux/err.h>
14#include <linux/property.h>
15#include <linux/rbtree.h>
16#include <linux/sched.h>
17#include <linux/delay.h>
18#include <linux/log2.h>
19#include <linux/hwspinlock.h>
20#include <linux/unaligned.h>
21
22#define CREATE_TRACE_POINTS
23#include "trace.h"
24
25#include "internal.h"
26
27/*
28 * Sometimes for failures during very early init the trace
29 * infrastructure isn't available early enough to be used. For this
30 * sort of problem defining LOG_DEVICE will add printks for basic
31 * register I/O on a specific device.
32 */
33#undef LOG_DEVICE
34
35#ifdef LOG_DEVICE
36static inline bool regmap_should_log(struct regmap *map)
37{
38 return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0);
39}
40#else
41static inline bool regmap_should_log(struct regmap *map) { return false; }
42#endif
43
44
45static int _regmap_update_bits(struct regmap *map, unsigned int reg,
46 unsigned int mask, unsigned int val,
47 bool *change, bool force_write);
48
49static int _regmap_bus_reg_read(void *context, unsigned int reg,
50 unsigned int *val);
51static int _regmap_bus_read(void *context, unsigned int reg,
52 unsigned int *val);
53static int _regmap_bus_formatted_write(void *context, unsigned int reg,
54 unsigned int val);
55static int _regmap_bus_reg_write(void *context, unsigned int reg,
56 unsigned int val);
57static int _regmap_bus_raw_write(void *context, unsigned int reg,
58 unsigned int val);
59
60bool regmap_reg_in_ranges(unsigned int reg,
61 const struct regmap_range *ranges,
62 unsigned int nranges)
63{
64 const struct regmap_range *r;
65 int i;
66
67 for (i = 0, r = ranges; i < nranges; i++, r++)
68 if (regmap_reg_in_range(reg, range: r))
69 return true;
70 return false;
71}
72EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
73
74bool regmap_check_range_table(struct regmap *map, unsigned int reg,
75 const struct regmap_access_table *table)
76{
77 /* Check "no ranges" first */
78 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
79 return false;
80
81 /* In case zero "yes ranges" are supplied, any reg is OK */
82 if (!table->n_yes_ranges)
83 return true;
84
85 return regmap_reg_in_ranges(reg, table->yes_ranges,
86 table->n_yes_ranges);
87}
88EXPORT_SYMBOL_GPL(regmap_check_range_table);
89
90bool regmap_writeable(struct regmap *map, unsigned int reg)
91{
92 if (map->max_register_is_set && reg > map->max_register)
93 return false;
94
95 if (map->writeable_reg)
96 return map->writeable_reg(map->dev, reg);
97
98 if (map->wr_table)
99 return regmap_check_range_table(map, reg, map->wr_table);
100
101 return true;
102}
103
104bool regmap_cached(struct regmap *map, unsigned int reg)
105{
106 int ret;
107 unsigned int val;
108
109 if (map->cache_type == REGCACHE_NONE)
110 return false;
111
112 if (!map->cache_ops)
113 return false;
114
115 if (map->max_register_is_set && reg > map->max_register)
116 return false;
117
118 map->lock(map->lock_arg);
119 ret = regcache_read(map, reg, value: &val);
120 map->unlock(map->lock_arg);
121 if (ret)
122 return false;
123
124 return true;
125}
126
127bool regmap_readable(struct regmap *map, unsigned int reg)
128{
129 if (!map->reg_read)
130 return false;
131
132 if (map->max_register_is_set && reg > map->max_register)
133 return false;
134
135 if (map->format.format_write)
136 return false;
137
138 if (map->readable_reg)
139 return map->readable_reg(map->dev, reg);
140
141 if (map->rd_table)
142 return regmap_check_range_table(map, reg, map->rd_table);
143
144 return true;
145}
146
147bool regmap_volatile(struct regmap *map, unsigned int reg)
148{
149 if (!map->format.format_write && !regmap_readable(map, reg))
150 return false;
151
152 if (map->volatile_reg)
153 return map->volatile_reg(map->dev, reg);
154
155 if (map->volatile_table)
156 return regmap_check_range_table(map, reg, map->volatile_table);
157
158 if (map->cache_ops)
159 return false;
160 else
161 return true;
162}
163
164bool regmap_precious(struct regmap *map, unsigned int reg)
165{
166 if (!regmap_readable(map, reg))
167 return false;
168
169 if (map->precious_reg)
170 return map->precious_reg(map->dev, reg);
171
172 if (map->precious_table)
173 return regmap_check_range_table(map, reg, map->precious_table);
174
175 return false;
176}
177
178bool regmap_writeable_noinc(struct regmap *map, unsigned int reg)
179{
180 if (map->writeable_noinc_reg)
181 return map->writeable_noinc_reg(map->dev, reg);
182
183 if (map->wr_noinc_table)
184 return regmap_check_range_table(map, reg, map->wr_noinc_table);
185
186 return true;
187}
188
189bool regmap_readable_noinc(struct regmap *map, unsigned int reg)
190{
191 if (map->readable_noinc_reg)
192 return map->readable_noinc_reg(map->dev, reg);
193
194 if (map->rd_noinc_table)
195 return regmap_check_range_table(map, reg, map->rd_noinc_table);
196
197 return true;
198}
199
200static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
201 size_t num)
202{
203 unsigned int i;
204
205 for (i = 0; i < num; i++)
206 if (!regmap_volatile(map, reg: reg + regmap_get_offset(map, index: i)))
207 return false;
208
209 return true;
210}
211
212static void regmap_format_12_20_write(struct regmap *map,
213 unsigned int reg, unsigned int val)
214{
215 u8 *out = map->work_buf;
216
217 out[0] = reg >> 4;
218 out[1] = (reg << 4) | (val >> 16);
219 out[2] = val >> 8;
220 out[3] = val;
221}
222
223
224static void regmap_format_2_6_write(struct regmap *map,
225 unsigned int reg, unsigned int val)
226{
227 u8 *out = map->work_buf;
228
229 *out = (reg << 6) | val;
230}
231
232static void regmap_format_4_12_write(struct regmap *map,
233 unsigned int reg, unsigned int val)
234{
235 __be16 *out = map->work_buf;
236 *out = cpu_to_be16((reg << 12) | val);
237}
238
239static void regmap_format_7_9_write(struct regmap *map,
240 unsigned int reg, unsigned int val)
241{
242 __be16 *out = map->work_buf;
243 *out = cpu_to_be16((reg << 9) | val);
244}
245
246static void regmap_format_7_17_write(struct regmap *map,
247 unsigned int reg, unsigned int val)
248{
249 u8 *out = map->work_buf;
250
251 out[2] = val;
252 out[1] = val >> 8;
253 out[0] = (val >> 16) | (reg << 1);
254}
255
256static void regmap_format_10_14_write(struct regmap *map,
257 unsigned int reg, unsigned int val)
258{
259 u8 *out = map->work_buf;
260
261 out[2] = val;
262 out[1] = (val >> 8) | (reg << 6);
263 out[0] = reg >> 2;
264}
265
266static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
267{
268 u8 *b = buf;
269
270 b[0] = val << shift;
271}
272
273static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
274{
275 put_unaligned_be16(val: val << shift, p: buf);
276}
277
278static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
279{
280 put_unaligned_le16(val: val << shift, p: buf);
281}
282
283static void regmap_format_16_native(void *buf, unsigned int val,
284 unsigned int shift)
285{
286 u16 v = val << shift;
287
288 memcpy(to: buf, from: &v, len: sizeof(v));
289}
290
291static void regmap_format_24_be(void *buf, unsigned int val, unsigned int shift)
292{
293 put_unaligned_be24(val: val << shift, p: buf);
294}
295
296static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
297{
298 put_unaligned_be32(val: val << shift, p: buf);
299}
300
301static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
302{
303 put_unaligned_le32(val: val << shift, p: buf);
304}
305
306static void regmap_format_32_native(void *buf, unsigned int val,
307 unsigned int shift)
308{
309 u32 v = val << shift;
310
311 memcpy(to: buf, from: &v, len: sizeof(v));
312}
313
314static void regmap_parse_inplace_noop(void *buf)
315{
316}
317
318static unsigned int regmap_parse_8(const void *buf)
319{
320 const u8 *b = buf;
321
322 return b[0];
323}
324
325static unsigned int regmap_parse_16_be(const void *buf)
326{
327 return get_unaligned_be16(p: buf);
328}
329
330static unsigned int regmap_parse_16_le(const void *buf)
331{
332 return get_unaligned_le16(p: buf);
333}
334
335static void regmap_parse_16_be_inplace(void *buf)
336{
337 u16 v = get_unaligned_be16(p: buf);
338
339 memcpy(to: buf, from: &v, len: sizeof(v));
340}
341
342static void regmap_parse_16_le_inplace(void *buf)
343{
344 u16 v = get_unaligned_le16(p: buf);
345
346 memcpy(to: buf, from: &v, len: sizeof(v));
347}
348
349static unsigned int regmap_parse_16_native(const void *buf)
350{
351 u16 v;
352
353 memcpy(to: &v, from: buf, len: sizeof(v));
354 return v;
355}
356
357static unsigned int regmap_parse_24_be(const void *buf)
358{
359 return get_unaligned_be24(p: buf);
360}
361
362static unsigned int regmap_parse_32_be(const void *buf)
363{
364 return get_unaligned_be32(p: buf);
365}
366
367static unsigned int regmap_parse_32_le(const void *buf)
368{
369 return get_unaligned_le32(p: buf);
370}
371
372static void regmap_parse_32_be_inplace(void *buf)
373{
374 u32 v = get_unaligned_be32(p: buf);
375
376 memcpy(to: buf, from: &v, len: sizeof(v));
377}
378
379static void regmap_parse_32_le_inplace(void *buf)
380{
381 u32 v = get_unaligned_le32(p: buf);
382
383 memcpy(to: buf, from: &v, len: sizeof(v));
384}
385
386static unsigned int regmap_parse_32_native(const void *buf)
387{
388 u32 v;
389
390 memcpy(to: &v, from: buf, len: sizeof(v));
391 return v;
392}
393
394static void regmap_lock_hwlock(void *__map)
395{
396 struct regmap *map = __map;
397
398 hwspin_lock_timeout(hwlock: map->hwlock, UINT_MAX);
399}
400
401static void regmap_lock_hwlock_irq(void *__map)
402{
403 struct regmap *map = __map;
404
405 hwspin_lock_timeout_irq(hwlock: map->hwlock, UINT_MAX);
406}
407
408static void regmap_lock_hwlock_irqsave(void *__map)
409{
410 struct regmap *map = __map;
411
412 hwspin_lock_timeout_irqsave(hwlock: map->hwlock, UINT_MAX,
413 flags: &map->spinlock_flags);
414}
415
416static void regmap_unlock_hwlock(void *__map)
417{
418 struct regmap *map = __map;
419
420 hwspin_unlock(hwlock: map->hwlock);
421}
422
423static void regmap_unlock_hwlock_irq(void *__map)
424{
425 struct regmap *map = __map;
426
427 hwspin_unlock_irq(hwlock: map->hwlock);
428}
429
430static void regmap_unlock_hwlock_irqrestore(void *__map)
431{
432 struct regmap *map = __map;
433
434 hwspin_unlock_irqrestore(hwlock: map->hwlock, flags: &map->spinlock_flags);
435}
436
437static void regmap_lock_unlock_none(void *__map)
438{
439
440}
441
442static void regmap_lock_mutex(void *__map)
443{
444 struct regmap *map = __map;
445 mutex_lock(lock: &map->mutex);
446}
447
448static void regmap_unlock_mutex(void *__map)
449{
450 struct regmap *map = __map;
451 mutex_unlock(lock: &map->mutex);
452}
453
454static void regmap_lock_spinlock(void *__map)
455__acquires(&map->spinlock)
456{
457 struct regmap *map = __map;
458 unsigned long flags;
459
460 spin_lock_irqsave(&map->spinlock, flags);
461 map->spinlock_flags = flags;
462}
463
464static void regmap_unlock_spinlock(void *__map)
465__releases(&map->spinlock)
466{
467 struct regmap *map = __map;
468 spin_unlock_irqrestore(lock: &map->spinlock, flags: map->spinlock_flags);
469}
470
471static void regmap_lock_raw_spinlock(void *__map)
472__acquires(&map->raw_spinlock)
473{
474 struct regmap *map = __map;
475 unsigned long flags;
476
477 raw_spin_lock_irqsave(&map->raw_spinlock, flags);
478 map->raw_spinlock_flags = flags;
479}
480
481static void regmap_unlock_raw_spinlock(void *__map)
482__releases(&map->raw_spinlock)
483{
484 struct regmap *map = __map;
485 raw_spin_unlock_irqrestore(&map->raw_spinlock, map->raw_spinlock_flags);
486}
487
488static void dev_get_regmap_release(struct device *dev, void *res)
489{
490 /*
491 * We don't actually have anything to do here; the goal here
492 * is not to manage the regmap but to provide a simple way to
493 * get the regmap back given a struct device.
494 */
495}
496
497static bool _regmap_range_add(struct regmap *map,
498 struct regmap_range_node *data)
499{
500 struct rb_root *root = &map->range_tree;
501 struct rb_node **new = &(root->rb_node), *parent = NULL;
502
503 while (*new) {
504 struct regmap_range_node *this =
505 rb_entry(*new, struct regmap_range_node, node);
506
507 parent = *new;
508 if (data->range_max < this->range_min)
509 new = &((*new)->rb_left);
510 else if (data->range_min > this->range_max)
511 new = &((*new)->rb_right);
512 else
513 return false;
514 }
515
516 rb_link_node(node: &data->node, parent, rb_link: new);
517 rb_insert_color(&data->node, root);
518
519 return true;
520}
521
522static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
523 unsigned int reg)
524{
525 struct rb_node *node = map->range_tree.rb_node;
526
527 while (node) {
528 struct regmap_range_node *this =
529 rb_entry(node, struct regmap_range_node, node);
530
531 if (reg < this->range_min)
532 node = node->rb_left;
533 else if (reg > this->range_max)
534 node = node->rb_right;
535 else
536 return this;
537 }
538
539 return NULL;
540}
541
542static void regmap_range_exit(struct regmap *map)
543{
544 struct rb_node *next;
545 struct regmap_range_node *range_node;
546
547 next = rb_first(&map->range_tree);
548 while (next) {
549 range_node = rb_entry(next, struct regmap_range_node, node);
550 next = rb_next(&range_node->node);
551 rb_erase(&range_node->node, &map->range_tree);
552 kfree(objp: range_node);
553 }
554
555 kfree(objp: map->selector_work_buf);
556}
557
558static int regmap_set_name(struct regmap *map, const struct regmap_config *config)
559{
560 if (config->name) {
561 const char *name = kstrdup_const(s: config->name, GFP_KERNEL);
562
563 if (!name)
564 return -ENOMEM;
565
566 kfree_const(x: map->name);
567 map->name = name;
568 }
569
570 return 0;
571}
572
573int regmap_attach_dev(struct device *dev, struct regmap *map,
574 const struct regmap_config *config)
575{
576 struct regmap **m;
577 int ret;
578
579 map->dev = dev;
580
581 ret = regmap_set_name(map, config);
582 if (ret)
583 return ret;
584
585 regmap_debugfs_exit(map);
586 regmap_debugfs_init(map);
587
588 /* Add a devres resource for dev_get_regmap() */
589 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
590 if (!m) {
591 regmap_debugfs_exit(map);
592 return -ENOMEM;
593 }
594 *m = map;
595 devres_add(dev, res: m);
596
597 return 0;
598}
599EXPORT_SYMBOL_GPL(regmap_attach_dev);
600
601static int dev_get_regmap_match(struct device *dev, void *res, void *data);
602
603static int regmap_detach_dev(struct device *dev, struct regmap *map)
604{
605 if (!dev)
606 return 0;
607
608 return devres_release(dev, release: dev_get_regmap_release,
609 match: dev_get_regmap_match, match_data: (void *)map->name);
610}
611
612static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
613 const struct regmap_config *config)
614{
615 enum regmap_endian endian;
616
617 /* Retrieve the endianness specification from the regmap config */
618 endian = config->reg_format_endian;
619
620 /* If the regmap config specified a non-default value, use that */
621 if (endian != REGMAP_ENDIAN_DEFAULT)
622 return endian;
623
624 /* Retrieve the endianness specification from the bus config */
625 if (bus && bus->reg_format_endian_default)
626 endian = bus->reg_format_endian_default;
627
628 /* If the bus specified a non-default value, use that */
629 if (endian != REGMAP_ENDIAN_DEFAULT)
630 return endian;
631
632 /* Use this if no other value was found */
633 return REGMAP_ENDIAN_BIG;
634}
635
636enum regmap_endian regmap_get_val_endian(struct device *dev,
637 const struct regmap_bus *bus,
638 const struct regmap_config *config)
639{
640 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
641 enum regmap_endian endian;
642
643 /* Retrieve the endianness specification from the regmap config */
644 endian = config->val_format_endian;
645
646 /* If the regmap config specified a non-default value, use that */
647 if (endian != REGMAP_ENDIAN_DEFAULT)
648 return endian;
649
650 /* If the firmware node exist try to get endianness from it */
651 if (fwnode_property_read_bool(fwnode, propname: "big-endian"))
652 endian = REGMAP_ENDIAN_BIG;
653 else if (fwnode_property_read_bool(fwnode, propname: "little-endian"))
654 endian = REGMAP_ENDIAN_LITTLE;
655 else if (fwnode_property_read_bool(fwnode, propname: "native-endian"))
656 endian = REGMAP_ENDIAN_NATIVE;
657
658 /* If the endianness was specified in fwnode, use that */
659 if (endian != REGMAP_ENDIAN_DEFAULT)
660 return endian;
661
662 /* Retrieve the endianness specification from the bus config */
663 if (bus && bus->val_format_endian_default)
664 endian = bus->val_format_endian_default;
665
666 /* If the bus specified a non-default value, use that */
667 if (endian != REGMAP_ENDIAN_DEFAULT)
668 return endian;
669
670 /* Use this if no other value was found */
671 return REGMAP_ENDIAN_BIG;
672}
673EXPORT_SYMBOL_GPL(regmap_get_val_endian);
674
675struct regmap *__regmap_init(struct device *dev,
676 const struct regmap_bus *bus,
677 void *bus_context,
678 const struct regmap_config *config,
679 struct lock_class_key *lock_key,
680 const char *lock_name)
681{
682 struct regmap *map;
683 int ret = -EINVAL;
684 enum regmap_endian reg_endian, val_endian;
685 int i, j;
686
687 if (!config)
688 goto err;
689
690 map = kzalloc(sizeof(*map), GFP_KERNEL);
691 if (map == NULL) {
692 ret = -ENOMEM;
693 goto err;
694 }
695
696 ret = regmap_set_name(map, config);
697 if (ret)
698 goto err_map;
699
700 ret = -EINVAL; /* Later error paths rely on this */
701
702 if (config->disable_locking) {
703 map->lock = map->unlock = regmap_lock_unlock_none;
704 map->can_sleep = config->can_sleep;
705 regmap_debugfs_disable(map);
706 } else if (config->lock && config->unlock) {
707 map->lock = config->lock;
708 map->unlock = config->unlock;
709 map->lock_arg = config->lock_arg;
710 map->can_sleep = config->can_sleep;
711 } else if (config->use_hwlock) {
712 map->hwlock = hwspin_lock_request_specific(id: config->hwlock_id);
713 if (!map->hwlock) {
714 ret = -ENXIO;
715 goto err_name;
716 }
717
718 switch (config->hwlock_mode) {
719 case HWLOCK_IRQSTATE:
720 map->lock = regmap_lock_hwlock_irqsave;
721 map->unlock = regmap_unlock_hwlock_irqrestore;
722 break;
723 case HWLOCK_IRQ:
724 map->lock = regmap_lock_hwlock_irq;
725 map->unlock = regmap_unlock_hwlock_irq;
726 break;
727 default:
728 map->lock = regmap_lock_hwlock;
729 map->unlock = regmap_unlock_hwlock;
730 break;
731 }
732
733 map->lock_arg = map;
734 } else {
735 if ((bus && bus->fast_io) ||
736 config->fast_io) {
737 if (config->use_raw_spinlock) {
738 raw_spin_lock_init(&map->raw_spinlock);
739 map->lock = regmap_lock_raw_spinlock;
740 map->unlock = regmap_unlock_raw_spinlock;
741 lockdep_set_class_and_name(&map->raw_spinlock,
742 lock_key, lock_name);
743 } else {
744 spin_lock_init(&map->spinlock);
745 map->lock = regmap_lock_spinlock;
746 map->unlock = regmap_unlock_spinlock;
747 lockdep_set_class_and_name(&map->spinlock,
748 lock_key, lock_name);
749 }
750 } else {
751 mutex_init(&map->mutex);
752 map->lock = regmap_lock_mutex;
753 map->unlock = regmap_unlock_mutex;
754 map->can_sleep = true;
755 lockdep_set_class_and_name(&map->mutex,
756 lock_key, lock_name);
757 }
758 map->lock_arg = map;
759 map->lock_key = lock_key;
760 }
761
762 /*
763 * When we write in fast-paths with regmap_bulk_write() don't allocate
764 * scratch buffers with sleeping allocations.
765 */
766 if ((bus && bus->fast_io) || config->fast_io)
767 map->alloc_flags = GFP_ATOMIC;
768 else
769 map->alloc_flags = GFP_KERNEL;
770
771 map->reg_base = config->reg_base;
772 map->reg_shift = config->pad_bits % 8;
773
774 map->format.pad_bytes = config->pad_bits / 8;
775 map->format.reg_shift = config->reg_shift;
776 map->format.reg_bytes = BITS_TO_BYTES(config->reg_bits);
777 map->format.val_bytes = BITS_TO_BYTES(config->val_bits);
778 map->format.buf_size = BITS_TO_BYTES(config->reg_bits + config->val_bits + config->pad_bits);
779 if (config->reg_stride)
780 map->reg_stride = config->reg_stride;
781 else
782 map->reg_stride = 1;
783 if (is_power_of_2(n: map->reg_stride))
784 map->reg_stride_order = ilog2(map->reg_stride);
785 else
786 map->reg_stride_order = -1;
787 map->use_single_read = config->use_single_read || !(config->read || (bus && bus->read));
788 map->use_single_write = config->use_single_write || !(config->write || (bus && bus->write));
789 map->can_multi_write = config->can_multi_write && (config->write || (bus && bus->write));
790 if (bus) {
791 map->max_raw_read = bus->max_raw_read;
792 map->max_raw_write = bus->max_raw_write;
793 } else if (config->max_raw_read && config->max_raw_write) {
794 map->max_raw_read = config->max_raw_read;
795 map->max_raw_write = config->max_raw_write;
796 }
797 map->dev = dev;
798 map->bus = bus;
799 map->bus_context = bus_context;
800 map->max_register = config->max_register;
801 map->max_register_is_set = map->max_register ?: config->max_register_is_0;
802 map->wr_table = config->wr_table;
803 map->rd_table = config->rd_table;
804 map->volatile_table = config->volatile_table;
805 map->precious_table = config->precious_table;
806 map->wr_noinc_table = config->wr_noinc_table;
807 map->rd_noinc_table = config->rd_noinc_table;
808 map->writeable_reg = config->writeable_reg;
809 map->readable_reg = config->readable_reg;
810 map->volatile_reg = config->volatile_reg;
811 map->precious_reg = config->precious_reg;
812 map->writeable_noinc_reg = config->writeable_noinc_reg;
813 map->readable_noinc_reg = config->readable_noinc_reg;
814 map->cache_type = config->cache_type;
815
816 spin_lock_init(&map->async_lock);
817 INIT_LIST_HEAD(list: &map->async_list);
818 INIT_LIST_HEAD(list: &map->async_free);
819 init_waitqueue_head(&map->async_waitq);
820
821 if (config->read_flag_mask ||
822 config->write_flag_mask ||
823 config->zero_flag_mask) {
824 map->read_flag_mask = config->read_flag_mask;
825 map->write_flag_mask = config->write_flag_mask;
826 } else if (bus) {
827 map->read_flag_mask = bus->read_flag_mask;
828 }
829
830 if (config->read && config->write) {
831 map->reg_read = _regmap_bus_read;
832 if (config->reg_update_bits)
833 map->reg_update_bits = config->reg_update_bits;
834
835 /* Bulk read/write */
836 map->read = config->read;
837 map->write = config->write;
838
839 reg_endian = REGMAP_ENDIAN_NATIVE;
840 val_endian = REGMAP_ENDIAN_NATIVE;
841 } else if (!bus) {
842 map->reg_read = config->reg_read;
843 map->reg_write = config->reg_write;
844 map->reg_update_bits = config->reg_update_bits;
845
846 map->defer_caching = false;
847 goto skip_format_initialization;
848 } else if (!bus->read || !bus->write) {
849 map->reg_read = _regmap_bus_reg_read;
850 map->reg_write = _regmap_bus_reg_write;
851 map->reg_update_bits = bus->reg_update_bits;
852
853 map->defer_caching = false;
854 goto skip_format_initialization;
855 } else {
856 map->reg_read = _regmap_bus_read;
857 map->reg_update_bits = bus->reg_update_bits;
858 /* Bulk read/write */
859 map->read = bus->read;
860 map->write = bus->write;
861
862 reg_endian = regmap_get_reg_endian(bus, config);
863 val_endian = regmap_get_val_endian(dev, bus, config);
864 }
865
866 switch (config->reg_bits + map->reg_shift) {
867 case 2:
868 switch (config->val_bits) {
869 case 6:
870 map->format.format_write = regmap_format_2_6_write;
871 break;
872 default:
873 goto err_hwlock;
874 }
875 break;
876
877 case 4:
878 switch (config->val_bits) {
879 case 12:
880 map->format.format_write = regmap_format_4_12_write;
881 break;
882 default:
883 goto err_hwlock;
884 }
885 break;
886
887 case 7:
888 switch (config->val_bits) {
889 case 9:
890 map->format.format_write = regmap_format_7_9_write;
891 break;
892 case 17:
893 map->format.format_write = regmap_format_7_17_write;
894 break;
895 default:
896 goto err_hwlock;
897 }
898 break;
899
900 case 10:
901 switch (config->val_bits) {
902 case 14:
903 map->format.format_write = regmap_format_10_14_write;
904 break;
905 default:
906 goto err_hwlock;
907 }
908 break;
909
910 case 12:
911 switch (config->val_bits) {
912 case 20:
913 map->format.format_write = regmap_format_12_20_write;
914 break;
915 default:
916 goto err_hwlock;
917 }
918 break;
919
920 case 8:
921 map->format.format_reg = regmap_format_8;
922 break;
923
924 case 16:
925 switch (reg_endian) {
926 case REGMAP_ENDIAN_BIG:
927 map->format.format_reg = regmap_format_16_be;
928 break;
929 case REGMAP_ENDIAN_LITTLE:
930 map->format.format_reg = regmap_format_16_le;
931 break;
932 case REGMAP_ENDIAN_NATIVE:
933 map->format.format_reg = regmap_format_16_native;
934 break;
935 default:
936 goto err_hwlock;
937 }
938 break;
939
940 case 24:
941 switch (reg_endian) {
942 case REGMAP_ENDIAN_BIG:
943 map->format.format_reg = regmap_format_24_be;
944 break;
945 default:
946 goto err_hwlock;
947 }
948 break;
949
950 case 32:
951 switch (reg_endian) {
952 case REGMAP_ENDIAN_BIG:
953 map->format.format_reg = regmap_format_32_be;
954 break;
955 case REGMAP_ENDIAN_LITTLE:
956 map->format.format_reg = regmap_format_32_le;
957 break;
958 case REGMAP_ENDIAN_NATIVE:
959 map->format.format_reg = regmap_format_32_native;
960 break;
961 default:
962 goto err_hwlock;
963 }
964 break;
965
966 default:
967 goto err_hwlock;
968 }
969
970 if (val_endian == REGMAP_ENDIAN_NATIVE)
971 map->format.parse_inplace = regmap_parse_inplace_noop;
972
973 switch (config->val_bits) {
974 case 8:
975 map->format.format_val = regmap_format_8;
976 map->format.parse_val = regmap_parse_8;
977 map->format.parse_inplace = regmap_parse_inplace_noop;
978 break;
979 case 16:
980 switch (val_endian) {
981 case REGMAP_ENDIAN_BIG:
982 map->format.format_val = regmap_format_16_be;
983 map->format.parse_val = regmap_parse_16_be;
984 map->format.parse_inplace = regmap_parse_16_be_inplace;
985 break;
986 case REGMAP_ENDIAN_LITTLE:
987 map->format.format_val = regmap_format_16_le;
988 map->format.parse_val = regmap_parse_16_le;
989 map->format.parse_inplace = regmap_parse_16_le_inplace;
990 break;
991 case REGMAP_ENDIAN_NATIVE:
992 map->format.format_val = regmap_format_16_native;
993 map->format.parse_val = regmap_parse_16_native;
994 break;
995 default:
996 goto err_hwlock;
997 }
998 break;
999 case 24:
1000 switch (val_endian) {
1001 case REGMAP_ENDIAN_BIG:
1002 map->format.format_val = regmap_format_24_be;
1003 map->format.parse_val = regmap_parse_24_be;
1004 break;
1005 default:
1006 goto err_hwlock;
1007 }
1008 break;
1009 case 32:
1010 switch (val_endian) {
1011 case REGMAP_ENDIAN_BIG:
1012 map->format.format_val = regmap_format_32_be;
1013 map->format.parse_val = regmap_parse_32_be;
1014 map->format.parse_inplace = regmap_parse_32_be_inplace;
1015 break;
1016 case REGMAP_ENDIAN_LITTLE:
1017 map->format.format_val = regmap_format_32_le;
1018 map->format.parse_val = regmap_parse_32_le;
1019 map->format.parse_inplace = regmap_parse_32_le_inplace;
1020 break;
1021 case REGMAP_ENDIAN_NATIVE:
1022 map->format.format_val = regmap_format_32_native;
1023 map->format.parse_val = regmap_parse_32_native;
1024 break;
1025 default:
1026 goto err_hwlock;
1027 }
1028 break;
1029 }
1030
1031 if (map->format.format_write) {
1032 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
1033 (val_endian != REGMAP_ENDIAN_BIG))
1034 goto err_hwlock;
1035 map->use_single_write = true;
1036 }
1037
1038 if (!map->format.format_write &&
1039 !(map->format.format_reg && map->format.format_val))
1040 goto err_hwlock;
1041
1042 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
1043 if (map->work_buf == NULL) {
1044 ret = -ENOMEM;
1045 goto err_hwlock;
1046 }
1047
1048 if (map->format.format_write) {
1049 map->defer_caching = false;
1050 map->reg_write = _regmap_bus_formatted_write;
1051 } else if (map->format.format_val) {
1052 map->defer_caching = true;
1053 map->reg_write = _regmap_bus_raw_write;
1054 }
1055
1056skip_format_initialization:
1057
1058 map->range_tree = RB_ROOT;
1059 for (i = 0; i < config->num_ranges; i++) {
1060 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
1061 struct regmap_range_node *new;
1062
1063 /* Sanity check */
1064 if (range_cfg->range_max < range_cfg->range_min) {
1065 dev_err(map->dev, "Invalid range %d: %u < %u\n", i,
1066 range_cfg->range_max, range_cfg->range_min);
1067 goto err_range;
1068 }
1069
1070 if (range_cfg->range_max > map->max_register) {
1071 dev_err(map->dev, "Invalid range %d: %u > %u\n", i,
1072 range_cfg->range_max, map->max_register);
1073 goto err_range;
1074 }
1075
1076 if (range_cfg->selector_reg > map->max_register) {
1077 dev_err(map->dev,
1078 "Invalid range %d: selector out of map\n", i);
1079 goto err_range;
1080 }
1081
1082 if (range_cfg->window_len == 0) {
1083 dev_err(map->dev, "Invalid range %d: window_len 0\n",
1084 i);
1085 goto err_range;
1086 }
1087
1088 /* Make sure, that this register range has no selector
1089 or data window within its boundary */
1090 for (j = 0; j < config->num_ranges; j++) {
1091 unsigned int sel_reg = config->ranges[j].selector_reg;
1092 unsigned int win_min = config->ranges[j].window_start;
1093 unsigned int win_max = win_min +
1094 config->ranges[j].window_len - 1;
1095
1096 /* Allow data window inside its own virtual range */
1097 if (j == i)
1098 continue;
1099
1100 if (range_cfg->range_min <= sel_reg &&
1101 sel_reg <= range_cfg->range_max) {
1102 dev_err(map->dev,
1103 "Range %d: selector for %d in window\n",
1104 i, j);
1105 goto err_range;
1106 }
1107
1108 if (!(win_max < range_cfg->range_min ||
1109 win_min > range_cfg->range_max)) {
1110 dev_err(map->dev,
1111 "Range %d: window for %d in window\n",
1112 i, j);
1113 goto err_range;
1114 }
1115 }
1116
1117 new = kzalloc(sizeof(*new), GFP_KERNEL);
1118 if (new == NULL) {
1119 ret = -ENOMEM;
1120 goto err_range;
1121 }
1122
1123 new->map = map;
1124 new->name = range_cfg->name;
1125 new->range_min = range_cfg->range_min;
1126 new->range_max = range_cfg->range_max;
1127 new->selector_reg = range_cfg->selector_reg;
1128 new->selector_mask = range_cfg->selector_mask;
1129 new->selector_shift = range_cfg->selector_shift;
1130 new->window_start = range_cfg->window_start;
1131 new->window_len = range_cfg->window_len;
1132
1133 if (!_regmap_range_add(map, data: new)) {
1134 dev_err(map->dev, "Failed to add range %d\n", i);
1135 kfree(objp: new);
1136 goto err_range;
1137 }
1138
1139 if (map->selector_work_buf == NULL) {
1140 map->selector_work_buf =
1141 kzalloc(map->format.buf_size, GFP_KERNEL);
1142 if (map->selector_work_buf == NULL) {
1143 ret = -ENOMEM;
1144 goto err_range;
1145 }
1146 }
1147 }
1148
1149 ret = regcache_init(map, config);
1150 if (ret != 0)
1151 goto err_range;
1152
1153 if (dev) {
1154 ret = regmap_attach_dev(dev, map, config);
1155 if (ret != 0)
1156 goto err_regcache;
1157 } else {
1158 regmap_debugfs_init(map);
1159 }
1160
1161 return map;
1162
1163err_regcache:
1164 regcache_exit(map);
1165err_range:
1166 regmap_range_exit(map);
1167 kfree(objp: map->work_buf);
1168err_hwlock:
1169 if (map->hwlock)
1170 hwspin_lock_free(hwlock: map->hwlock);
1171err_name:
1172 kfree_const(x: map->name);
1173err_map:
1174 kfree(objp: map);
1175err:
1176 if (bus && bus->free_on_exit)
1177 kfree(objp: bus);
1178 return ERR_PTR(error: ret);
1179}
1180EXPORT_SYMBOL_GPL(__regmap_init);
1181
1182static void devm_regmap_release(struct device *dev, void *res)
1183{
1184 regmap_exit(map: *(struct regmap **)res);
1185}
1186
1187struct regmap *__devm_regmap_init(struct device *dev,
1188 const struct regmap_bus *bus,
1189 void *bus_context,
1190 const struct regmap_config *config,
1191 struct lock_class_key *lock_key,
1192 const char *lock_name)
1193{
1194 struct regmap **ptr, *regmap;
1195
1196 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1197 if (!ptr)
1198 return ERR_PTR(error: -ENOMEM);
1199
1200 regmap = __regmap_init(dev, bus, bus_context, config,
1201 lock_key, lock_name);
1202 if (!IS_ERR(ptr: regmap)) {
1203 *ptr = regmap;
1204 devres_add(dev, res: ptr);
1205 } else {
1206 devres_free(res: ptr);
1207 }
1208
1209 return regmap;
1210}
1211EXPORT_SYMBOL_GPL(__devm_regmap_init);
1212
1213static void regmap_field_init(struct regmap_field *rm_field,
1214 struct regmap *regmap, struct reg_field reg_field)
1215{
1216 rm_field->regmap = regmap;
1217 rm_field->reg = reg_field.reg;
1218 rm_field->shift = reg_field.lsb;
1219 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1220
1221 WARN_ONCE(rm_field->mask == 0, "invalid empty mask defined\n");
1222
1223 rm_field->id_size = reg_field.id_size;
1224 rm_field->id_offset = reg_field.id_offset;
1225}
1226
1227/**
1228 * devm_regmap_field_alloc() - Allocate and initialise a register field.
1229 *
1230 * @dev: Device that will be interacted with
1231 * @regmap: regmap bank in which this register field is located.
1232 * @reg_field: Register field with in the bank.
1233 *
1234 * The return value will be an ERR_PTR() on error or a valid pointer
1235 * to a struct regmap_field. The regmap_field will be automatically freed
1236 * by the device management code.
1237 */
1238struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1239 struct regmap *regmap, struct reg_field reg_field)
1240{
1241 struct regmap_field *rm_field = devm_kzalloc(dev,
1242 size: sizeof(*rm_field), GFP_KERNEL);
1243 if (!rm_field)
1244 return ERR_PTR(error: -ENOMEM);
1245
1246 regmap_field_init(rm_field, regmap, reg_field);
1247
1248 return rm_field;
1249
1250}
1251EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1252
1253
1254/**
1255 * regmap_field_bulk_alloc() - Allocate and initialise a bulk register field.
1256 *
1257 * @regmap: regmap bank in which this register field is located.
1258 * @rm_field: regmap register fields within the bank.
1259 * @reg_field: Register fields within the bank.
1260 * @num_fields: Number of register fields.
1261 *
1262 * The return value will be an -ENOMEM on error or zero for success.
1263 * Newly allocated regmap_fields should be freed by calling
1264 * regmap_field_bulk_free()
1265 */
1266int regmap_field_bulk_alloc(struct regmap *regmap,
1267 struct regmap_field **rm_field,
1268 const struct reg_field *reg_field,
1269 int num_fields)
1270{
1271 struct regmap_field *rf;
1272 int i;
1273
1274 rf = kcalloc(num_fields, sizeof(*rf), GFP_KERNEL);
1275 if (!rf)
1276 return -ENOMEM;
1277
1278 for (i = 0; i < num_fields; i++) {
1279 regmap_field_init(rm_field: &rf[i], regmap, reg_field: reg_field[i]);
1280 rm_field[i] = &rf[i];
1281 }
1282
1283 return 0;
1284}
1285EXPORT_SYMBOL_GPL(regmap_field_bulk_alloc);
1286
1287/**
1288 * devm_regmap_field_bulk_alloc() - Allocate and initialise a bulk register
1289 * fields.
1290 *
1291 * @dev: Device that will be interacted with
1292 * @regmap: regmap bank in which this register field is located.
1293 * @rm_field: regmap register fields within the bank.
1294 * @reg_field: Register fields within the bank.
1295 * @num_fields: Number of register fields.
1296 *
1297 * The return value will be an -ENOMEM on error or zero for success.
1298 * Newly allocated regmap_fields will be automatically freed by the
1299 * device management code.
1300 */
1301int devm_regmap_field_bulk_alloc(struct device *dev,
1302 struct regmap *regmap,
1303 struct regmap_field **rm_field,
1304 const struct reg_field *reg_field,
1305 int num_fields)
1306{
1307 struct regmap_field *rf;
1308 int i;
1309
1310 rf = devm_kcalloc(dev, n: num_fields, size: sizeof(*rf), GFP_KERNEL);
1311 if (!rf)
1312 return -ENOMEM;
1313
1314 for (i = 0; i < num_fields; i++) {
1315 regmap_field_init(rm_field: &rf[i], regmap, reg_field: reg_field[i]);
1316 rm_field[i] = &rf[i];
1317 }
1318
1319 return 0;
1320}
1321EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_alloc);
1322
1323/**
1324 * regmap_field_bulk_free() - Free register field allocated using
1325 * regmap_field_bulk_alloc.
1326 *
1327 * @field: regmap fields which should be freed.
1328 */
1329void regmap_field_bulk_free(struct regmap_field *field)
1330{
1331 kfree(objp: field);
1332}
1333EXPORT_SYMBOL_GPL(regmap_field_bulk_free);
1334
1335/**
1336 * devm_regmap_field_bulk_free() - Free a bulk register field allocated using
1337 * devm_regmap_field_bulk_alloc.
1338 *
1339 * @dev: Device that will be interacted with
1340 * @field: regmap field which should be freed.
1341 *
1342 * Free register field allocated using devm_regmap_field_bulk_alloc(). Usually
1343 * drivers need not call this function, as the memory allocated via devm
1344 * will be freed as per device-driver life-cycle.
1345 */
1346void devm_regmap_field_bulk_free(struct device *dev,
1347 struct regmap_field *field)
1348{
1349 devm_kfree(dev, p: field);
1350}
1351EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_free);
1352
1353/**
1354 * devm_regmap_field_free() - Free a register field allocated using
1355 * devm_regmap_field_alloc.
1356 *
1357 * @dev: Device that will be interacted with
1358 * @field: regmap field which should be freed.
1359 *
1360 * Free register field allocated using devm_regmap_field_alloc(). Usually
1361 * drivers need not call this function, as the memory allocated via devm
1362 * will be freed as per device-driver life-cyle.
1363 */
1364void devm_regmap_field_free(struct device *dev,
1365 struct regmap_field *field)
1366{
1367 devm_kfree(dev, p: field);
1368}
1369EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1370
1371/**
1372 * regmap_field_alloc() - Allocate and initialise a register field.
1373 *
1374 * @regmap: regmap bank in which this register field is located.
1375 * @reg_field: Register field with in the bank.
1376 *
1377 * The return value will be an ERR_PTR() on error or a valid pointer
1378 * to a struct regmap_field. The regmap_field should be freed by the
1379 * user once its finished working with it using regmap_field_free().
1380 */
1381struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1382 struct reg_field reg_field)
1383{
1384 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1385
1386 if (!rm_field)
1387 return ERR_PTR(error: -ENOMEM);
1388
1389 regmap_field_init(rm_field, regmap, reg_field);
1390
1391 return rm_field;
1392}
1393EXPORT_SYMBOL_GPL(regmap_field_alloc);
1394
1395/**
1396 * regmap_field_free() - Free register field allocated using
1397 * regmap_field_alloc.
1398 *
1399 * @field: regmap field which should be freed.
1400 */
1401void regmap_field_free(struct regmap_field *field)
1402{
1403 kfree(objp: field);
1404}
1405EXPORT_SYMBOL_GPL(regmap_field_free);
1406
1407/**
1408 * regmap_reinit_cache() - Reinitialise the current register cache
1409 *
1410 * @map: Register map to operate on.
1411 * @config: New configuration. Only the cache data will be used.
1412 *
1413 * Discard any existing register cache for the map and initialize a
1414 * new cache. This can be used to restore the cache to defaults or to
1415 * update the cache configuration to reflect runtime discovery of the
1416 * hardware.
1417 *
1418 * No explicit locking is done here, the user needs to ensure that
1419 * this function will not race with other calls to regmap.
1420 */
1421int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1422{
1423 int ret;
1424
1425 regcache_exit(map);
1426 regmap_debugfs_exit(map);
1427
1428 map->max_register = config->max_register;
1429 map->max_register_is_set = map->max_register ?: config->max_register_is_0;
1430 map->writeable_reg = config->writeable_reg;
1431 map->readable_reg = config->readable_reg;
1432 map->volatile_reg = config->volatile_reg;
1433 map->precious_reg = config->precious_reg;
1434 map->writeable_noinc_reg = config->writeable_noinc_reg;
1435 map->readable_noinc_reg = config->readable_noinc_reg;
1436 map->cache_type = config->cache_type;
1437
1438 ret = regmap_set_name(map, config);
1439 if (ret)
1440 return ret;
1441
1442 regmap_debugfs_init(map);
1443
1444 map->cache_bypass = false;
1445 map->cache_only = false;
1446
1447 return regcache_init(map, config);
1448}
1449EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1450
1451/**
1452 * regmap_exit() - Free a previously allocated register map
1453 *
1454 * @map: Register map to operate on.
1455 */
1456void regmap_exit(struct regmap *map)
1457{
1458 struct regmap_async *async;
1459
1460 regmap_detach_dev(dev: map->dev, map);
1461 regcache_exit(map);
1462
1463 regmap_debugfs_exit(map);
1464 regmap_range_exit(map);
1465 if (map->bus && map->bus->free_context)
1466 map->bus->free_context(map->bus_context);
1467 kfree(objp: map->work_buf);
1468 while (!list_empty(head: &map->async_free)) {
1469 async = list_first_entry_or_null(&map->async_free,
1470 struct regmap_async,
1471 list);
1472 list_del(entry: &async->list);
1473 kfree(objp: async->work_buf);
1474 kfree(objp: async);
1475 }
1476 if (map->hwlock)
1477 hwspin_lock_free(hwlock: map->hwlock);
1478 if (map->lock == regmap_lock_mutex)
1479 mutex_destroy(lock: &map->mutex);
1480 kfree_const(x: map->name);
1481 kfree(objp: map->patch);
1482 if (map->bus && map->bus->free_on_exit)
1483 kfree(objp: map->bus);
1484 kfree(objp: map);
1485}
1486EXPORT_SYMBOL_GPL(regmap_exit);
1487
1488static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1489{
1490 struct regmap **r = res;
1491 if (!r || !*r) {
1492 WARN_ON(!r || !*r);
1493 return 0;
1494 }
1495
1496 /* If the user didn't specify a name match any */
1497 if (data)
1498 return (*r)->name && !strcmp((*r)->name, data);
1499 else
1500 return 1;
1501}
1502
1503/**
1504 * dev_get_regmap() - Obtain the regmap (if any) for a device
1505 *
1506 * @dev: Device to retrieve the map for
1507 * @name: Optional name for the register map, usually NULL.
1508 *
1509 * Returns the regmap for the device if one is present, or NULL. If
1510 * name is specified then it must match the name specified when
1511 * registering the device, if it is NULL then the first regmap found
1512 * will be used. Devices with multiple register maps are very rare,
1513 * generic code should normally not need to specify a name.
1514 */
1515struct regmap *dev_get_regmap(struct device *dev, const char *name)
1516{
1517 struct regmap **r = devres_find(dev, release: dev_get_regmap_release,
1518 match: dev_get_regmap_match, match_data: (void *)name);
1519
1520 if (!r)
1521 return NULL;
1522 return *r;
1523}
1524EXPORT_SYMBOL_GPL(dev_get_regmap);
1525
1526/**
1527 * regmap_get_device() - Obtain the device from a regmap
1528 *
1529 * @map: Register map to operate on.
1530 *
1531 * Returns the underlying device that the regmap has been created for.
1532 */
1533struct device *regmap_get_device(struct regmap *map)
1534{
1535 return map->dev;
1536}
1537EXPORT_SYMBOL_GPL(regmap_get_device);
1538
1539static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1540 struct regmap_range_node *range,
1541 unsigned int val_num)
1542{
1543 void *orig_work_buf;
1544 unsigned int win_offset;
1545 unsigned int win_page;
1546 bool page_chg;
1547 int ret;
1548
1549 win_offset = (*reg - range->range_min) % range->window_len;
1550 win_page = (*reg - range->range_min) / range->window_len;
1551
1552 if (val_num > 1) {
1553 /* Bulk write shouldn't cross range boundary */
1554 if (*reg + val_num - 1 > range->range_max)
1555 return -EINVAL;
1556
1557 /* ... or single page boundary */
1558 if (val_num > range->window_len - win_offset)
1559 return -EINVAL;
1560 }
1561
1562 /* It is possible to have selector register inside data window.
1563 In that case, selector register is located on every page and
1564 it needs no page switching, when accessed alone. */
1565 if (val_num > 1 ||
1566 range->window_start + win_offset != range->selector_reg) {
1567 /* Use separate work_buf during page switching */
1568 orig_work_buf = map->work_buf;
1569 map->work_buf = map->selector_work_buf;
1570
1571 ret = _regmap_update_bits(map, reg: range->selector_reg,
1572 mask: range->selector_mask,
1573 val: win_page << range->selector_shift,
1574 change: &page_chg, force_write: false);
1575
1576 map->work_buf = orig_work_buf;
1577
1578 if (ret != 0)
1579 return ret;
1580 }
1581
1582 *reg = range->window_start + win_offset;
1583
1584 return 0;
1585}
1586
1587static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes,
1588 unsigned long mask)
1589{
1590 u8 *buf;
1591 int i;
1592
1593 if (!mask || !map->work_buf)
1594 return;
1595
1596 buf = map->work_buf;
1597
1598 for (i = 0; i < max_bytes; i++)
1599 buf[i] |= (mask >> (8 * i)) & 0xff;
1600}
1601
1602static unsigned int regmap_reg_addr(struct regmap *map, unsigned int reg)
1603{
1604 reg += map->reg_base;
1605
1606 if (map->format.reg_shift > 0)
1607 reg >>= map->format.reg_shift;
1608 else if (map->format.reg_shift < 0)
1609 reg <<= -(map->format.reg_shift);
1610
1611 return reg;
1612}
1613
1614static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg,
1615 const void *val, size_t val_len, bool noinc)
1616{
1617 struct regmap_range_node *range;
1618 unsigned long flags;
1619 void *work_val = map->work_buf + map->format.reg_bytes +
1620 map->format.pad_bytes;
1621 void *buf;
1622 int ret = -ENOTSUPP;
1623 size_t len;
1624 int i;
1625
1626 /* Check for unwritable or noinc registers in range
1627 * before we start
1628 */
1629 if (!regmap_writeable_noinc(map, reg)) {
1630 for (i = 0; i < val_len / map->format.val_bytes; i++) {
1631 unsigned int element =
1632 reg + regmap_get_offset(map, index: i);
1633 if (!regmap_writeable(map, reg: element) ||
1634 regmap_writeable_noinc(map, reg: element))
1635 return -EINVAL;
1636 }
1637 }
1638
1639 if (!map->cache_bypass && map->format.parse_val) {
1640 unsigned int ival, offset;
1641 int val_bytes = map->format.val_bytes;
1642
1643 /* Cache the last written value for noinc writes */
1644 i = noinc ? val_len - val_bytes : 0;
1645 for (; i < val_len; i += val_bytes) {
1646 ival = map->format.parse_val(val + i);
1647 offset = noinc ? 0 : regmap_get_offset(map, index: i / val_bytes);
1648 ret = regcache_write(map, reg: reg + offset, value: ival);
1649 if (ret) {
1650 dev_err(map->dev,
1651 "Error in caching of register: %x ret: %d\n",
1652 reg + offset, ret);
1653 return ret;
1654 }
1655 }
1656 if (map->cache_only) {
1657 map->cache_dirty = true;
1658 return 0;
1659 }
1660 }
1661
1662 range = _regmap_range_lookup(map, reg);
1663 if (range) {
1664 int val_num = val_len / map->format.val_bytes;
1665 int win_offset = (reg - range->range_min) % range->window_len;
1666 int win_residue = range->window_len - win_offset;
1667
1668 /* If the write goes beyond the end of the window split it */
1669 while (val_num > win_residue) {
1670 dev_dbg(map->dev, "Writing window %d/%zu\n",
1671 win_residue, val_len / map->format.val_bytes);
1672 ret = _regmap_raw_write_impl(map, reg, val,
1673 val_len: win_residue *
1674 map->format.val_bytes, noinc);
1675 if (ret != 0)
1676 return ret;
1677
1678 reg += win_residue;
1679 val_num -= win_residue;
1680 val += win_residue * map->format.val_bytes;
1681 val_len -= win_residue * map->format.val_bytes;
1682
1683 win_offset = (reg - range->range_min) %
1684 range->window_len;
1685 win_residue = range->window_len - win_offset;
1686 }
1687
1688 ret = _regmap_select_page(map, reg: &reg, range, val_num: noinc ? 1 : val_num);
1689 if (ret != 0)
1690 return ret;
1691 }
1692
1693 reg = regmap_reg_addr(map, reg);
1694 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1695 regmap_set_work_buf_flag_mask(map, max_bytes: map->format.reg_bytes,
1696 mask: map->write_flag_mask);
1697
1698 /*
1699 * Essentially all I/O mechanisms will be faster with a single
1700 * buffer to write. Since register syncs often generate raw
1701 * writes of single registers optimise that case.
1702 */
1703 if (val != work_val && val_len == map->format.val_bytes) {
1704 memcpy(to: work_val, from: val, len: map->format.val_bytes);
1705 val = work_val;
1706 }
1707
1708 if (map->async && map->bus && map->bus->async_write) {
1709 struct regmap_async *async;
1710
1711 trace_regmap_async_write_start(map, reg, count: val_len);
1712
1713 spin_lock_irqsave(&map->async_lock, flags);
1714 async = list_first_entry_or_null(&map->async_free,
1715 struct regmap_async,
1716 list);
1717 if (async)
1718 list_del(entry: &async->list);
1719 spin_unlock_irqrestore(lock: &map->async_lock, flags);
1720
1721 if (!async) {
1722 async = map->bus->async_alloc();
1723 if (!async)
1724 return -ENOMEM;
1725
1726 async->work_buf = kzalloc(map->format.buf_size,
1727 GFP_KERNEL | GFP_DMA);
1728 if (!async->work_buf) {
1729 kfree(objp: async);
1730 return -ENOMEM;
1731 }
1732 }
1733
1734 async->map = map;
1735
1736 /* If the caller supplied the value we can use it safely. */
1737 memcpy(to: async->work_buf, from: map->work_buf, len: map->format.pad_bytes +
1738 map->format.reg_bytes + map->format.val_bytes);
1739
1740 spin_lock_irqsave(&map->async_lock, flags);
1741 list_add_tail(new: &async->list, head: &map->async_list);
1742 spin_unlock_irqrestore(lock: &map->async_lock, flags);
1743
1744 if (val != work_val)
1745 ret = map->bus->async_write(map->bus_context,
1746 async->work_buf,
1747 map->format.reg_bytes +
1748 map->format.pad_bytes,
1749 val, val_len, async);
1750 else
1751 ret = map->bus->async_write(map->bus_context,
1752 async->work_buf,
1753 map->format.reg_bytes +
1754 map->format.pad_bytes +
1755 val_len, NULL, 0, async);
1756
1757 if (ret != 0) {
1758 dev_err(map->dev, "Failed to schedule write: %d\n",
1759 ret);
1760
1761 spin_lock_irqsave(&map->async_lock, flags);
1762 list_move(list: &async->list, head: &map->async_free);
1763 spin_unlock_irqrestore(lock: &map->async_lock, flags);
1764 }
1765
1766 return ret;
1767 }
1768
1769 trace_regmap_hw_write_start(map, reg, count: val_len / map->format.val_bytes);
1770
1771 /* If we're doing a single register write we can probably just
1772 * send the work_buf directly, otherwise try to do a gather
1773 * write.
1774 */
1775 if (val == work_val)
1776 ret = map->write(map->bus_context, map->work_buf,
1777 map->format.reg_bytes +
1778 map->format.pad_bytes +
1779 val_len);
1780 else if (map->bus && map->bus->gather_write)
1781 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1782 map->format.reg_bytes +
1783 map->format.pad_bytes,
1784 val, val_len);
1785 else
1786 ret = -ENOTSUPP;
1787
1788 /* If that didn't work fall back on linearising by hand. */
1789 if (ret == -ENOTSUPP) {
1790 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1791 buf = kzalloc(len, GFP_KERNEL);
1792 if (!buf)
1793 return -ENOMEM;
1794
1795 memcpy(to: buf, from: map->work_buf, len: map->format.reg_bytes);
1796 memcpy(to: buf + map->format.reg_bytes + map->format.pad_bytes,
1797 from: val, len: val_len);
1798 ret = map->write(map->bus_context, buf, len);
1799
1800 kfree(objp: buf);
1801 } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) {
1802 /* regcache_drop_region() takes lock that we already have,
1803 * thus call map->cache_ops->drop() directly
1804 */
1805 if (map->cache_ops && map->cache_ops->drop)
1806 map->cache_ops->drop(map, reg, reg + 1);
1807 }
1808
1809 trace_regmap_hw_write_done(map, reg, count: val_len / map->format.val_bytes);
1810
1811 return ret;
1812}
1813
1814/**
1815 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1816 *
1817 * @map: Map to check.
1818 */
1819bool regmap_can_raw_write(struct regmap *map)
1820{
1821 return map->write && map->format.format_val && map->format.format_reg;
1822}
1823EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1824
1825/**
1826 * regmap_get_raw_read_max - Get the maximum size we can read
1827 *
1828 * @map: Map to check.
1829 */
1830size_t regmap_get_raw_read_max(struct regmap *map)
1831{
1832 return map->max_raw_read;
1833}
1834EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1835
1836/**
1837 * regmap_get_raw_write_max - Get the maximum size we can read
1838 *
1839 * @map: Map to check.
1840 */
1841size_t regmap_get_raw_write_max(struct regmap *map)
1842{
1843 return map->max_raw_write;
1844}
1845EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1846
1847static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1848 unsigned int val)
1849{
1850 int ret;
1851 struct regmap_range_node *range;
1852 struct regmap *map = context;
1853
1854 WARN_ON(!map->format.format_write);
1855
1856 range = _regmap_range_lookup(map, reg);
1857 if (range) {
1858 ret = _regmap_select_page(map, reg: &reg, range, val_num: 1);
1859 if (ret != 0)
1860 return ret;
1861 }
1862
1863 reg = regmap_reg_addr(map, reg);
1864 map->format.format_write(map, reg, val);
1865
1866 trace_regmap_hw_write_start(map, reg, count: 1);
1867
1868 ret = map->write(map->bus_context, map->work_buf, map->format.buf_size);
1869
1870 trace_regmap_hw_write_done(map, reg, count: 1);
1871
1872 return ret;
1873}
1874
1875static int _regmap_bus_reg_write(void *context, unsigned int reg,
1876 unsigned int val)
1877{
1878 struct regmap *map = context;
1879 struct regmap_range_node *range;
1880 int ret;
1881
1882 range = _regmap_range_lookup(map, reg);
1883 if (range) {
1884 ret = _regmap_select_page(map, reg: &reg, range, val_num: 1);
1885 if (ret != 0)
1886 return ret;
1887 }
1888
1889 reg = regmap_reg_addr(map, reg);
1890 return map->bus->reg_write(map->bus_context, reg, val);
1891}
1892
1893static int _regmap_bus_raw_write(void *context, unsigned int reg,
1894 unsigned int val)
1895{
1896 struct regmap *map = context;
1897
1898 WARN_ON(!map->format.format_val);
1899
1900 map->format.format_val(map->work_buf + map->format.reg_bytes
1901 + map->format.pad_bytes, val, 0);
1902 return _regmap_raw_write_impl(map, reg,
1903 val: map->work_buf +
1904 map->format.reg_bytes +
1905 map->format.pad_bytes,
1906 val_len: map->format.val_bytes,
1907 noinc: false);
1908}
1909
1910static inline void *_regmap_map_get_context(struct regmap *map)
1911{
1912 return (map->bus || (!map->bus && map->read)) ? map : map->bus_context;
1913}
1914
1915int _regmap_write(struct regmap *map, unsigned int reg,
1916 unsigned int val)
1917{
1918 int ret;
1919 void *context = _regmap_map_get_context(map);
1920
1921 if (!regmap_writeable(map, reg))
1922 return -EIO;
1923
1924 if (!map->cache_bypass && !map->defer_caching) {
1925 ret = regcache_write(map, reg, value: val);
1926 if (ret != 0)
1927 return ret;
1928 if (map->cache_only) {
1929 map->cache_dirty = true;
1930 return 0;
1931 }
1932 }
1933
1934 ret = map->reg_write(context, reg, val);
1935 if (ret == 0) {
1936 if (regmap_should_log(map))
1937 dev_info(map->dev, "%x <= %x\n", reg, val);
1938
1939 trace_regmap_reg_write(map, reg, val);
1940 }
1941
1942 return ret;
1943}
1944
1945/**
1946 * regmap_write() - Write a value to a single register
1947 *
1948 * @map: Register map to write to
1949 * @reg: Register to write to
1950 * @val: Value to be written
1951 *
1952 * A value of zero will be returned on success, a negative errno will
1953 * be returned in error cases.
1954 */
1955int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1956{
1957 int ret;
1958
1959 if (!IS_ALIGNED(reg, map->reg_stride))
1960 return -EINVAL;
1961
1962 map->lock(map->lock_arg);
1963
1964 ret = _regmap_write(map, reg, val);
1965
1966 map->unlock(map->lock_arg);
1967
1968 return ret;
1969}
1970EXPORT_SYMBOL_GPL(regmap_write);
1971
1972/**
1973 * regmap_write_async() - Write a value to a single register asynchronously
1974 *
1975 * @map: Register map to write to
1976 * @reg: Register to write to
1977 * @val: Value to be written
1978 *
1979 * A value of zero will be returned on success, a negative errno will
1980 * be returned in error cases.
1981 */
1982int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1983{
1984 int ret;
1985
1986 if (!IS_ALIGNED(reg, map->reg_stride))
1987 return -EINVAL;
1988
1989 map->lock(map->lock_arg);
1990
1991 map->async = true;
1992
1993 ret = _regmap_write(map, reg, val);
1994
1995 map->async = false;
1996
1997 map->unlock(map->lock_arg);
1998
1999 return ret;
2000}
2001EXPORT_SYMBOL_GPL(regmap_write_async);
2002
2003int _regmap_raw_write(struct regmap *map, unsigned int reg,
2004 const void *val, size_t val_len, bool noinc)
2005{
2006 size_t val_bytes = map->format.val_bytes;
2007 size_t val_count = val_len / val_bytes;
2008 size_t chunk_count, chunk_bytes;
2009 size_t chunk_regs = val_count;
2010 int ret, i;
2011
2012 if (!val_count)
2013 return -EINVAL;
2014
2015 if (map->use_single_write)
2016 chunk_regs = 1;
2017 else if (map->max_raw_write && val_len > map->max_raw_write)
2018 chunk_regs = map->max_raw_write / val_bytes;
2019
2020 chunk_count = val_count / chunk_regs;
2021 chunk_bytes = chunk_regs * val_bytes;
2022
2023 /* Write as many bytes as possible with chunk_size */
2024 for (i = 0; i < chunk_count; i++) {
2025 ret = _regmap_raw_write_impl(map, reg, val, val_len: chunk_bytes, noinc);
2026 if (ret)
2027 return ret;
2028
2029 reg += regmap_get_offset(map, index: chunk_regs);
2030 val += chunk_bytes;
2031 val_len -= chunk_bytes;
2032 }
2033
2034 /* Write remaining bytes */
2035 if (val_len)
2036 ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc);
2037
2038 return ret;
2039}
2040
2041/**
2042 * regmap_raw_write() - Write raw values to one or more registers
2043 *
2044 * @map: Register map to write to
2045 * @reg: Initial register to write to
2046 * @val: Block of data to be written, laid out for direct transmission to the
2047 * device
2048 * @val_len: Length of data pointed to by val.
2049 *
2050 * This function is intended to be used for things like firmware
2051 * download where a large block of data needs to be transferred to the
2052 * device. No formatting will be done on the data provided.
2053 *
2054 * A value of zero will be returned on success, a negative errno will
2055 * be returned in error cases.
2056 */
2057int regmap_raw_write(struct regmap *map, unsigned int reg,
2058 const void *val, size_t val_len)
2059{
2060 int ret;
2061
2062 if (!regmap_can_raw_write(map))
2063 return -EINVAL;
2064 if (val_len % map->format.val_bytes)
2065 return -EINVAL;
2066
2067 map->lock(map->lock_arg);
2068
2069 ret = _regmap_raw_write(map, reg, val, val_len, noinc: false);
2070
2071 map->unlock(map->lock_arg);
2072
2073 return ret;
2074}
2075EXPORT_SYMBOL_GPL(regmap_raw_write);
2076
2077static int regmap_noinc_readwrite(struct regmap *map, unsigned int reg,
2078 void *val, unsigned int val_len, bool write)
2079{
2080 size_t val_bytes = map->format.val_bytes;
2081 size_t val_count = val_len / val_bytes;
2082 unsigned int lastval;
2083 u8 *u8p;
2084 u16 *u16p;
2085 u32 *u32p;
2086 int ret;
2087 int i;
2088
2089 switch (val_bytes) {
2090 case 1:
2091 u8p = val;
2092 if (write)
2093 lastval = (unsigned int)u8p[val_count - 1];
2094 break;
2095 case 2:
2096 u16p = val;
2097 if (write)
2098 lastval = (unsigned int)u16p[val_count - 1];
2099 break;
2100 case 4:
2101 u32p = val;
2102 if (write)
2103 lastval = (unsigned int)u32p[val_count - 1];
2104 break;
2105 default:
2106 return -EINVAL;
2107 }
2108
2109 /*
2110 * Update the cache with the last value we write, the rest is just
2111 * gone down in the hardware FIFO. We can't cache FIFOs. This makes
2112 * sure a single read from the cache will work.
2113 */
2114 if (write) {
2115 if (!map->cache_bypass && !map->defer_caching) {
2116 ret = regcache_write(map, reg, value: lastval);
2117 if (ret != 0)
2118 return ret;
2119 if (map->cache_only) {
2120 map->cache_dirty = true;
2121 return 0;
2122 }
2123 }
2124 ret = map->bus->reg_noinc_write(map->bus_context, reg, val, val_count);
2125 } else {
2126 ret = map->bus->reg_noinc_read(map->bus_context, reg, val, val_count);
2127 }
2128
2129 if (!ret && regmap_should_log(map)) {
2130 dev_info(map->dev, "%x %s [", reg, write ? "<=" : "=>");
2131 for (i = 0; i < val_count; i++) {
2132 switch (val_bytes) {
2133 case 1:
2134 pr_cont("%x", u8p[i]);
2135 break;
2136 case 2:
2137 pr_cont("%x", u16p[i]);
2138 break;
2139 case 4:
2140 pr_cont("%x", u32p[i]);
2141 break;
2142 default:
2143 break;
2144 }
2145 if (i == (val_count - 1))
2146 pr_cont("]\n");
2147 else
2148 pr_cont(",");
2149 }
2150 }
2151
2152 return 0;
2153}
2154
2155/**
2156 * regmap_noinc_write(): Write data to a register without incrementing the
2157 * register number
2158 *
2159 * @map: Register map to write to
2160 * @reg: Register to write to
2161 * @val: Pointer to data buffer
2162 * @val_len: Length of output buffer in bytes.
2163 *
2164 * The regmap API usually assumes that bulk bus write operations will write a
2165 * range of registers. Some devices have certain registers for which a write
2166 * operation can write to an internal FIFO.
2167 *
2168 * The target register must be volatile but registers after it can be
2169 * completely unrelated cacheable registers.
2170 *
2171 * This will attempt multiple writes as required to write val_len bytes.
2172 *
2173 * A value of zero will be returned on success, a negative errno will be
2174 * returned in error cases.
2175 */
2176int regmap_noinc_write(struct regmap *map, unsigned int reg,
2177 const void *val, size_t val_len)
2178{
2179 size_t write_len;
2180 int ret;
2181
2182 if (!map->write && !(map->bus && map->bus->reg_noinc_write))
2183 return -EINVAL;
2184 if (val_len % map->format.val_bytes)
2185 return -EINVAL;
2186 if (!IS_ALIGNED(reg, map->reg_stride))
2187 return -EINVAL;
2188 if (val_len == 0)
2189 return -EINVAL;
2190
2191 map->lock(map->lock_arg);
2192
2193 if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) {
2194 ret = -EINVAL;
2195 goto out_unlock;
2196 }
2197
2198 /*
2199 * Use the accelerated operation if we can. The val drops the const
2200 * typing in order to facilitate code reuse in regmap_noinc_readwrite().
2201 */
2202 if (map->bus->reg_noinc_write) {
2203 ret = regmap_noinc_readwrite(map, reg, val: (void *)val, val_len, write: true);
2204 goto out_unlock;
2205 }
2206
2207 while (val_len) {
2208 if (map->max_raw_write && map->max_raw_write < val_len)
2209 write_len = map->max_raw_write;
2210 else
2211 write_len = val_len;
2212 ret = _regmap_raw_write(map, reg, val, val_len: write_len, noinc: true);
2213 if (ret)
2214 goto out_unlock;
2215 val = ((u8 *)val) + write_len;
2216 val_len -= write_len;
2217 }
2218
2219out_unlock:
2220 map->unlock(map->lock_arg);
2221 return ret;
2222}
2223EXPORT_SYMBOL_GPL(regmap_noinc_write);
2224
2225/**
2226 * regmap_field_update_bits_base() - Perform a read/modify/write cycle a
2227 * register field.
2228 *
2229 * @field: Register field to write to
2230 * @mask: Bitmask to change
2231 * @val: Value to be written
2232 * @change: Boolean indicating if a write was done
2233 * @async: Boolean indicating asynchronously
2234 * @force: Boolean indicating use force update
2235 *
2236 * Perform a read/modify/write cycle on the register field with change,
2237 * async, force option.
2238 *
2239 * A value of zero will be returned on success, a negative errno will
2240 * be returned in error cases.
2241 */
2242int regmap_field_update_bits_base(struct regmap_field *field,
2243 unsigned int mask, unsigned int val,
2244 bool *change, bool async, bool force)
2245{
2246 mask = (mask << field->shift) & field->mask;
2247
2248 return regmap_update_bits_base(map: field->regmap, reg: field->reg,
2249 mask, val: val << field->shift,
2250 change, async, force);
2251}
2252EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
2253
2254/**
2255 * regmap_field_test_bits() - Check if all specified bits are set in a
2256 * register field.
2257 *
2258 * @field: Register field to operate on
2259 * @bits: Bits to test
2260 *
2261 * Returns negative errno if the underlying regmap_field_read() fails,
2262 * 0 if at least one of the tested bits is not set and 1 if all tested
2263 * bits are set.
2264 */
2265int regmap_field_test_bits(struct regmap_field *field, unsigned int bits)
2266{
2267 unsigned int val;
2268 int ret;
2269
2270 ret = regmap_field_read(field, val: &val);
2271 if (ret)
2272 return ret;
2273
2274 return (val & bits) == bits;
2275}
2276EXPORT_SYMBOL_GPL(regmap_field_test_bits);
2277
2278/**
2279 * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a
2280 * register field with port ID
2281 *
2282 * @field: Register field to write to
2283 * @id: port ID
2284 * @mask: Bitmask to change
2285 * @val: Value to be written
2286 * @change: Boolean indicating if a write was done
2287 * @async: Boolean indicating asynchronously
2288 * @force: Boolean indicating use force update
2289 *
2290 * A value of zero will be returned on success, a negative errno will
2291 * be returned in error cases.
2292 */
2293int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
2294 unsigned int mask, unsigned int val,
2295 bool *change, bool async, bool force)
2296{
2297 if (id >= field->id_size)
2298 return -EINVAL;
2299
2300 mask = (mask << field->shift) & field->mask;
2301
2302 return regmap_update_bits_base(map: field->regmap,
2303 reg: field->reg + (field->id_offset * id),
2304 mask, val: val << field->shift,
2305 change, async, force);
2306}
2307EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
2308
2309/**
2310 * regmap_bulk_write() - Write multiple registers to the device
2311 *
2312 * @map: Register map to write to
2313 * @reg: First register to be write from
2314 * @val: Block of data to be written, in native register size for device
2315 * @val_count: Number of registers to write
2316 *
2317 * This function is intended to be used for writing a large block of
2318 * data to the device either in single transfer or multiple transfer.
2319 *
2320 * A value of zero will be returned on success, a negative errno will
2321 * be returned in error cases.
2322 */
2323int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
2324 size_t val_count)
2325{
2326 int ret = 0, i;
2327 size_t val_bytes = map->format.val_bytes;
2328
2329 if (!IS_ALIGNED(reg, map->reg_stride))
2330 return -EINVAL;
2331
2332 /*
2333 * Some devices don't support bulk write, for them we have a series of
2334 * single write operations.
2335 */
2336 if (!map->write || !map->format.parse_inplace) {
2337 map->lock(map->lock_arg);
2338 for (i = 0; i < val_count; i++) {
2339 unsigned int ival;
2340
2341 switch (val_bytes) {
2342 case 1:
2343 ival = *(u8 *)(val + (i * val_bytes));
2344 break;
2345 case 2:
2346 ival = *(u16 *)(val + (i * val_bytes));
2347 break;
2348 case 4:
2349 ival = *(u32 *)(val + (i * val_bytes));
2350 break;
2351 default:
2352 ret = -EINVAL;
2353 goto out;
2354 }
2355
2356 ret = _regmap_write(map,
2357 reg: reg + regmap_get_offset(map, index: i),
2358 val: ival);
2359 if (ret != 0)
2360 goto out;
2361 }
2362out:
2363 map->unlock(map->lock_arg);
2364 } else {
2365 void *wval;
2366
2367 wval = kmemdup_array(src: val, count: val_count, element_size: val_bytes, gfp: map->alloc_flags);
2368 if (!wval)
2369 return -ENOMEM;
2370
2371 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2372 map->format.parse_inplace(wval + i);
2373
2374 ret = regmap_raw_write(map, reg, wval, val_bytes * val_count);
2375
2376 kfree(objp: wval);
2377 }
2378
2379 if (!ret)
2380 trace_regmap_bulk_write(map, reg, val, val_len: val_bytes * val_count);
2381
2382 return ret;
2383}
2384EXPORT_SYMBOL_GPL(regmap_bulk_write);
2385
2386/*
2387 * _regmap_raw_multi_reg_write()
2388 *
2389 * the (register,newvalue) pairs in regs have not been formatted, but
2390 * they are all in the same page and have been changed to being page
2391 * relative. The page register has been written if that was necessary.
2392 */
2393static int _regmap_raw_multi_reg_write(struct regmap *map,
2394 const struct reg_sequence *regs,
2395 size_t num_regs)
2396{
2397 int ret;
2398 void *buf;
2399 int i;
2400 u8 *u8;
2401 size_t val_bytes = map->format.val_bytes;
2402 size_t reg_bytes = map->format.reg_bytes;
2403 size_t pad_bytes = map->format.pad_bytes;
2404 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
2405 size_t len = pair_size * num_regs;
2406
2407 if (!len)
2408 return -EINVAL;
2409
2410 buf = kzalloc(len, GFP_KERNEL);
2411 if (!buf)
2412 return -ENOMEM;
2413
2414 /* We have to linearise by hand. */
2415
2416 u8 = buf;
2417
2418 for (i = 0; i < num_regs; i++) {
2419 unsigned int reg = regs[i].reg;
2420 unsigned int val = regs[i].def;
2421 trace_regmap_hw_write_start(map, reg, count: 1);
2422 reg = regmap_reg_addr(map, reg);
2423 map->format.format_reg(u8, reg, map->reg_shift);
2424 u8 += reg_bytes + pad_bytes;
2425 map->format.format_val(u8, val, 0);
2426 u8 += val_bytes;
2427 }
2428 u8 = buf;
2429 *u8 |= map->write_flag_mask;
2430
2431 ret = map->write(map->bus_context, buf, len);
2432
2433 kfree(objp: buf);
2434
2435 for (i = 0; i < num_regs; i++) {
2436 int reg = regs[i].reg;
2437 trace_regmap_hw_write_done(map, reg, count: 1);
2438 }
2439 return ret;
2440}
2441
2442static unsigned int _regmap_register_page(struct regmap *map,
2443 unsigned int reg,
2444 struct regmap_range_node *range)
2445{
2446 unsigned int win_page = (reg - range->range_min) / range->window_len;
2447
2448 return win_page;
2449}
2450
2451static int _regmap_range_multi_paged_reg_write(struct regmap *map,
2452 struct reg_sequence *regs,
2453 size_t num_regs)
2454{
2455 int ret;
2456 int i, n;
2457 struct reg_sequence *base;
2458 unsigned int this_page = 0;
2459 unsigned int page_change = 0;
2460 /*
2461 * the set of registers are not neccessarily in order, but
2462 * since the order of write must be preserved this algorithm
2463 * chops the set each time the page changes. This also applies
2464 * if there is a delay required at any point in the sequence.
2465 */
2466 base = regs;
2467 for (i = 0, n = 0; i < num_regs; i++, n++) {
2468 unsigned int reg = regs[i].reg;
2469 struct regmap_range_node *range;
2470
2471 range = _regmap_range_lookup(map, reg);
2472 if (range) {
2473 unsigned int win_page = _regmap_register_page(map, reg,
2474 range);
2475
2476 if (i == 0)
2477 this_page = win_page;
2478 if (win_page != this_page) {
2479 this_page = win_page;
2480 page_change = 1;
2481 }
2482 }
2483
2484 /* If we have both a page change and a delay make sure to
2485 * write the regs and apply the delay before we change the
2486 * page.
2487 */
2488
2489 if (page_change || regs[i].delay_us) {
2490
2491 /* For situations where the first write requires
2492 * a delay we need to make sure we don't call
2493 * raw_multi_reg_write with n=0
2494 * This can't occur with page breaks as we
2495 * never write on the first iteration
2496 */
2497 if (regs[i].delay_us && i == 0)
2498 n = 1;
2499
2500 ret = _regmap_raw_multi_reg_write(map, regs: base, num_regs: n);
2501 if (ret != 0)
2502 return ret;
2503
2504 if (regs[i].delay_us) {
2505 if (map->can_sleep)
2506 fsleep(usecs: regs[i].delay_us);
2507 else
2508 udelay(usec: regs[i].delay_us);
2509 }
2510
2511 base += n;
2512 n = 0;
2513
2514 if (page_change) {
2515 ret = _regmap_select_page(map,
2516 reg: &base[n].reg,
2517 range, val_num: 1);
2518 if (ret != 0)
2519 return ret;
2520
2521 page_change = 0;
2522 }
2523
2524 }
2525
2526 }
2527 if (n > 0)
2528 return _regmap_raw_multi_reg_write(map, regs: base, num_regs: n);
2529 return 0;
2530}
2531
2532static int _regmap_multi_reg_write(struct regmap *map,
2533 const struct reg_sequence *regs,
2534 size_t num_regs)
2535{
2536 int i;
2537 int ret;
2538
2539 if (!map->can_multi_write) {
2540 for (i = 0; i < num_regs; i++) {
2541 ret = _regmap_write(map, reg: regs[i].reg, val: regs[i].def);
2542 if (ret != 0)
2543 return ret;
2544
2545 if (regs[i].delay_us) {
2546 if (map->can_sleep)
2547 fsleep(usecs: regs[i].delay_us);
2548 else
2549 udelay(usec: regs[i].delay_us);
2550 }
2551 }
2552 return 0;
2553 }
2554
2555 if (!map->format.parse_inplace)
2556 return -EINVAL;
2557
2558 if (map->writeable_reg)
2559 for (i = 0; i < num_regs; i++) {
2560 int reg = regs[i].reg;
2561 if (!map->writeable_reg(map->dev, reg))
2562 return -EINVAL;
2563 if (!IS_ALIGNED(reg, map->reg_stride))
2564 return -EINVAL;
2565 }
2566
2567 if (!map->cache_bypass) {
2568 for (i = 0; i < num_regs; i++) {
2569 unsigned int val = regs[i].def;
2570 unsigned int reg = regs[i].reg;
2571 ret = regcache_write(map, reg, value: val);
2572 if (ret) {
2573 dev_err(map->dev,
2574 "Error in caching of register: %x ret: %d\n",
2575 reg, ret);
2576 return ret;
2577 }
2578 }
2579 if (map->cache_only) {
2580 map->cache_dirty = true;
2581 return 0;
2582 }
2583 }
2584
2585 WARN_ON(!map->bus);
2586
2587 for (i = 0; i < num_regs; i++) {
2588 unsigned int reg = regs[i].reg;
2589 struct regmap_range_node *range;
2590
2591 /* Coalesce all the writes between a page break or a delay
2592 * in a sequence
2593 */
2594 range = _regmap_range_lookup(map, reg);
2595 if (range || regs[i].delay_us) {
2596 size_t len = sizeof(struct reg_sequence)*num_regs;
2597 struct reg_sequence *base = kmemdup(regs, len,
2598 GFP_KERNEL);
2599 if (!base)
2600 return -ENOMEM;
2601 ret = _regmap_range_multi_paged_reg_write(map, regs: base,
2602 num_regs);
2603 kfree(objp: base);
2604
2605 return ret;
2606 }
2607 }
2608 return _regmap_raw_multi_reg_write(map, regs, num_regs);
2609}
2610
2611/**
2612 * regmap_multi_reg_write() - Write multiple registers to the device
2613 *
2614 * @map: Register map to write to
2615 * @regs: Array of structures containing register,value to be written
2616 * @num_regs: Number of registers to write
2617 *
2618 * Write multiple registers to the device where the set of register, value
2619 * pairs are supplied in any order, possibly not all in a single range.
2620 *
2621 * The 'normal' block write mode will send ultimately send data on the
2622 * target bus as R,V1,V2,V3,..,Vn where successively higher registers are
2623 * addressed. However, this alternative block multi write mode will send
2624 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2625 * must of course support the mode.
2626 *
2627 * A value of zero will be returned on success, a negative errno will be
2628 * returned in error cases.
2629 */
2630int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2631 int num_regs)
2632{
2633 int ret;
2634
2635 map->lock(map->lock_arg);
2636
2637 ret = _regmap_multi_reg_write(map, regs, num_regs);
2638
2639 map->unlock(map->lock_arg);
2640
2641 return ret;
2642}
2643EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2644
2645/**
2646 * regmap_multi_reg_write_bypassed() - Write multiple registers to the
2647 * device but not the cache
2648 *
2649 * @map: Register map to write to
2650 * @regs: Array of structures containing register,value to be written
2651 * @num_regs: Number of registers to write
2652 *
2653 * Write multiple registers to the device but not the cache where the set
2654 * of register are supplied in any order.
2655 *
2656 * This function is intended to be used for writing a large block of data
2657 * atomically to the device in single transfer for those I2C client devices
2658 * that implement this alternative block write mode.
2659 *
2660 * A value of zero will be returned on success, a negative errno will
2661 * be returned in error cases.
2662 */
2663int regmap_multi_reg_write_bypassed(struct regmap *map,
2664 const struct reg_sequence *regs,
2665 int num_regs)
2666{
2667 int ret;
2668 bool bypass;
2669
2670 map->lock(map->lock_arg);
2671
2672 bypass = map->cache_bypass;
2673 map->cache_bypass = true;
2674
2675 ret = _regmap_multi_reg_write(map, regs, num_regs);
2676
2677 map->cache_bypass = bypass;
2678
2679 map->unlock(map->lock_arg);
2680
2681 return ret;
2682}
2683EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2684
2685/**
2686 * regmap_raw_write_async() - Write raw values to one or more registers
2687 * asynchronously
2688 *
2689 * @map: Register map to write to
2690 * @reg: Initial register to write to
2691 * @val: Block of data to be written, laid out for direct transmission to the
2692 * device. Must be valid until regmap_async_complete() is called.
2693 * @val_len: Length of data pointed to by val.
2694 *
2695 * This function is intended to be used for things like firmware
2696 * download where a large block of data needs to be transferred to the
2697 * device. No formatting will be done on the data provided.
2698 *
2699 * If supported by the underlying bus the write will be scheduled
2700 * asynchronously, helping maximise I/O speed on higher speed buses
2701 * like SPI. regmap_async_complete() can be called to ensure that all
2702 * asynchrnous writes have been completed.
2703 *
2704 * A value of zero will be returned on success, a negative errno will
2705 * be returned in error cases.
2706 */
2707int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2708 const void *val, size_t val_len)
2709{
2710 int ret;
2711
2712 if (val_len % map->format.val_bytes)
2713 return -EINVAL;
2714 if (!IS_ALIGNED(reg, map->reg_stride))
2715 return -EINVAL;
2716
2717 map->lock(map->lock_arg);
2718
2719 map->async = true;
2720
2721 ret = _regmap_raw_write(map, reg, val, val_len, noinc: false);
2722
2723 map->async = false;
2724
2725 map->unlock(map->lock_arg);
2726
2727 return ret;
2728}
2729EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2730
2731static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2732 unsigned int val_len, bool noinc)
2733{
2734 struct regmap_range_node *range;
2735 int ret;
2736
2737 if (!map->read)
2738 return -EINVAL;
2739
2740 range = _regmap_range_lookup(map, reg);
2741 if (range) {
2742 ret = _regmap_select_page(map, reg: &reg, range,
2743 val_num: noinc ? 1 : val_len / map->format.val_bytes);
2744 if (ret != 0)
2745 return ret;
2746 }
2747
2748 reg = regmap_reg_addr(map, reg);
2749 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2750 regmap_set_work_buf_flag_mask(map, max_bytes: map->format.reg_bytes,
2751 mask: map->read_flag_mask);
2752 trace_regmap_hw_read_start(map, reg, count: val_len / map->format.val_bytes);
2753
2754 ret = map->read(map->bus_context, map->work_buf,
2755 map->format.reg_bytes + map->format.pad_bytes,
2756 val, val_len);
2757
2758 trace_regmap_hw_read_done(map, reg, count: val_len / map->format.val_bytes);
2759
2760 return ret;
2761}
2762
2763static int _regmap_bus_reg_read(void *context, unsigned int reg,
2764 unsigned int *val)
2765{
2766 struct regmap *map = context;
2767 struct regmap_range_node *range;
2768 int ret;
2769
2770 range = _regmap_range_lookup(map, reg);
2771 if (range) {
2772 ret = _regmap_select_page(map, reg: &reg, range, val_num: 1);
2773 if (ret != 0)
2774 return ret;
2775 }
2776
2777 reg = regmap_reg_addr(map, reg);
2778 return map->bus->reg_read(map->bus_context, reg, val);
2779}
2780
2781static int _regmap_bus_read(void *context, unsigned int reg,
2782 unsigned int *val)
2783{
2784 int ret;
2785 struct regmap *map = context;
2786 void *work_val = map->work_buf + map->format.reg_bytes +
2787 map->format.pad_bytes;
2788
2789 if (!map->format.parse_val)
2790 return -EINVAL;
2791
2792 ret = _regmap_raw_read(map, reg, val: work_val, val_len: map->format.val_bytes, noinc: false);
2793 if (ret == 0)
2794 *val = map->format.parse_val(work_val);
2795
2796 return ret;
2797}
2798
2799static int _regmap_read(struct regmap *map, unsigned int reg,
2800 unsigned int *val)
2801{
2802 int ret;
2803 void *context = _regmap_map_get_context(map);
2804
2805 if (!map->cache_bypass) {
2806 ret = regcache_read(map, reg, value: val);
2807 if (ret == 0)
2808 return 0;
2809 }
2810
2811 if (map->cache_only)
2812 return -EBUSY;
2813
2814 if (!regmap_readable(map, reg))
2815 return -EIO;
2816
2817 ret = map->reg_read(context, reg, val);
2818 if (ret == 0) {
2819 if (regmap_should_log(map))
2820 dev_info(map->dev, "%x => %x\n", reg, *val);
2821
2822 trace_regmap_reg_read(map, reg, val: *val);
2823
2824 if (!map->cache_bypass)
2825 regcache_write(map, reg, value: *val);
2826 }
2827
2828 return ret;
2829}
2830
2831/**
2832 * regmap_read() - Read a value from a single register
2833 *
2834 * @map: Register map to read from
2835 * @reg: Register to be read from
2836 * @val: Pointer to store read value
2837 *
2838 * A value of zero will be returned on success, a negative errno will
2839 * be returned in error cases.
2840 */
2841int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2842{
2843 int ret;
2844
2845 if (!IS_ALIGNED(reg, map->reg_stride))
2846 return -EINVAL;
2847
2848 map->lock(map->lock_arg);
2849
2850 ret = _regmap_read(map, reg, val);
2851
2852 map->unlock(map->lock_arg);
2853
2854 return ret;
2855}
2856EXPORT_SYMBOL_GPL(regmap_read);
2857
2858/**
2859 * regmap_read_bypassed() - Read a value from a single register direct
2860 * from the device, bypassing the cache
2861 *
2862 * @map: Register map to read from
2863 * @reg: Register to be read from
2864 * @val: Pointer to store read value
2865 *
2866 * A value of zero will be returned on success, a negative errno will
2867 * be returned in error cases.
2868 */
2869int regmap_read_bypassed(struct regmap *map, unsigned int reg, unsigned int *val)
2870{
2871 int ret;
2872 bool bypass, cache_only;
2873
2874 if (!IS_ALIGNED(reg, map->reg_stride))
2875 return -EINVAL;
2876
2877 map->lock(map->lock_arg);
2878
2879 bypass = map->cache_bypass;
2880 cache_only = map->cache_only;
2881 map->cache_bypass = true;
2882 map->cache_only = false;
2883
2884 ret = _regmap_read(map, reg, val);
2885
2886 map->cache_bypass = bypass;
2887 map->cache_only = cache_only;
2888
2889 map->unlock(map->lock_arg);
2890
2891 return ret;
2892}
2893EXPORT_SYMBOL_GPL(regmap_read_bypassed);
2894
2895/**
2896 * regmap_raw_read() - Read raw data from the device
2897 *
2898 * @map: Register map to read from
2899 * @reg: First register to be read from
2900 * @val: Pointer to store read value
2901 * @val_len: Size of data to read
2902 *
2903 * A value of zero will be returned on success, a negative errno will
2904 * be returned in error cases.
2905 */
2906int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2907 size_t val_len)
2908{
2909 size_t val_bytes = map->format.val_bytes;
2910 size_t val_count = val_len / val_bytes;
2911 unsigned int v;
2912 int ret, i;
2913
2914 if (val_len % map->format.val_bytes)
2915 return -EINVAL;
2916 if (!IS_ALIGNED(reg, map->reg_stride))
2917 return -EINVAL;
2918 if (val_count == 0)
2919 return -EINVAL;
2920
2921 map->lock(map->lock_arg);
2922
2923 if (regmap_volatile_range(map, reg, num: val_count) || map->cache_bypass ||
2924 map->cache_type == REGCACHE_NONE) {
2925 size_t chunk_count, chunk_bytes;
2926 size_t chunk_regs = val_count;
2927
2928 if (!map->cache_bypass && map->cache_only) {
2929 ret = -EBUSY;
2930 goto out;
2931 }
2932
2933 if (!map->read) {
2934 ret = -ENOTSUPP;
2935 goto out;
2936 }
2937
2938 if (map->use_single_read)
2939 chunk_regs = 1;
2940 else if (map->max_raw_read && val_len > map->max_raw_read)
2941 chunk_regs = map->max_raw_read / val_bytes;
2942
2943 chunk_count = val_count / chunk_regs;
2944 chunk_bytes = chunk_regs * val_bytes;
2945
2946 /* Read bytes that fit into whole chunks */
2947 for (i = 0; i < chunk_count; i++) {
2948 ret = _regmap_raw_read(map, reg, val, val_len: chunk_bytes, noinc: false);
2949 if (ret != 0)
2950 goto out;
2951
2952 reg += regmap_get_offset(map, index: chunk_regs);
2953 val += chunk_bytes;
2954 val_len -= chunk_bytes;
2955 }
2956
2957 /* Read remaining bytes */
2958 if (val_len) {
2959 ret = _regmap_raw_read(map, reg, val, val_len, noinc: false);
2960 if (ret != 0)
2961 goto out;
2962 }
2963 } else {
2964 /* Otherwise go word by word for the cache; should be low
2965 * cost as we expect to hit the cache.
2966 */
2967 for (i = 0; i < val_count; i++) {
2968 ret = _regmap_read(map, reg: reg + regmap_get_offset(map, index: i),
2969 val: &v);
2970 if (ret != 0)
2971 goto out;
2972
2973 map->format.format_val(val + (i * val_bytes), v, 0);
2974 }
2975 }
2976
2977 out:
2978 map->unlock(map->lock_arg);
2979
2980 return ret;
2981}
2982EXPORT_SYMBOL_GPL(regmap_raw_read);
2983
2984/**
2985 * regmap_noinc_read(): Read data from a register without incrementing the
2986 * register number
2987 *
2988 * @map: Register map to read from
2989 * @reg: Register to read from
2990 * @val: Pointer to data buffer
2991 * @val_len: Length of output buffer in bytes.
2992 *
2993 * The regmap API usually assumes that bulk read operations will read a
2994 * range of registers. Some devices have certain registers for which a read
2995 * operation read will read from an internal FIFO.
2996 *
2997 * The target register must be volatile but registers after it can be
2998 * completely unrelated cacheable registers.
2999 *
3000 * This will attempt multiple reads as required to read val_len bytes.
3001 *
3002 * A value of zero will be returned on success, a negative errno will be
3003 * returned in error cases.
3004 */
3005int regmap_noinc_read(struct regmap *map, unsigned int reg,
3006 void *val, size_t val_len)
3007{
3008 size_t read_len;
3009 int ret;
3010
3011 if (!map->read)
3012 return -ENOTSUPP;
3013
3014 if (val_len % map->format.val_bytes)
3015 return -EINVAL;
3016 if (!IS_ALIGNED(reg, map->reg_stride))
3017 return -EINVAL;
3018 if (val_len == 0)
3019 return -EINVAL;
3020
3021 map->lock(map->lock_arg);
3022
3023 if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) {
3024 ret = -EINVAL;
3025 goto out_unlock;
3026 }
3027
3028 /*
3029 * We have not defined the FIFO semantics for cache, as the
3030 * cache is just one value deep. Should we return the last
3031 * written value? Just avoid this by always reading the FIFO
3032 * even when using cache. Cache only will not work.
3033 */
3034 if (!map->cache_bypass && map->cache_only) {
3035 ret = -EBUSY;
3036 goto out_unlock;
3037 }
3038
3039 /* Use the accelerated operation if we can */
3040 if (map->bus->reg_noinc_read) {
3041 ret = regmap_noinc_readwrite(map, reg, val, val_len, write: false);
3042 goto out_unlock;
3043 }
3044
3045 while (val_len) {
3046 if (map->max_raw_read && map->max_raw_read < val_len)
3047 read_len = map->max_raw_read;
3048 else
3049 read_len = val_len;
3050 ret = _regmap_raw_read(map, reg, val, val_len: read_len, noinc: true);
3051 if (ret)
3052 goto out_unlock;
3053 val = ((u8 *)val) + read_len;
3054 val_len -= read_len;
3055 }
3056
3057out_unlock:
3058 map->unlock(map->lock_arg);
3059 return ret;
3060}
3061EXPORT_SYMBOL_GPL(regmap_noinc_read);
3062
3063/**
3064 * regmap_field_read(): Read a value to a single register field
3065 *
3066 * @field: Register field to read from
3067 * @val: Pointer to store read value
3068 *
3069 * A value of zero will be returned on success, a negative errno will
3070 * be returned in error cases.
3071 */
3072int regmap_field_read(struct regmap_field *field, unsigned int *val)
3073{
3074 int ret;
3075 unsigned int reg_val;
3076 ret = regmap_read(field->regmap, field->reg, &reg_val);
3077 if (ret != 0)
3078 return ret;
3079
3080 reg_val &= field->mask;
3081 reg_val >>= field->shift;
3082 *val = reg_val;
3083
3084 return ret;
3085}
3086EXPORT_SYMBOL_GPL(regmap_field_read);
3087
3088/**
3089 * regmap_fields_read() - Read a value to a single register field with port ID
3090 *
3091 * @field: Register field to read from
3092 * @id: port ID
3093 * @val: Pointer to store read value
3094 *
3095 * A value of zero will be returned on success, a negative errno will
3096 * be returned in error cases.
3097 */
3098int regmap_fields_read(struct regmap_field *field, unsigned int id,
3099 unsigned int *val)
3100{
3101 int ret;
3102 unsigned int reg_val;
3103
3104 if (id >= field->id_size)
3105 return -EINVAL;
3106
3107 ret = regmap_read(field->regmap,
3108 field->reg + (field->id_offset * id),
3109 &reg_val);
3110 if (ret != 0)
3111 return ret;
3112
3113 reg_val &= field->mask;
3114 reg_val >>= field->shift;
3115 *val = reg_val;
3116
3117 return ret;
3118}
3119EXPORT_SYMBOL_GPL(regmap_fields_read);
3120
3121static int _regmap_bulk_read(struct regmap *map, unsigned int reg,
3122 const unsigned int *regs, void *val, size_t val_count)
3123{
3124 u32 *u32 = val;
3125 u16 *u16 = val;
3126 u8 *u8 = val;
3127 int ret, i;
3128
3129 map->lock(map->lock_arg);
3130
3131 for (i = 0; i < val_count; i++) {
3132 unsigned int ival;
3133
3134 if (regs) {
3135 if (!IS_ALIGNED(regs[i], map->reg_stride)) {
3136 ret = -EINVAL;
3137 goto out;
3138 }
3139 ret = _regmap_read(map, reg: regs[i], val: &ival);
3140 } else {
3141 ret = _regmap_read(map, reg: reg + regmap_get_offset(map, index: i), val: &ival);
3142 }
3143 if (ret != 0)
3144 goto out;
3145
3146 switch (map->format.val_bytes) {
3147 case 4:
3148 u32[i] = ival;
3149 break;
3150 case 2:
3151 u16[i] = ival;
3152 break;
3153 case 1:
3154 u8[i] = ival;
3155 break;
3156 default:
3157 ret = -EINVAL;
3158 goto out;
3159 }
3160 }
3161out:
3162 map->unlock(map->lock_arg);
3163 return ret;
3164}
3165
3166/**
3167 * regmap_bulk_read() - Read multiple sequential registers from the device
3168 *
3169 * @map: Register map to read from
3170 * @reg: First register to be read from
3171 * @val: Pointer to store read value, in native register size for device
3172 * @val_count: Number of registers to read
3173 *
3174 * A value of zero will be returned on success, a negative errno will
3175 * be returned in error cases.
3176 */
3177int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
3178 size_t val_count)
3179{
3180 int ret, i;
3181 size_t val_bytes = map->format.val_bytes;
3182 bool vol = regmap_volatile_range(map, reg, num: val_count);
3183
3184 if (!IS_ALIGNED(reg, map->reg_stride))
3185 return -EINVAL;
3186 if (val_count == 0)
3187 return -EINVAL;
3188
3189 if (map->read && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
3190 ret = regmap_raw_read(map, reg, val, val_bytes * val_count);
3191 if (ret != 0)
3192 return ret;
3193
3194 for (i = 0; i < val_count * val_bytes; i += val_bytes)
3195 map->format.parse_inplace(val + i);
3196 } else {
3197 ret = _regmap_bulk_read(map, reg, NULL, val, val_count);
3198 }
3199 if (!ret)
3200 trace_regmap_bulk_read(map, reg, val, val_len: val_bytes * val_count);
3201 return ret;
3202}
3203EXPORT_SYMBOL_GPL(regmap_bulk_read);
3204
3205/**
3206 * regmap_multi_reg_read() - Read multiple non-sequential registers from the device
3207 *
3208 * @map: Register map to read from
3209 * @regs: Array of registers to read from
3210 * @val: Pointer to store read value, in native register size for device
3211 * @val_count: Number of registers to read
3212 *
3213 * A value of zero will be returned on success, a negative errno will
3214 * be returned in error cases.
3215 */
3216int regmap_multi_reg_read(struct regmap *map, const unsigned int *regs, void *val,
3217 size_t val_count)
3218{
3219 if (val_count == 0)
3220 return -EINVAL;
3221
3222 return _regmap_bulk_read(map, reg: 0, regs, val, val_count);
3223}
3224EXPORT_SYMBOL_GPL(regmap_multi_reg_read);
3225
3226static int _regmap_update_bits(struct regmap *map, unsigned int reg,
3227 unsigned int mask, unsigned int val,
3228 bool *change, bool force_write)
3229{
3230 int ret;
3231 unsigned int tmp, orig;
3232
3233 if (change)
3234 *change = false;
3235
3236 if (regmap_volatile(map, reg) && map->reg_update_bits) {
3237 reg = regmap_reg_addr(map, reg);
3238 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
3239 if (ret == 0 && change)
3240 *change = true;
3241 } else {
3242 ret = _regmap_read(map, reg, val: &orig);
3243 if (ret != 0)
3244 return ret;
3245
3246 tmp = orig & ~mask;
3247 tmp |= val & mask;
3248
3249 if (force_write || (tmp != orig) || map->force_write_field) {
3250 ret = _regmap_write(map, reg, val: tmp);
3251 if (ret == 0 && change)
3252 *change = true;
3253 }
3254 }
3255
3256 return ret;
3257}
3258
3259/**
3260 * regmap_update_bits_base() - Perform a read/modify/write cycle on a register
3261 *
3262 * @map: Register map to update
3263 * @reg: Register to update
3264 * @mask: Bitmask to change
3265 * @val: New value for bitmask
3266 * @change: Boolean indicating if a write was done
3267 * @async: Boolean indicating asynchronously
3268 * @force: Boolean indicating use force update
3269 *
3270 * Perform a read/modify/write cycle on a register map with change, async, force
3271 * options.
3272 *
3273 * If async is true:
3274 *
3275 * With most buses the read must be done synchronously so this is most useful
3276 * for devices with a cache which do not need to interact with the hardware to
3277 * determine the current register value.
3278 *
3279 * Returns zero for success, a negative number on error.
3280 */
3281int regmap_update_bits_base(struct regmap *map, unsigned int reg,
3282 unsigned int mask, unsigned int val,
3283 bool *change, bool async, bool force)
3284{
3285 int ret;
3286
3287 map->lock(map->lock_arg);
3288
3289 map->async = async;
3290
3291 ret = _regmap_update_bits(map, reg, mask, val, change, force_write: force);
3292
3293 map->async = false;
3294
3295 map->unlock(map->lock_arg);
3296
3297 return ret;
3298}
3299EXPORT_SYMBOL_GPL(regmap_update_bits_base);
3300
3301/**
3302 * regmap_test_bits() - Check if all specified bits are set in a register.
3303 *
3304 * @map: Register map to operate on
3305 * @reg: Register to read from
3306 * @bits: Bits to test
3307 *
3308 * Returns 0 if at least one of the tested bits is not set, 1 if all tested
3309 * bits are set and a negative error number if the underlying regmap_read()
3310 * fails.
3311 */
3312int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits)
3313{
3314 unsigned int val;
3315 int ret;
3316
3317 ret = regmap_read(map, reg, &val);
3318 if (ret)
3319 return ret;
3320
3321 return (val & bits) == bits;
3322}
3323EXPORT_SYMBOL_GPL(regmap_test_bits);
3324
3325void regmap_async_complete_cb(struct regmap_async *async, int ret)
3326{
3327 struct regmap *map = async->map;
3328 bool wake;
3329
3330 trace_regmap_async_io_complete(map);
3331
3332 spin_lock(lock: &map->async_lock);
3333 list_move(list: &async->list, head: &map->async_free);
3334 wake = list_empty(head: &map->async_list);
3335
3336 if (ret != 0)
3337 map->async_ret = ret;
3338
3339 spin_unlock(lock: &map->async_lock);
3340
3341 if (wake)
3342 wake_up(&map->async_waitq);
3343}
3344EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
3345
3346static int regmap_async_is_done(struct regmap *map)
3347{
3348 unsigned long flags;
3349 int ret;
3350
3351 spin_lock_irqsave(&map->async_lock, flags);
3352 ret = list_empty(head: &map->async_list);
3353 spin_unlock_irqrestore(lock: &map->async_lock, flags);
3354
3355 return ret;
3356}
3357
3358/**
3359 * regmap_async_complete - Ensure all asynchronous I/O has completed.
3360 *
3361 * @map: Map to operate on.
3362 *
3363 * Blocks until any pending asynchronous I/O has completed. Returns
3364 * an error code for any failed I/O operations.
3365 */
3366int regmap_async_complete(struct regmap *map)
3367{
3368 unsigned long flags;
3369 int ret;
3370
3371 /* Nothing to do with no async support */
3372 if (!map->bus || !map->bus->async_write)
3373 return 0;
3374
3375 trace_regmap_async_complete_start(map);
3376
3377 wait_event(map->async_waitq, regmap_async_is_done(map));
3378
3379 spin_lock_irqsave(&map->async_lock, flags);
3380 ret = map->async_ret;
3381 map->async_ret = 0;
3382 spin_unlock_irqrestore(lock: &map->async_lock, flags);
3383
3384 trace_regmap_async_complete_done(map);
3385
3386 return ret;
3387}
3388EXPORT_SYMBOL_GPL(regmap_async_complete);
3389
3390/**
3391 * regmap_register_patch - Register and apply register updates to be applied
3392 * on device initialistion
3393 *
3394 * @map: Register map to apply updates to.
3395 * @regs: Values to update.
3396 * @num_regs: Number of entries in regs.
3397 *
3398 * Register a set of register updates to be applied to the device
3399 * whenever the device registers are synchronised with the cache and
3400 * apply them immediately. Typically this is used to apply
3401 * corrections to be applied to the device defaults on startup, such
3402 * as the updates some vendors provide to undocumented registers.
3403 *
3404 * The caller must ensure that this function cannot be called
3405 * concurrently with either itself or regcache_sync().
3406 */
3407int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
3408 int num_regs)
3409{
3410 struct reg_sequence *p;
3411 int ret;
3412 bool bypass;
3413
3414 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
3415 num_regs))
3416 return 0;
3417
3418 p = krealloc(map->patch,
3419 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
3420 GFP_KERNEL);
3421 if (p) {
3422 memcpy(to: p + map->patch_regs, from: regs, len: num_regs * sizeof(*regs));
3423 map->patch = p;
3424 map->patch_regs += num_regs;
3425 } else {
3426 return -ENOMEM;
3427 }
3428
3429 map->lock(map->lock_arg);
3430
3431 bypass = map->cache_bypass;
3432
3433 map->cache_bypass = true;
3434 map->async = true;
3435
3436 ret = _regmap_multi_reg_write(map, regs, num_regs);
3437
3438 map->async = false;
3439 map->cache_bypass = bypass;
3440
3441 map->unlock(map->lock_arg);
3442
3443 regmap_async_complete(map);
3444
3445 return ret;
3446}
3447EXPORT_SYMBOL_GPL(regmap_register_patch);
3448
3449/**
3450 * regmap_get_val_bytes() - Report the size of a register value
3451 *
3452 * @map: Register map to operate on.
3453 *
3454 * Report the size of a register value, mainly intended to for use by
3455 * generic infrastructure built on top of regmap.
3456 */
3457int regmap_get_val_bytes(struct regmap *map)
3458{
3459 if (map->format.format_write)
3460 return -EINVAL;
3461
3462 return map->format.val_bytes;
3463}
3464EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
3465
3466/**
3467 * regmap_get_max_register() - Report the max register value
3468 *
3469 * @map: Register map to operate on.
3470 *
3471 * Report the max register value, mainly intended to for use by
3472 * generic infrastructure built on top of regmap.
3473 */
3474int regmap_get_max_register(struct regmap *map)
3475{
3476 return map->max_register_is_set ? map->max_register : -EINVAL;
3477}
3478EXPORT_SYMBOL_GPL(regmap_get_max_register);
3479
3480/**
3481 * regmap_get_reg_stride() - Report the register address stride
3482 *
3483 * @map: Register map to operate on.
3484 *
3485 * Report the register address stride, mainly intended to for use by
3486 * generic infrastructure built on top of regmap.
3487 */
3488int regmap_get_reg_stride(struct regmap *map)
3489{
3490 return map->reg_stride;
3491}
3492EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
3493
3494/**
3495 * regmap_might_sleep() - Returns whether a regmap access might sleep.
3496 *
3497 * @map: Register map to operate on.
3498 *
3499 * Returns true if an access to the register might sleep, else false.
3500 */
3501bool regmap_might_sleep(struct regmap *map)
3502{
3503 return map->can_sleep;
3504}
3505EXPORT_SYMBOL_GPL(regmap_might_sleep);
3506
3507int regmap_parse_val(struct regmap *map, const void *buf,
3508 unsigned int *val)
3509{
3510 if (!map->format.parse_val)
3511 return -EINVAL;
3512
3513 *val = map->format.parse_val(buf);
3514
3515 return 0;
3516}
3517EXPORT_SYMBOL_GPL(regmap_parse_val);
3518
3519static int __init regmap_initcall(void)
3520{
3521 regmap_debugfs_initcall();
3522
3523 return 0;
3524}
3525postcore_initcall(regmap_initcall);
3526