1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright © 2022 Intel Corporation
4 */
5
6#ifndef __INTEL_HDCP_REGS_H__
7#define __INTEL_HDCP_REGS_H__
8
9#include "intel_display_reg_defs.h"
10
11#define TRANS_HDCP(__i915) (DISPLAY_VER(__i915) >= 12)
12
13/* HDCP Key Registers */
14#define HDCP_KEY_CONF _MMIO(0x66c00)
15#define HDCP_AKSV_SEND_TRIGGER REG_BIT(31)
16#define HDCP_CLEAR_KEYS_TRIGGER REG_BIT(30)
17#define HDCP_KEY_LOAD_TRIGGER REG_BIT(8)
18#define HDCP_KEY_STATUS _MMIO(0x66c04)
19#define HDCP_FUSE_IN_PROGRESS REG_BIT(7)
20#define HDCP_FUSE_ERROR REG_BIT(6)
21#define HDCP_FUSE_DONE REG_BIT(5)
22#define HDCP_KEY_LOAD_STATUS REG_BIT(1)
23#define HDCP_KEY_LOAD_DONE REG_BIT(0)
24#define HDCP_AKSV_LO _MMIO(0x66c10)
25#define HDCP_AKSV_HI _MMIO(0x66c14)
26
27/* HDCP Repeater Registers */
28#define HDCP_REP_CTL _MMIO(0x66d00)
29#define HDCP_TRANSA_REP_PRESENT REG_BIT(31)
30#define HDCP_TRANSB_REP_PRESENT REG_BIT(30)
31#define HDCP_TRANSC_REP_PRESENT REG_BIT(29)
32#define HDCP_TRANSD_REP_PRESENT REG_BIT(28)
33#define HDCP_DDIB_REP_PRESENT REG_BIT(30)
34#define HDCP_DDIA_REP_PRESENT REG_BIT(29)
35#define HDCP_DDIC_REP_PRESENT REG_BIT(28)
36#define HDCP_DDID_REP_PRESENT REG_BIT(27)
37#define HDCP_DDIF_REP_PRESENT REG_BIT(26)
38#define HDCP_DDIE_REP_PRESENT REG_BIT(25)
39#define HDCP_TRANSA_SHA1_M0 (1 << 20)
40#define HDCP_TRANSB_SHA1_M0 (2 << 20)
41#define HDCP_TRANSC_SHA1_M0 (3 << 20)
42#define HDCP_TRANSD_SHA1_M0 (4 << 20)
43#define HDCP_DDIB_SHA1_M0 (1 << 20)
44#define HDCP_DDIA_SHA1_M0 (2 << 20)
45#define HDCP_DDIC_SHA1_M0 (3 << 20)
46#define HDCP_DDID_SHA1_M0 (4 << 20)
47#define HDCP_DDIF_SHA1_M0 (5 << 20)
48#define HDCP_DDIE_SHA1_M0 (6 << 20) /* Bspec says 5? */
49#define HDCP_SHA1_BUSY REG_BIT(16)
50#define HDCP_SHA1_READY REG_BIT(17)
51#define HDCP_SHA1_COMPLETE REG_BIT(18)
52#define HDCP_SHA1_V_MATCH REG_BIT(19)
53#define HDCP_SHA1_TEXT_32 (1 << 1)
54#define HDCP_SHA1_COMPLETE_HASH (2 << 1)
55#define HDCP_SHA1_TEXT_24 (4 << 1)
56#define HDCP_SHA1_TEXT_16 (5 << 1)
57#define HDCP_SHA1_TEXT_8 (6 << 1)
58#define HDCP_SHA1_TEXT_0 (7 << 1)
59#define HDCP_SHA_V_PRIME_H0 _MMIO(0x66d04)
60#define HDCP_SHA_V_PRIME_H1 _MMIO(0x66d08)
61#define HDCP_SHA_V_PRIME_H2 _MMIO(0x66d0C)
62#define HDCP_SHA_V_PRIME_H3 _MMIO(0x66d10)
63#define HDCP_SHA_V_PRIME_H4 _MMIO(0x66d14)
64#define HDCP_SHA_V_PRIME(h) _MMIO((0x66d04 + (h) * 4))
65#define HDCP_SHA_TEXT _MMIO(0x66d18)
66
67/* HDCP Auth Registers */
68#define _PORTA_HDCP_AUTHENC 0x66800
69#define _PORTB_HDCP_AUTHENC 0x66500
70#define _PORTC_HDCP_AUTHENC 0x66600
71#define _PORTD_HDCP_AUTHENC 0x66700
72#define _PORTE_HDCP_AUTHENC 0x66A00
73#define _PORTF_HDCP_AUTHENC 0x66900
74#define _PORT_HDCP_AUTHENC(port, x) _MMIO(_PICK(port, \
75 _PORTA_HDCP_AUTHENC, \
76 _PORTB_HDCP_AUTHENC, \
77 _PORTC_HDCP_AUTHENC, \
78 _PORTD_HDCP_AUTHENC, \
79 _PORTE_HDCP_AUTHENC, \
80 _PORTF_HDCP_AUTHENC) + (x))
81#define PORT_HDCP_CONF(port) _PORT_HDCP_AUTHENC(port, 0x0)
82#define _TRANSA_HDCP_CONF 0x66400
83#define _TRANSB_HDCP_CONF 0x66500
84#define TRANS_HDCP_CONF(trans) _MMIO_TRANS(trans, _TRANSA_HDCP_CONF, \
85 _TRANSB_HDCP_CONF)
86#define HDCP_CONF(dev_priv, trans, port) \
87 (TRANS_HDCP(dev_priv) ? \
88 TRANS_HDCP_CONF(trans) : \
89 PORT_HDCP_CONF(port))
90
91#define HDCP_CONF_CAPTURE_AN REG_BIT(0)
92#define HDCP_CONF_AUTH_AND_ENC (REG_BIT(1) | REG_BIT(0))
93#define PORT_HDCP_ANINIT(port) _PORT_HDCP_AUTHENC(port, 0x4)
94#define _TRANSA_HDCP_ANINIT 0x66404
95#define _TRANSB_HDCP_ANINIT 0x66504
96#define TRANS_HDCP_ANINIT(trans) _MMIO_TRANS(trans, \
97 _TRANSA_HDCP_ANINIT, \
98 _TRANSB_HDCP_ANINIT)
99#define HDCP_ANINIT(dev_priv, trans, port) \
100 (TRANS_HDCP(dev_priv) ? \
101 TRANS_HDCP_ANINIT(trans) : \
102 PORT_HDCP_ANINIT(port))
103
104#define PORT_HDCP_ANLO(port) _PORT_HDCP_AUTHENC(port, 0x8)
105#define _TRANSA_HDCP_ANLO 0x66408
106#define _TRANSB_HDCP_ANLO 0x66508
107#define TRANS_HDCP_ANLO(trans) _MMIO_TRANS(trans, _TRANSA_HDCP_ANLO, \
108 _TRANSB_HDCP_ANLO)
109#define HDCP_ANLO(dev_priv, trans, port) \
110 (TRANS_HDCP(dev_priv) ? \
111 TRANS_HDCP_ANLO(trans) : \
112 PORT_HDCP_ANLO(port))
113
114#define PORT_HDCP_ANHI(port) _PORT_HDCP_AUTHENC(port, 0xC)
115#define _TRANSA_HDCP_ANHI 0x6640C
116#define _TRANSB_HDCP_ANHI 0x6650C
117#define TRANS_HDCP_ANHI(trans) _MMIO_TRANS(trans, _TRANSA_HDCP_ANHI, \
118 _TRANSB_HDCP_ANHI)
119#define HDCP_ANHI(dev_priv, trans, port) \
120 (TRANS_HDCP(dev_priv) ? \
121 TRANS_HDCP_ANHI(trans) : \
122 PORT_HDCP_ANHI(port))
123
124#define PORT_HDCP_BKSVLO(port) _PORT_HDCP_AUTHENC(port, 0x10)
125#define _TRANSA_HDCP_BKSVLO 0x66410
126#define _TRANSB_HDCP_BKSVLO 0x66510
127#define TRANS_HDCP_BKSVLO(trans) _MMIO_TRANS(trans, \
128 _TRANSA_HDCP_BKSVLO, \
129 _TRANSB_HDCP_BKSVLO)
130#define HDCP_BKSVLO(dev_priv, trans, port) \
131 (TRANS_HDCP(dev_priv) ? \
132 TRANS_HDCP_BKSVLO(trans) : \
133 PORT_HDCP_BKSVLO(port))
134
135#define PORT_HDCP_BKSVHI(port) _PORT_HDCP_AUTHENC(port, 0x14)
136#define _TRANSA_HDCP_BKSVHI 0x66414
137#define _TRANSB_HDCP_BKSVHI 0x66514
138#define TRANS_HDCP_BKSVHI(trans) _MMIO_TRANS(trans, \
139 _TRANSA_HDCP_BKSVHI, \
140 _TRANSB_HDCP_BKSVHI)
141#define HDCP_BKSVHI(dev_priv, trans, port) \
142 (TRANS_HDCP(dev_priv) ? \
143 TRANS_HDCP_BKSVHI(trans) : \
144 PORT_HDCP_BKSVHI(port))
145
146#define PORT_HDCP_RPRIME(port) _PORT_HDCP_AUTHENC(port, 0x18)
147#define _TRANSA_HDCP_RPRIME 0x66418
148#define _TRANSB_HDCP_RPRIME 0x66518
149#define TRANS_HDCP_RPRIME(trans) _MMIO_TRANS(trans, \
150 _TRANSA_HDCP_RPRIME, \
151 _TRANSB_HDCP_RPRIME)
152#define HDCP_RPRIME(dev_priv, trans, port) \
153 (TRANS_HDCP(dev_priv) ? \
154 TRANS_HDCP_RPRIME(trans) : \
155 PORT_HDCP_RPRIME(port))
156
157#define PORT_HDCP_STATUS(port) _PORT_HDCP_AUTHENC(port, 0x1C)
158#define _TRANSA_HDCP_STATUS 0x6641C
159#define _TRANSB_HDCP_STATUS 0x6651C
160#define TRANS_HDCP_STATUS(trans) _MMIO_TRANS(trans, \
161 _TRANSA_HDCP_STATUS, \
162 _TRANSB_HDCP_STATUS)
163#define HDCP_STATUS(dev_priv, trans, port) \
164 (TRANS_HDCP(dev_priv) ? \
165 TRANS_HDCP_STATUS(trans) : \
166 PORT_HDCP_STATUS(port))
167
168#define HDCP_STATUS_STREAM_A_ENC REG_BIT(31)
169#define HDCP_STATUS_STREAM_B_ENC REG_BIT(30)
170#define HDCP_STATUS_STREAM_C_ENC REG_BIT(29)
171#define HDCP_STATUS_STREAM_D_ENC REG_BIT(28)
172#define HDCP_STATUS_AUTH REG_BIT(21)
173#define HDCP_STATUS_ENC REG_BIT(20)
174#define HDCP_STATUS_RI_MATCH REG_BIT(19)
175#define HDCP_STATUS_R0_READY REG_BIT(18)
176#define HDCP_STATUS_AN_READY REG_BIT(17)
177#define HDCP_STATUS_CIPHER REG_BIT(16)
178#define HDCP_STATUS_FRAME_CNT(x) (((x) >> 8) & 0xff)
179
180/* HDCP2.2 Registers */
181#define _PORTA_HDCP2_BASE 0x66800
182#define _PORTB_HDCP2_BASE 0x66500
183#define _PORTC_HDCP2_BASE 0x66600
184#define _PORTD_HDCP2_BASE 0x66700
185#define _PORTE_HDCP2_BASE 0x66A00
186#define _PORTF_HDCP2_BASE 0x66900
187#define _PORT_HDCP2_BASE(port, x) _MMIO(_PICK((port), \
188 _PORTA_HDCP2_BASE, \
189 _PORTB_HDCP2_BASE, \
190 _PORTC_HDCP2_BASE, \
191 _PORTD_HDCP2_BASE, \
192 _PORTE_HDCP2_BASE, \
193 _PORTF_HDCP2_BASE) + (x))
194
195#define PORT_HDCP2_AUTH(port) _PORT_HDCP2_BASE(port, 0x98)
196#define _TRANSA_HDCP2_AUTH 0x66498
197#define _TRANSB_HDCP2_AUTH 0x66598
198#define TRANS_HDCP2_AUTH(trans) _MMIO_TRANS(trans, _TRANSA_HDCP2_AUTH, \
199 _TRANSB_HDCP2_AUTH)
200#define AUTH_LINK_AUTHENTICATED REG_BIT(31)
201#define AUTH_LINK_TYPE REG_BIT(30)
202#define AUTH_FORCE_CLR_INPUTCTR REG_BIT(19)
203#define AUTH_CLR_KEYS REG_BIT(18)
204#define HDCP2_AUTH(dev_priv, trans, port) \
205 (TRANS_HDCP(dev_priv) ? \
206 TRANS_HDCP2_AUTH(trans) : \
207 PORT_HDCP2_AUTH(port))
208
209#define PORT_HDCP2_CTL(port) _PORT_HDCP2_BASE(port, 0xB0)
210#define _TRANSA_HDCP2_CTL 0x664B0
211#define _TRANSB_HDCP2_CTL 0x665B0
212#define TRANS_HDCP2_CTL(trans) _MMIO_TRANS(trans, _TRANSA_HDCP2_CTL, \
213 _TRANSB_HDCP2_CTL)
214#define CTL_LINK_ENCRYPTION_REQ REG_BIT(31)
215#define HDCP2_CTL(dev_priv, trans, port) \
216 (TRANS_HDCP(dev_priv) ? \
217 TRANS_HDCP2_CTL(trans) : \
218 PORT_HDCP2_CTL(port))
219
220#define PORT_HDCP2_STATUS(port) _PORT_HDCP2_BASE(port, 0xB4)
221#define _TRANSA_HDCP2_STATUS 0x664B4
222#define _TRANSB_HDCP2_STATUS 0x665B4
223#define TRANS_HDCP2_STATUS(trans) _MMIO_TRANS(trans, \
224 _TRANSA_HDCP2_STATUS, \
225 _TRANSB_HDCP2_STATUS)
226#define LINK_TYPE_STATUS REG_BIT(22)
227#define LINK_AUTH_STATUS REG_BIT(21)
228#define LINK_ENCRYPTION_STATUS REG_BIT(20)
229#define HDCP2_STATUS(dev_priv, trans, port) \
230 (TRANS_HDCP(dev_priv) ? \
231 TRANS_HDCP2_STATUS(trans) : \
232 PORT_HDCP2_STATUS(port))
233
234#define _PIPEA_HDCP2_STREAM_STATUS 0x668C0
235#define _PIPEB_HDCP2_STREAM_STATUS 0x665C0
236#define _PIPEC_HDCP2_STREAM_STATUS 0x666C0
237#define _PIPED_HDCP2_STREAM_STATUS 0x667C0
238#define PIPE_HDCP2_STREAM_STATUS(pipe) _MMIO(_PICK((pipe), \
239 _PIPEA_HDCP2_STREAM_STATUS, \
240 _PIPEB_HDCP2_STREAM_STATUS, \
241 _PIPEC_HDCP2_STREAM_STATUS, \
242 _PIPED_HDCP2_STREAM_STATUS))
243
244#define _TRANSA_HDCP2_STREAM_STATUS 0x664C0
245#define _TRANSB_HDCP2_STREAM_STATUS 0x665C0
246#define TRANS_HDCP2_STREAM_STATUS(trans) _MMIO_TRANS(trans, \
247 _TRANSA_HDCP2_STREAM_STATUS, \
248 _TRANSB_HDCP2_STREAM_STATUS)
249#define STREAM_ENCRYPTION_STATUS REG_BIT(31)
250#define STREAM_TYPE_STATUS_MASK REG_GENMASK(30, 30)
251#define HDCP2_STREAM_STATUS(dev_priv, trans, port) \
252 (TRANS_HDCP(dev_priv) ? \
253 TRANS_HDCP2_STREAM_STATUS(trans) : \
254 PIPE_HDCP2_STREAM_STATUS(port))
255
256#define _PORTA_HDCP2_AUTH_STREAM 0x66F00
257#define _PORTB_HDCP2_AUTH_STREAM 0x66F04
258#define PORT_HDCP2_AUTH_STREAM(port) _MMIO_PORT(port, \
259 _PORTA_HDCP2_AUTH_STREAM, \
260 _PORTB_HDCP2_AUTH_STREAM)
261#define _TRANSA_HDCP2_AUTH_STREAM 0x66F00
262#define _TRANSB_HDCP2_AUTH_STREAM 0x66F04
263#define TRANS_HDCP2_AUTH_STREAM(trans) _MMIO_TRANS(trans, \
264 _TRANSA_HDCP2_AUTH_STREAM, \
265 _TRANSB_HDCP2_AUTH_STREAM)
266#define AUTH_STREAM_TYPE_MASK REG_GENMASK(31, 31)
267#define HDCP2_AUTH_STREAM(dev_priv, trans, port) \
268 (TRANS_HDCP(dev_priv) ? \
269 TRANS_HDCP2_AUTH_STREAM(trans) : \
270 PORT_HDCP2_AUTH_STREAM(port))
271
272#endif /* __INTEL_HDCP_REGS_H__ */
273