| 1 | /* SPDX-License-Identifier: MIT */ | 
|---|---|
| 2 | /* | 
| 3 | * Copyright © 2023 Intel Corporation | 
| 4 | */ | 
| 5 | |
| 6 | #ifndef __INTEL_LINK_BW_H__ | 
| 7 | #define __INTEL_LINK_BW_H__ | 
| 8 | |
| 9 | #include <linux/types.h> | 
| 10 | |
| 11 | #include "intel_display_limits.h" | 
| 12 | |
| 13 | struct intel_atomic_state; | 
| 14 | struct intel_connector; | 
| 15 | struct intel_crtc_state; | 
| 16 | |
| 17 | struct intel_link_bw_limits { | 
| 18 | u8 force_fec_pipes; | 
| 19 | u8 bpp_limit_reached_pipes; | 
| 20 | /* in 1/16 bpp units */ | 
| 21 | int max_bpp_x16[I915_MAX_PIPES]; | 
| 22 | }; | 
| 23 | |
| 24 | void intel_link_bw_init_limits(struct intel_atomic_state *state, | 
| 25 | struct intel_link_bw_limits *limits); | 
| 26 | int intel_link_bw_reduce_bpp(struct intel_atomic_state *state, | 
| 27 | struct intel_link_bw_limits *limits, | 
| 28 | u8 pipe_mask, | 
| 29 | const char *reason); | 
| 30 | bool intel_link_bw_compute_pipe_bpp(struct intel_crtc_state *crtc_state); | 
| 31 | bool intel_link_bw_set_bpp_limit_for_pipe(struct intel_atomic_state *state, | 
| 32 | const struct intel_link_bw_limits *old_limits, | 
| 33 | struct intel_link_bw_limits *new_limits, | 
| 34 | enum pipe pipe); | 
| 35 | int intel_link_bw_atomic_check(struct intel_atomic_state *state, | 
| 36 | struct intel_link_bw_limits *new_limits); | 
| 37 | void intel_link_bw_connector_debugfs_add(struct intel_connector *connector); | 
| 38 | |
| 39 | #endif | 
| 40 | 
