| 1 | // SPDX-License-Identifier: MIT | 
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| 2 | /* | 
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| 3 | * Copyright © 2014-2016 Intel Corporation | 
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| 4 | */ | 
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| 5 |  | 
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| 6 | #include <linux/dma-fence-array.h> | 
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| 7 |  | 
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| 8 | #include "gt/intel_engine.h" | 
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| 9 |  | 
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| 10 | #include "i915_gem_ioctls.h" | 
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| 11 | #include "i915_gem_object.h" | 
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| 12 |  | 
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| 13 | static __always_inline u32 __busy_read_flag(u16 id) | 
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| 14 | { | 
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| 15 | if (id == (u16)I915_ENGINE_CLASS_INVALID) | 
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| 16 | return 0xffff0000u; | 
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| 17 |  | 
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| 18 | GEM_BUG_ON(id >= 16); | 
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| 19 | return 0x10000u << id; | 
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| 20 | } | 
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| 21 |  | 
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| 22 | static __always_inline u32 __busy_write_id(u16 id) | 
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| 23 | { | 
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| 24 | /* | 
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| 25 | * The uABI guarantees an active writer is also amongst the read | 
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| 26 | * engines. This would be true if we accessed the activity tracking | 
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| 27 | * under the lock, but as we perform the lookup of the object and | 
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| 28 | * its activity locklessly we can not guarantee that the last_write | 
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| 29 | * being active implies that we have set the same engine flag from | 
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| 30 | * last_read - hence we always set both read and write busy for | 
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| 31 | * last_write. | 
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| 32 | */ | 
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| 33 | if (id == (u16)I915_ENGINE_CLASS_INVALID) | 
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| 34 | return 0xffffffffu; | 
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| 35 |  | 
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| 36 | return (id + 1) | __busy_read_flag(id); | 
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| 37 | } | 
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| 38 |  | 
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| 39 | static __always_inline unsigned int | 
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| 40 | __busy_set_if_active(struct dma_fence *fence, u32 (*flag)(u16 id)) | 
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| 41 | { | 
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| 42 | const struct i915_request *rq; | 
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| 43 |  | 
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| 44 | /* | 
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| 45 | * We have to check the current hw status of the fence as the uABI | 
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| 46 | * guarantees forward progress. We could rely on the idle worker | 
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| 47 | * to eventually flush us, but to minimise latency just ask the | 
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| 48 | * hardware. | 
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| 49 | * | 
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| 50 | * Note we only report on the status of native fences and we currently | 
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| 51 | * have two native fences: | 
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| 52 | * | 
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| 53 | * 1. A composite fence (dma_fence_array) constructed of i915 requests | 
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| 54 | * created during a parallel submission. In this case we deconstruct the | 
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| 55 | * composite fence into individual i915 requests and check the status of | 
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| 56 | * each request. | 
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| 57 | * | 
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| 58 | * 2. A single i915 request. | 
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| 59 | */ | 
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| 60 | if (dma_fence_is_array(fence)) { | 
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| 61 | struct dma_fence_array *array = to_dma_fence_array(fence); | 
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| 62 | struct dma_fence **child = array->fences; | 
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| 63 | unsigned int nchild = array->num_fences; | 
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| 64 |  | 
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| 65 | do { | 
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| 66 | struct dma_fence *current_fence = *child++; | 
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| 67 |  | 
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| 68 | /* Not an i915 fence, can't be busy per above */ | 
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| 69 | if (!dma_fence_is_i915(fence: current_fence) || | 
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| 70 | !test_bit(I915_FENCE_FLAG_COMPOSITE, | 
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| 71 | ¤t_fence->flags)) { | 
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| 72 | return 0; | 
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| 73 | } | 
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| 74 |  | 
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| 75 | rq = to_request(fence: current_fence); | 
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| 76 | if (!i915_request_completed(rq)) | 
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| 77 | return flag(rq->engine->uabi_class); | 
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| 78 | } while (--nchild); | 
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| 79 |  | 
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| 80 | /* All requests in array complete, not busy */ | 
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| 81 | return 0; | 
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| 82 | } else { | 
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| 83 | if (!dma_fence_is_i915(fence)) | 
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| 84 | return 0; | 
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| 85 |  | 
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| 86 | rq = to_request(fence); | 
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| 87 | if (i915_request_completed(rq)) | 
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| 88 | return 0; | 
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| 89 |  | 
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| 90 | /* Beware type-expansion follies! */ | 
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| 91 | BUILD_BUG_ON(!typecheck(u16, rq->engine->uabi_class)); | 
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| 92 | return flag(rq->engine->uabi_class); | 
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| 93 | } | 
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| 94 | } | 
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| 95 |  | 
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| 96 | static __always_inline unsigned int | 
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| 97 | busy_check_reader(struct dma_fence *fence) | 
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| 98 | { | 
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| 99 | return __busy_set_if_active(fence, flag: __busy_read_flag); | 
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| 100 | } | 
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| 101 |  | 
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| 102 | static __always_inline unsigned int | 
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| 103 | busy_check_writer(struct dma_fence *fence) | 
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| 104 | { | 
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| 105 | if (!fence) | 
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| 106 | return 0; | 
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| 107 |  | 
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| 108 | return __busy_set_if_active(fence, flag: __busy_write_id); | 
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| 109 | } | 
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| 110 |  | 
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| 111 | int | 
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| 112 | i915_gem_busy_ioctl(struct drm_device *dev, void *data, | 
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| 113 | struct drm_file *file) | 
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| 114 | { | 
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| 115 | struct drm_i915_gem_busy *args = data; | 
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| 116 | struct drm_i915_gem_object *obj; | 
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| 117 | struct dma_resv_iter cursor; | 
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| 118 | struct dma_fence *fence; | 
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| 119 | int err; | 
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| 120 |  | 
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| 121 | err = -ENOENT; | 
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| 122 | rcu_read_lock(); | 
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| 123 | obj = i915_gem_object_lookup_rcu(file, handle: args->handle); | 
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| 124 | if (!obj) | 
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| 125 | goto out; | 
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| 126 |  | 
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| 127 | /* | 
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| 128 | * A discrepancy here is that we do not report the status of | 
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| 129 | * non-i915 fences, i.e. even though we may report the object as idle, | 
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| 130 | * a call to set-domain may still stall waiting for foreign rendering. | 
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| 131 | * This also means that wait-ioctl may report an object as busy, | 
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| 132 | * where busy-ioctl considers it idle. | 
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| 133 | * | 
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| 134 | * We trade the ability to warn of foreign fences to report on which | 
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| 135 | * i915 engines are active for the object. | 
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| 136 | * | 
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| 137 | * Alternatively, we can trade that extra information on read/write | 
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| 138 | * activity with | 
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| 139 | *	args->busy = | 
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| 140 | *		!dma_resv_test_signaled(obj->resv, DMA_RESV_USAGE_READ); | 
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| 141 | * to report the overall busyness. This is what the wait-ioctl does. | 
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| 142 | * | 
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| 143 | */ | 
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| 144 | args->busy = 0; | 
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| 145 | dma_resv_iter_begin(cursor: &cursor, obj: obj->base.resv, usage: DMA_RESV_USAGE_READ); | 
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| 146 | dma_resv_for_each_fence_unlocked(&cursor, fence) { | 
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| 147 | if (dma_resv_iter_is_restarted(cursor: &cursor)) | 
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| 148 | args->busy = 0; | 
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| 149 |  | 
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| 150 | if (dma_resv_iter_usage(cursor: &cursor) <= DMA_RESV_USAGE_WRITE) | 
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| 151 | /* Translate the write fences to the READ *and* WRITE engine */ | 
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| 152 | args->busy |= busy_check_writer(fence); | 
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| 153 | else | 
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| 154 | /* Translate read fences to READ set of engines */ | 
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| 155 | args->busy |= busy_check_reader(fence); | 
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| 156 | } | 
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| 157 | dma_resv_iter_end(cursor: &cursor); | 
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| 158 |  | 
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| 159 | err = 0; | 
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| 160 | out: | 
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| 161 | rcu_read_unlock(); | 
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| 162 | return err; | 
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| 163 | } | 
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| 164 |  | 
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