1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright © 2016 Intel Corporation
4 */
5
6#ifndef I915_TIMELINE_H
7#define I915_TIMELINE_H
8
9#include <linux/lockdep.h>
10
11#include "i915_active.h"
12#include "i915_list_util.h"
13#include "i915_syncmap.h"
14#include "intel_timeline_types.h"
15
16struct drm_printer;
17
18struct intel_timeline *
19__intel_timeline_create(struct intel_gt *gt,
20 struct i915_vma *global_hwsp,
21 unsigned int offset);
22
23static inline struct intel_timeline *
24intel_timeline_create(struct intel_gt *gt)
25{
26 return __intel_timeline_create(gt, NULL, offset: 0);
27}
28
29struct intel_timeline *
30intel_timeline_create_from_engine(struct intel_engine_cs *engine,
31 unsigned int offset);
32
33static inline struct intel_timeline *
34intel_timeline_get(struct intel_timeline *timeline)
35{
36 kref_get(kref: &timeline->kref);
37 return timeline;
38}
39
40void __intel_timeline_free(struct kref *kref);
41static inline void intel_timeline_put(struct intel_timeline *timeline)
42{
43 kref_put(kref: &timeline->kref, release: __intel_timeline_free);
44}
45
46static inline int __intel_timeline_sync_set(struct intel_timeline *tl,
47 u64 context, u32 seqno)
48{
49 return i915_syncmap_set(root: &tl->sync, id: context, seqno);
50}
51
52static inline int intel_timeline_sync_set(struct intel_timeline *tl,
53 const struct dma_fence *fence)
54{
55 return __intel_timeline_sync_set(tl, context: fence->context, seqno: fence->seqno);
56}
57
58static inline bool __intel_timeline_sync_is_later(struct intel_timeline *tl,
59 u64 context, u32 seqno)
60{
61 return i915_syncmap_is_later(root: &tl->sync, id: context, seqno);
62}
63
64static inline bool intel_timeline_sync_is_later(struct intel_timeline *tl,
65 const struct dma_fence *fence)
66{
67 return __intel_timeline_sync_is_later(tl, context: fence->context, seqno: fence->seqno);
68}
69
70void __intel_timeline_pin(struct intel_timeline *tl);
71int intel_timeline_pin(struct intel_timeline *tl, struct i915_gem_ww_ctx *ww);
72void intel_timeline_enter(struct intel_timeline *tl);
73int intel_timeline_get_seqno(struct intel_timeline *tl,
74 struct i915_request *rq,
75 u32 *seqno);
76void intel_timeline_exit(struct intel_timeline *tl);
77void intel_timeline_unpin(struct intel_timeline *tl);
78
79void intel_timeline_reset_seqno(const struct intel_timeline *tl);
80
81int intel_timeline_read_hwsp(struct i915_request *from,
82 struct i915_request *until,
83 u32 *hwsp_offset);
84
85void intel_gt_init_timelines(struct intel_gt *gt);
86void intel_gt_fini_timelines(struct intel_gt *gt);
87
88void intel_gt_show_timelines(struct intel_gt *gt,
89 struct drm_printer *m,
90 void (*show_request)(struct drm_printer *m,
91 const struct i915_request *rq,
92 const char *prefix,
93 int indent));
94
95static inline bool
96intel_timeline_is_last(const struct intel_timeline *tl,
97 const struct i915_request *rq)
98{
99 return list_is_last_rcu(list: &rq->link, head: &tl->requests);
100}
101
102I915_SELFTEST_DECLARE(int intel_timeline_pin_map(struct intel_timeline *tl));
103
104#endif
105