1/* SPDX-License-Identifier: GPL-2.0 */
2
3/*
4 * PERFCFGOFF_REG, PERFFRZOFF_REG
5 * PERFOVFOFF_REG, PERFCNTROFF_REG
6 */
7#define IOMMU_PMU_NUM_OFF_REGS 4
8#define IOMMU_PMU_OFF_REGS_STEP 4
9
10#define IOMMU_PMU_FILTER_REQUESTER_ID 0x01
11#define IOMMU_PMU_FILTER_DOMAIN 0x02
12#define IOMMU_PMU_FILTER_PASID 0x04
13#define IOMMU_PMU_FILTER_ATS 0x08
14#define IOMMU_PMU_FILTER_PAGE_TABLE 0x10
15
16#define IOMMU_PMU_FILTER_EN BIT(31)
17
18#define IOMMU_PMU_CFG_OFFSET 0x100
19#define IOMMU_PMU_CFG_CNTRCAP_OFFSET 0x80
20#define IOMMU_PMU_CFG_CNTREVCAP_OFFSET 0x84
21#define IOMMU_PMU_CFG_SIZE 0x8
22#define IOMMU_PMU_CFG_FILTERS_OFFSET 0x4
23
24#define IOMMU_PMU_CAP_REGS_STEP 8
25
26#define iommu_cntrcap_pcc(p) ((p) & 0x1)
27#define iommu_cntrcap_cw(p) (((p) >> 8) & 0xff)
28#define iommu_cntrcap_ios(p) (((p) >> 16) & 0x1)
29#define iommu_cntrcap_egcnt(p) (((p) >> 28) & 0xf)
30
31#define IOMMU_EVENT_CFG_EGI_SHIFT 8
32#define IOMMU_EVENT_CFG_ES_SHIFT 32
33#define IOMMU_EVENT_CFG_INT BIT_ULL(1)
34
35#define iommu_event_select(p) ((p) & 0xfffffff)
36#define iommu_event_group(p) (((p) >> 28) & 0xf)
37
38#ifdef CONFIG_INTEL_IOMMU_PERF_EVENTS
39int alloc_iommu_pmu(struct intel_iommu *iommu);
40void free_iommu_pmu(struct intel_iommu *iommu);
41void iommu_pmu_register(struct intel_iommu *iommu);
42void iommu_pmu_unregister(struct intel_iommu *iommu);
43#else
44static inline int
45alloc_iommu_pmu(struct intel_iommu *iommu)
46{
47 return 0;
48}
49
50static inline void
51free_iommu_pmu(struct intel_iommu *iommu)
52{
53}
54
55static inline void
56iommu_pmu_register(struct intel_iommu *iommu)
57{
58}
59
60static inline void
61iommu_pmu_unregister(struct intel_iommu *iommu)
62{
63}
64#endif /* CONFIG_INTEL_IOMMU_PERF_EVENTS */
65