1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Purpose: PCI Express Port Bus Driver's Internal Data Structures
4 *
5 * Copyright (C) 2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
7 */
8
9#ifndef _PORTDRV_H_
10#define _PORTDRV_H_
11
12#include <linux/compiler.h>
13
14/* Service Type */
15#define PCIE_PORT_SERVICE_PME_SHIFT 0 /* Power Management Event */
16#define PCIE_PORT_SERVICE_PME (1 << PCIE_PORT_SERVICE_PME_SHIFT)
17#define PCIE_PORT_SERVICE_AER_SHIFT 1 /* Advanced Error Reporting */
18#define PCIE_PORT_SERVICE_AER (1 << PCIE_PORT_SERVICE_AER_SHIFT)
19#define PCIE_PORT_SERVICE_HP_SHIFT 2 /* Native Hotplug */
20#define PCIE_PORT_SERVICE_HP (1 << PCIE_PORT_SERVICE_HP_SHIFT)
21#define PCIE_PORT_SERVICE_DPC_SHIFT 3 /* Downstream Port Containment */
22#define PCIE_PORT_SERVICE_DPC (1 << PCIE_PORT_SERVICE_DPC_SHIFT)
23#define PCIE_PORT_SERVICE_BWCTRL_SHIFT 4 /* Bandwidth Controller (notifications) */
24#define PCIE_PORT_SERVICE_BWCTRL (1 << PCIE_PORT_SERVICE_BWCTRL_SHIFT)
25
26#define PCIE_PORT_DEVICE_MAXSERVICES 5
27
28extern bool pcie_ports_dpc_native;
29
30#ifdef CONFIG_PCIEAER
31int pcie_aer_init(void);
32#else
33static inline int pcie_aer_init(void) { return 0; }
34#endif
35
36#ifdef CONFIG_HOTPLUG_PCI_PCIE
37int pcie_hp_init(void);
38#else
39static inline int pcie_hp_init(void) { return 0; }
40#endif
41
42#ifdef CONFIG_PCIE_PME
43int pcie_pme_init(void);
44#else
45static inline int pcie_pme_init(void) { return 0; }
46#endif
47
48#ifdef CONFIG_PCIE_DPC
49int pcie_dpc_init(void);
50#else
51static inline int pcie_dpc_init(void) { return 0; }
52#endif
53
54int pcie_bwctrl_init(void);
55
56/* Port Type */
57#define PCIE_ANY_PORT (~0)
58
59struct pcie_device {
60 int irq; /* Service IRQ/MSI/MSI-X Vector */
61 struct pci_dev *port; /* Root/Upstream/Downstream Port */
62 u32 service; /* Port service this device represents */
63 void *priv_data; /* Service Private Data */
64 struct device device; /* Generic Device Interface */
65};
66#define to_pcie_device(d) container_of(d, struct pcie_device, device)
67
68static inline void set_service_data(struct pcie_device *dev, void *data)
69{
70 dev->priv_data = data;
71}
72
73static inline void *get_service_data(struct pcie_device *dev)
74{
75 return dev->priv_data;
76}
77
78struct pcie_port_service_driver {
79 const char *name;
80 int (*probe)(struct pcie_device *dev);
81 void (*remove)(struct pcie_device *dev);
82 int (*suspend)(struct pcie_device *dev);
83 int (*resume_noirq)(struct pcie_device *dev);
84 int (*resume)(struct pcie_device *dev);
85 int (*runtime_suspend)(struct pcie_device *dev);
86 int (*runtime_resume)(struct pcie_device *dev);
87
88 int (*slot_reset)(struct pcie_device *dev);
89
90 int port_type; /* Type of the port this driver can handle */
91 u32 service; /* Port service this device represents */
92
93 struct device_driver driver;
94};
95#define to_service_driver(d) \
96 container_of(d, struct pcie_port_service_driver, driver)
97
98int pcie_port_service_register(struct pcie_port_service_driver *new);
99void pcie_port_service_unregister(struct pcie_port_service_driver *new);
100
101extern const struct bus_type pcie_port_bus_type;
102
103struct pci_dev;
104
105#ifdef CONFIG_PCIE_PME
106extern bool pcie_pme_msi_disabled;
107
108static inline void pcie_pme_disable_msi(void)
109{
110 pcie_pme_msi_disabled = true;
111}
112
113static inline bool pcie_pme_no_msi(void)
114{
115 return pcie_pme_msi_disabled;
116}
117
118void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable);
119#else /* !CONFIG_PCIE_PME */
120static inline void pcie_pme_disable_msi(void) {}
121static inline bool pcie_pme_no_msi(void) { return false; }
122static inline void pcie_pme_interrupt_enable(struct pci_dev *dev, bool en) {}
123#endif /* !CONFIG_PCIE_PME */
124
125struct device *pcie_port_find_device(struct pci_dev *dev, u32 service);
126#endif /* _PORTDRV_H_ */
127