| 1 | // SPDX-License-Identifier: GPL-2.0-only | 
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| 2 | /* | 
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| 3 | * cardbus.c -- 16-bit PCMCIA core support | 
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| 4 | * | 
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| 5 | * The initial developer of the original code is David A. Hinds | 
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| 6 | * <dahinds@users.sourceforge.net>.  Portions created by David A. Hinds | 
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| 7 | * are Copyright (C) 1999 David A. Hinds.  All Rights Reserved. | 
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| 8 | * | 
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| 9 | * (C) 1999		David A. Hinds | 
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| 10 | */ | 
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| 11 |  | 
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| 12 | /* | 
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| 13 | * Cardbus handling has been re-written to be more of a PCI bridge thing, | 
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| 14 | * and the PCI code basically does all the resource handling. | 
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| 15 | * | 
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| 16 | *		Linus, Jan 2000 | 
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| 17 | */ | 
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| 18 |  | 
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| 19 |  | 
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| 20 | #include <linux/kernel.h> | 
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| 21 | #include <linux/module.h> | 
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| 22 | #include <linux/pci.h> | 
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| 23 |  | 
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| 24 | #include <pcmcia/ss.h> | 
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| 25 | #include <pcmcia/cistpl.h> | 
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| 26 |  | 
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| 27 | #include "cs_internal.h" | 
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| 28 |  | 
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| 29 | static void cardbus_config_irq_and_cls(struct pci_bus *bus, int irq) | 
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| 30 | { | 
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| 31 | struct pci_dev *dev; | 
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| 32 |  | 
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| 33 | list_for_each_entry(dev, &bus->devices, bus_list) { | 
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| 34 | u8 irq_pin; | 
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| 35 |  | 
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| 36 | /* | 
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| 37 | * Since there is only one interrupt available to | 
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| 38 | * CardBus devices, all devices downstream of this | 
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| 39 | * device must be using this IRQ. | 
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| 40 | */ | 
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| 41 | pci_read_config_byte(dev, PCI_INTERRUPT_PIN, val: &irq_pin); | 
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| 42 | if (irq_pin) { | 
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| 43 | dev->irq = irq; | 
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| 44 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, val: dev->irq); | 
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| 45 | } | 
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| 46 |  | 
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| 47 | /* | 
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| 48 | * Some controllers transfer very slowly with 0 CLS. | 
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| 49 | * Configure it.  This may fail as CLS configuration | 
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| 50 | * is mandatory only for MWI. | 
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| 51 | */ | 
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| 52 | pci_set_cacheline_size(dev); | 
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| 53 |  | 
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| 54 | if (dev->subordinate) | 
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| 55 | cardbus_config_irq_and_cls(bus: dev->subordinate, irq); | 
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| 56 | } | 
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| 57 | } | 
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| 58 |  | 
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| 59 | /** | 
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| 60 | * cb_alloc() - add CardBus device | 
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| 61 | * @s:		the pcmcia_socket where the CardBus device is located | 
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| 62 | * | 
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| 63 | * cb_alloc() allocates the kernel data structures for a Cardbus device | 
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| 64 | * and handles the lowest level PCI device setup issues. | 
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| 65 | */ | 
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| 66 | int __ref cb_alloc(struct pcmcia_socket *s) | 
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| 67 | { | 
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| 68 | struct pci_bus *bus = s->cb_dev->subordinate; | 
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| 69 | struct pci_dev *dev; | 
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| 70 | unsigned int max, pass; | 
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| 71 |  | 
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| 72 | pci_lock_rescan_remove(); | 
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| 73 |  | 
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| 74 | s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0)); | 
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| 75 |  | 
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| 76 | max = bus->busn_res.start; | 
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| 77 | for (pass = 0; pass < 2; pass++) | 
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| 78 | for_each_pci_bridge(dev, bus) | 
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| 79 | max = pci_scan_bridge(bus, dev, max, pass); | 
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| 80 |  | 
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| 81 | /* | 
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| 82 | * Size all resources below the CardBus controller. | 
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| 83 | */ | 
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| 84 | pci_bus_size_bridges(bus); | 
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| 85 | pci_bus_assign_resources(bus); | 
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| 86 | cardbus_config_irq_and_cls(bus, irq: s->pci_irq); | 
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| 87 |  | 
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| 88 | /* socket specific tune function */ | 
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| 89 | if (s->tune_bridge) | 
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| 90 | s->tune_bridge(s, bus); | 
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| 91 |  | 
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| 92 | pci_bus_add_devices(bus); | 
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| 93 |  | 
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| 94 | pci_unlock_rescan_remove(); | 
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| 95 | return 0; | 
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| 96 | } | 
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| 97 |  | 
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| 98 | /** | 
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| 99 | * cb_free() - remove CardBus device | 
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| 100 | * @s:		the pcmcia_socket where the CardBus device was located | 
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| 101 | * | 
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| 102 | * cb_free() handles the lowest level PCI device cleanup. | 
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| 103 | */ | 
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| 104 | void cb_free(struct pcmcia_socket *s) | 
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| 105 | { | 
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| 106 | struct pci_dev *bridge, *dev, *tmp; | 
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| 107 | struct pci_bus *bus; | 
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| 108 |  | 
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| 109 | bridge = s->cb_dev; | 
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| 110 | if (!bridge) | 
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| 111 | return; | 
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| 112 |  | 
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| 113 | bus = bridge->subordinate; | 
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| 114 | if (!bus) | 
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| 115 | return; | 
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| 116 |  | 
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| 117 | pci_lock_rescan_remove(); | 
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| 118 |  | 
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| 119 | list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list) | 
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| 120 | pci_stop_and_remove_bus_device(dev); | 
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| 121 |  | 
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| 122 | pci_unlock_rescan_remove(); | 
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| 123 | } | 
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| 124 |  | 
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