1/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2/******************************************************************************
3 *
4 * Name: actbl1.h - Additional ACPI table definitions
5 *
6 * Copyright (C) 2000 - 2025, Intel Corp.
7 *
8 *****************************************************************************/
9
10#ifndef __ACTBL1_H__
11#define __ACTBL1_H__
12
13/*******************************************************************************
14 *
15 * Additional ACPI Tables
16 *
17 * These tables are not consumed directly by the ACPICA subsystem, but are
18 * included here to support device drivers and the AML disassembler.
19 *
20 ******************************************************************************/
21
22/*
23 * Values for description table header signatures for tables defined in this
24 * file. Useful because they make it more difficult to inadvertently type in
25 * the wrong signature.
26 */
27#define ACPI_SIG_AEST "AEST" /* Arm Error Source Table */
28#define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */
29#define ACPI_SIG_ASPT "ASPT" /* AMD Secure Processor Table */
30#define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */
31#define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */
32#define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */
33#define ACPI_SIG_CEDT "CEDT" /* CXL Early Discovery Table */
34#define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */
35#define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */
36#define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */
37#define ACPI_SIG_DBGP "DBGP" /* Debug Port table */
38#define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */
39#define ACPI_SIG_DRTM "DRTM" /* Dynamic Root of Trust for Measurement table */
40#define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */
41#define ACPI_SIG_EINJ "EINJ" /* Error Injection table */
42#define ACPI_SIG_ERST "ERST" /* Error Record Serialization Table */
43#define ACPI_SIG_FPDT "FPDT" /* Firmware Performance Data Table */
44#define ACPI_SIG_GTDT "GTDT" /* Generic Timer Description Table */
45#define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */
46#define ACPI_SIG_HMAT "HMAT" /* Heterogeneous Memory Attributes Table */
47#define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */
48#define ACPI_SIG_IBFT "IBFT" /* iSCSI Boot Firmware Table */
49#define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
50
51#define ACPI_SIG_S3PT "S3PT" /* S3 Performance (sub)Table */
52#define ACPI_SIG_PCCS "PCC" /* PCC Shared Memory Region */
53
54#define ACPI_SIG_NBFT "NBFT" /* NVMe Boot Firmware Table */
55
56/* Reserved table signatures */
57
58#define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */
59#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
60
61/*
62 * These tables have been seen in the field, but no definition has been found
63 */
64#ifdef ACPI_UNDEFINED_TABLES
65#define ACPI_SIG_ATKG "ATKG"
66#define ACPI_SIG_GSCI "GSCI" /* GMCH SCI table */
67#define ACPI_SIG_IEIT "IEIT"
68#endif
69
70/*
71 * All tables must be byte-packed to match the ACPI specification, since
72 * the tables are provided by the system BIOS.
73 */
74#pragma pack(1)
75
76/*
77 * Note: C bitfields are not used for this reason:
78 *
79 * "Bitfields are great and easy to read, but unfortunately the C language
80 * does not specify the layout of bitfields in memory, which means they are
81 * essentially useless for dealing with packed data in on-disk formats or
82 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
83 * this decision was a design error in C. Ritchie could have picked an order
84 * and stuck with it." Norman Ramsey.
85 * See http://stackoverflow.com/a/1053662/41661
86 */
87
88/*******************************************************************************
89 *
90 * Common subtable headers
91 *
92 ******************************************************************************/
93
94/* Generic subtable header (used in MADT, SRAT, etc.) */
95
96struct acpi_subtable_header {
97 u8 type;
98 u8 length;
99};
100
101/* Subtable header for WHEA tables (EINJ, ERST, WDAT) */
102
103struct acpi_whea_header {
104 u8 action;
105 u8 instruction;
106 u8 flags;
107 u8 reserved;
108 struct acpi_generic_address register_region;
109 u64 value; /* Value used with Read/Write register */
110 u64 mask; /* Bitmask required for this register instruction */
111};
112
113/* https://docs.microsoft.com/en-us/windows-hardware/drivers/ddi/acpitabl/ns-acpitabl-aspt_table */
114#define ASPT_REVISION_ID 0x01
115struct acpi_table_aspt {
116 struct acpi_table_header header;
117 u32 num_entries;
118};
119
120struct acpi_aspt_header {
121 u16 type;
122 u16 length;
123};
124
125enum acpi_aspt_type {
126 ACPI_ASPT_TYPE_GLOBAL_REGS = 0,
127 ACPI_ASPT_TYPE_SEV_MBOX_REGS = 1,
128 ACPI_ASPT_TYPE_ACPI_MBOX_REGS = 2,
129};
130
131/* 0: ASPT Global Registers */
132struct acpi_aspt_global_regs {
133 struct acpi_aspt_header header;
134 u32 reserved;
135 u64 feature_reg_addr;
136 u64 irq_en_reg_addr;
137 u64 irq_st_reg_addr;
138};
139
140/* 1: ASPT SEV Mailbox Registers */
141struct acpi_aspt_sev_mbox_regs {
142 struct acpi_aspt_header header;
143 u8 mbox_irq_id;
144 u8 reserved[3];
145 u64 cmd_resp_reg_addr;
146 u64 cmd_buf_lo_reg_addr;
147 u64 cmd_buf_hi_reg_addr;
148};
149
150/* 2: ASPT ACPI Mailbox Registers */
151struct acpi_aspt_acpi_mbox_regs {
152 struct acpi_aspt_header header;
153 u32 reserved1;
154 u64 cmd_resp_reg_addr;
155 u64 reserved2[2];
156};
157
158/* Larger subtable header (when Length can exceed 255) */
159
160struct acpi_subtbl_hdr_16 {
161 u16 type;
162 u16 length;
163};
164
165/*******************************************************************************
166 *
167 * ASF - Alert Standard Format table (Signature "ASF!")
168 * Revision 0x10
169 *
170 * Conforms to the Alert Standard Format Specification V2.0, 23 April 2003
171 *
172 ******************************************************************************/
173
174struct acpi_table_asf {
175 struct acpi_table_header header; /* Common ACPI table header */
176};
177
178/* ASF subtable header */
179
180struct acpi_asf_header {
181 u8 type;
182 u8 reserved;
183 u16 length;
184};
185
186/* Values for Type field above */
187
188enum acpi_asf_type {
189 ACPI_ASF_TYPE_INFO = 0,
190 ACPI_ASF_TYPE_ALERT = 1,
191 ACPI_ASF_TYPE_CONTROL = 2,
192 ACPI_ASF_TYPE_BOOT = 3,
193 ACPI_ASF_TYPE_ADDRESS = 4,
194 ACPI_ASF_TYPE_RESERVED = 5
195};
196
197/*
198 * ASF subtables
199 */
200
201/* 0: ASF Information */
202
203struct acpi_asf_info {
204 struct acpi_asf_header header;
205 u8 min_reset_value;
206 u8 min_poll_interval;
207 u16 system_id;
208 u32 mfg_id;
209 u8 flags;
210 u8 reserved2[3];
211};
212
213/* Masks for Flags field above */
214
215#define ACPI_ASF_SMBUS_PROTOCOLS (1)
216
217/* 1: ASF Alerts */
218
219struct acpi_asf_alert {
220 struct acpi_asf_header header;
221 u8 assert_mask;
222 u8 deassert_mask;
223 u8 alerts;
224 u8 data_length;
225};
226
227struct acpi_asf_alert_data {
228 u8 address;
229 u8 command;
230 u8 mask;
231 u8 value;
232 u8 sensor_type;
233 u8 type;
234 u8 offset;
235 u8 source_type;
236 u8 severity;
237 u8 sensor_number;
238 u8 entity;
239 u8 instance;
240};
241
242/* 2: ASF Remote Control */
243
244struct acpi_asf_remote {
245 struct acpi_asf_header header;
246 u8 controls;
247 u8 data_length;
248 u16 reserved2;
249};
250
251struct acpi_asf_control_data {
252 u8 function;
253 u8 address;
254 u8 command;
255 u8 value;
256};
257
258/* 3: ASF RMCP Boot Options */
259
260struct acpi_asf_rmcp {
261 struct acpi_asf_header header;
262 u8 capabilities[7];
263 u8 completion_code;
264 u32 enterprise_id;
265 u8 command;
266 u16 parameter;
267 u16 boot_options;
268 u16 oem_parameters;
269};
270
271/* 4: ASF Address */
272
273struct acpi_asf_address {
274 struct acpi_asf_header header;
275 u8 eprom_address;
276 u8 devices;
277};
278
279/*******************************************************************************
280 *
281 * BERT - Boot Error Record Table (ACPI 4.0)
282 * Version 1
283 *
284 ******************************************************************************/
285
286struct acpi_table_bert {
287 struct acpi_table_header header; /* Common ACPI table header */
288 u32 region_length; /* Length of the boot error region */
289 u64 address; /* Physical address of the error region */
290};
291
292/* Boot Error Region (not a subtable, pointed to by Address field above) */
293
294struct acpi_bert_region {
295 u32 block_status; /* Type of error information */
296 u32 raw_data_offset; /* Offset to raw error data */
297 u32 raw_data_length; /* Length of raw error data */
298 u32 data_length; /* Length of generic error data */
299 u32 error_severity; /* Severity code */
300};
301
302/* Values for block_status flags above */
303
304#define ACPI_BERT_UNCORRECTABLE (1)
305#define ACPI_BERT_CORRECTABLE (1<<1)
306#define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2)
307#define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3)
308#define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */
309
310/* Values for error_severity above */
311
312enum acpi_bert_error_severity {
313 ACPI_BERT_ERROR_CORRECTABLE = 0,
314 ACPI_BERT_ERROR_FATAL = 1,
315 ACPI_BERT_ERROR_CORRECTED = 2,
316 ACPI_BERT_ERROR_NONE = 3,
317 ACPI_BERT_ERROR_RESERVED = 4 /* 4 and greater are reserved */
318};
319
320/*
321 * Note: The generic error data that follows the error_severity field above
322 * uses the struct acpi_hest_generic_data defined under the HEST table below
323 */
324
325/*******************************************************************************
326 *
327 * BGRT - Boot Graphics Resource Table (ACPI 5.0)
328 * Version 1
329 *
330 ******************************************************************************/
331
332struct acpi_table_bgrt {
333 struct acpi_table_header header; /* Common ACPI table header */
334 u16 version;
335 u8 status;
336 u8 image_type;
337 u64 image_address;
338 u32 image_offset_x;
339 u32 image_offset_y;
340};
341
342/* Flags for Status field above */
343
344#define ACPI_BGRT_DISPLAYED (1)
345#define ACPI_BGRT_ORIENTATION_OFFSET (3 << 1)
346
347/*******************************************************************************
348 *
349 * BOOT - Simple Boot Flag Table
350 * Version 1
351 *
352 * Conforms to the "Simple Boot Flag Specification", Version 2.1
353 *
354 ******************************************************************************/
355
356struct acpi_table_boot {
357 struct acpi_table_header header; /* Common ACPI table header */
358 u8 cmos_index; /* Index in CMOS RAM for the boot register */
359 u8 reserved[3];
360};
361
362/*******************************************************************************
363 *
364 * CDAT - Coherent Device Attribute Table
365 * Version 1
366 *
367 * Conforms to the "Coherent Device Attribute Table (CDAT) Specification
368 " (Revision 1.01, October 2020.)
369 *
370 ******************************************************************************/
371
372struct acpi_table_cdat {
373 u32 length; /* Length of table in bytes, including this header */
374 u8 revision; /* ACPI Specification minor version number */
375 u8 checksum; /* To make sum of entire table == 0 */
376 u8 reserved[6];
377 u32 sequence; /* Used to detect runtime CDAT table changes */
378};
379
380/* CDAT common subtable header */
381
382struct acpi_cdat_header {
383 u8 type;
384 u8 reserved;
385 u16 length;
386};
387
388/* Values for Type field above */
389
390enum acpi_cdat_type {
391 ACPI_CDAT_TYPE_DSMAS = 0,
392 ACPI_CDAT_TYPE_DSLBIS = 1,
393 ACPI_CDAT_TYPE_DSMSCIS = 2,
394 ACPI_CDAT_TYPE_DSIS = 3,
395 ACPI_CDAT_TYPE_DSEMTS = 4,
396 ACPI_CDAT_TYPE_SSLBIS = 5,
397 ACPI_CDAT_TYPE_RESERVED = 6 /* 6 through 0xFF are reserved */
398};
399
400/* Subtable 0: Device Scoped Memory Affinity Structure (DSMAS) */
401
402struct acpi_cdat_dsmas {
403 u8 dsmad_handle;
404 u8 flags;
405 u16 reserved;
406 u64 dpa_base_address;
407 u64 dpa_length;
408};
409
410/* Flags for subtable above */
411
412#define ACPI_CDAT_DSMAS_NON_VOLATILE (1 << 2)
413#define ACPI_CDAT_DSMAS_SHAREABLE (1 << 3)
414#define ACPI_CDAT_DSMAS_READ_ONLY (1 << 6)
415
416/* Subtable 1: Device scoped Latency and Bandwidth Information Structure (DSLBIS) */
417
418struct acpi_cdat_dslbis {
419 u8 handle;
420 u8 flags; /* If Handle matches a DSMAS handle, the definition of this field matches
421 * Flags field in HMAT System Locality Latency */
422 u8 data_type;
423 u8 reserved;
424 u64 entry_base_unit;
425 u16 entry[3];
426 u16 reserved2;
427};
428
429/* Subtable 2: Device Scoped Memory Side Cache Information Structure (DSMSCIS) */
430
431struct acpi_cdat_dsmscis {
432 u8 dsmas_handle;
433 u8 reserved[3];
434 u64 side_cache_size;
435 u32 cache_attributes;
436};
437
438/* Subtable 3: Device Scoped Initiator Structure (DSIS) */
439
440struct acpi_cdat_dsis {
441 u8 flags;
442 u8 handle;
443 u16 reserved;
444};
445
446/* Flags for above subtable */
447
448#define ACPI_CDAT_DSIS_MEM_ATTACHED (1 << 0)
449
450/* Subtable 4: Device Scoped EFI Memory Type Structure (DSEMTS) */
451
452struct acpi_cdat_dsemts {
453 u8 dsmas_handle;
454 u8 memory_type;
455 u16 reserved;
456 u64 dpa_offset;
457 u64 range_length;
458};
459
460/* Subtable 5: Switch Scoped Latency and Bandwidth Information Structure (SSLBIS) */
461
462struct acpi_cdat_sslbis {
463 u8 data_type;
464 u8 reserved[3];
465 u64 entry_base_unit;
466};
467
468/* Sub-subtable for above, sslbe_entries field */
469
470struct acpi_cdat_sslbe {
471 u16 portx_id;
472 u16 porty_id;
473 u16 latency_or_bandwidth;
474 u16 reserved;
475};
476
477#define ACPI_CDAT_SSLBIS_US_PORT 0x0100
478#define ACPI_CDAT_SSLBIS_ANY_PORT 0xffff
479
480/*******************************************************************************
481 *
482 * CEDT - CXL Early Discovery Table
483 * Version 1
484 *
485 * Conforms to the "CXL Early Discovery Table" (CXL 2.0, October 2020)
486 *
487 ******************************************************************************/
488
489struct acpi_table_cedt {
490 struct acpi_table_header header; /* Common ACPI table header */
491};
492
493/* CEDT subtable header (Performance Record Structure) */
494
495struct acpi_cedt_header {
496 u8 type;
497 u8 reserved;
498 u16 length;
499};
500
501/* Values for Type field above */
502
503enum acpi_cedt_type {
504 ACPI_CEDT_TYPE_CHBS = 0,
505 ACPI_CEDT_TYPE_CFMWS = 1,
506 ACPI_CEDT_TYPE_CXIMS = 2,
507 ACPI_CEDT_TYPE_RDPAS = 3,
508 ACPI_CEDT_TYPE_RESERVED = 4,
509};
510
511/* Values for version field above */
512
513#define ACPI_CEDT_CHBS_VERSION_CXL11 (0)
514#define ACPI_CEDT_CHBS_VERSION_CXL20 (1)
515
516/* Values for length field above */
517
518#define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000)
519#define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x10000)
520
521/*
522 * CEDT subtables
523 */
524
525/* 0: CXL Host Bridge Structure */
526
527struct acpi_cedt_chbs {
528 struct acpi_cedt_header header;
529 u32 uid;
530 u32 cxl_version;
531 u32 reserved;
532 u64 base;
533 u64 length;
534};
535
536/* 1: CXL Fixed Memory Window Structure */
537
538struct acpi_cedt_cfmws {
539 struct acpi_cedt_header header;
540 u32 reserved1;
541 u64 base_hpa;
542 u64 window_size;
543 u8 interleave_ways;
544 u8 interleave_arithmetic;
545 u16 reserved2;
546 u32 granularity;
547 u16 restrictions;
548 u16 qtg_id;
549 u32 interleave_targets[];
550};
551
552struct acpi_cedt_cfmws_target_element {
553 u32 interleave_target;
554};
555
556/* Values for Interleave Arithmetic field above */
557
558#define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0)
559#define ACPI_CEDT_CFMWS_ARITHMETIC_XOR (1)
560
561/* Values for Restrictions field above */
562
563#define ACPI_CEDT_CFMWS_RESTRICT_DEVMEM (1)
564#define ACPI_CEDT_CFMWS_RESTRICT_HOSTONLYMEM (1<<1)
565#define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE (1<<2)
566#define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1<<3)
567#define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1<<4)
568#define ACPI_CEDT_CFMWS_RESTRICT_BI (1<<5)
569
570/* 2: CXL XOR Interleave Math Structure */
571
572struct acpi_cedt_cxims {
573 struct acpi_cedt_header header;
574 u16 reserved1;
575 u8 hbig;
576 u8 nr_xormaps;
577 u64 xormap_list[];
578};
579
580struct acpi_cedt_cxims_target_element {
581 u64 xormap;
582};
583
584/* 3: CXL RCEC Downstream Port Association Structure */
585
586struct acpi_cedt_rdpas {
587 struct acpi_cedt_header header;
588 u16 segment;
589 u16 bdf;
590 u8 protocol;
591 u64 address;
592};
593
594/* Masks for bdf field above */
595#define ACPI_CEDT_RDPAS_BUS_MASK 0xff00
596#define ACPI_CEDT_RDPAS_DEVICE_MASK 0x00f8
597#define ACPI_CEDT_RDPAS_FUNCTION_MASK 0x0007
598
599#define ACPI_CEDT_RDPAS_PROTOCOL_IO (0)
600#define ACPI_CEDT_RDPAS_PROTOCOL_CACHEMEM (1)
601
602/*******************************************************************************
603 *
604 * CPEP - Corrected Platform Error Polling table (ACPI 4.0)
605 * Version 1
606 *
607 ******************************************************************************/
608
609struct acpi_table_cpep {
610 struct acpi_table_header header; /* Common ACPI table header */
611 u64 reserved;
612};
613
614/* Subtable */
615
616struct acpi_cpep_polling {
617 struct acpi_subtable_header header;
618 u8 id; /* Processor ID */
619 u8 eid; /* Processor EID */
620 u32 interval; /* Polling interval (msec) */
621};
622
623/*******************************************************************************
624 *
625 * CSRT - Core System Resource Table
626 * Version 0
627 *
628 * Conforms to the "Core System Resource Table (CSRT)", November 14, 2011
629 *
630 ******************************************************************************/
631
632struct acpi_table_csrt {
633 struct acpi_table_header header; /* Common ACPI table header */
634};
635
636/* Resource Group subtable */
637
638struct acpi_csrt_group {
639 u32 length;
640 u32 vendor_id;
641 u32 subvendor_id;
642 u16 device_id;
643 u16 subdevice_id;
644 u16 revision;
645 u16 reserved;
646 u32 shared_info_length;
647
648 /* Shared data immediately follows (Length = shared_info_length) */
649};
650
651/* Shared Info subtable */
652
653struct acpi_csrt_shared_info {
654 u16 major_version;
655 u16 minor_version;
656 u32 mmio_base_low;
657 u32 mmio_base_high;
658 u32 gsi_interrupt;
659 u8 interrupt_polarity;
660 u8 interrupt_mode;
661 u8 num_channels;
662 u8 dma_address_width;
663 u16 base_request_line;
664 u16 num_handshake_signals;
665 u32 max_block_size;
666
667 /* Resource descriptors immediately follow (Length = Group length - shared_info_length) */
668};
669
670/* Resource Descriptor subtable */
671
672struct acpi_csrt_descriptor {
673 u32 length;
674 u16 type;
675 u16 subtype;
676 u32 uid;
677
678 /* Resource-specific information immediately follows */
679};
680
681/* Resource Types */
682
683#define ACPI_CSRT_TYPE_INTERRUPT 0x0001
684#define ACPI_CSRT_TYPE_TIMER 0x0002
685#define ACPI_CSRT_TYPE_DMA 0x0003
686
687/* Resource Subtypes */
688
689#define ACPI_CSRT_XRUPT_LINE 0x0000
690#define ACPI_CSRT_XRUPT_CONTROLLER 0x0001
691#define ACPI_CSRT_TIMER 0x0000
692#define ACPI_CSRT_DMA_CHANNEL 0x0000
693#define ACPI_CSRT_DMA_CONTROLLER 0x0001
694
695/*******************************************************************************
696 *
697 * DBG2 - Debug Port Table 2
698 * Version 0 (Both main table and subtables)
699 *
700 * Conforms to "Microsoft Debug Port Table 2 (DBG2)", September 21, 2020
701 *
702 ******************************************************************************/
703
704struct acpi_table_dbg2 {
705 struct acpi_table_header header; /* Common ACPI table header */
706 u32 info_offset;
707 u32 info_count;
708};
709
710struct acpi_dbg2_header {
711 u32 info_offset;
712 u32 info_count;
713};
714
715/* Debug Device Information Subtable */
716
717struct acpi_dbg2_device {
718 u8 revision;
719 u16 length;
720 u8 register_count; /* Number of base_address registers */
721 u16 namepath_length;
722 u16 namepath_offset;
723 u16 oem_data_length;
724 u16 oem_data_offset;
725 u16 port_type;
726 u16 port_subtype;
727 u16 reserved;
728 u16 base_address_offset;
729 u16 address_size_offset;
730 /*
731 * Data that follows:
732 * base_address (required) - Each in 12-byte Generic Address Structure format.
733 * address_size (required) - Array of u32 sizes corresponding to each base_address register.
734 * Namepath (required) - Null terminated string. Single dot if not supported.
735 * oem_data (optional) - Length is oem_data_length.
736 */
737};
738
739/* Types for port_type field above */
740
741#define ACPI_DBG2_SERIAL_PORT 0x8000
742#define ACPI_DBG2_1394_PORT 0x8001
743#define ACPI_DBG2_USB_PORT 0x8002
744#define ACPI_DBG2_NET_PORT 0x8003
745
746/* Subtypes for port_subtype field above */
747
748#define ACPI_DBG2_16550_COMPATIBLE 0x0000
749#define ACPI_DBG2_16550_SUBSET 0x0001
750#define ACPI_DBG2_MAX311XE_SPI 0x0002
751#define ACPI_DBG2_ARM_PL011 0x0003
752#define ACPI_DBG2_MSM8X60 0x0004
753#define ACPI_DBG2_16550_NVIDIA 0x0005
754#define ACPI_DBG2_TI_OMAP 0x0006
755#define ACPI_DBG2_APM88XXXX 0x0008
756#define ACPI_DBG2_MSM8974 0x0009
757#define ACPI_DBG2_SAM5250 0x000A
758#define ACPI_DBG2_INTEL_USIF 0x000B
759#define ACPI_DBG2_IMX6 0x000C
760#define ACPI_DBG2_ARM_SBSA_32BIT 0x000D
761#define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E
762#define ACPI_DBG2_ARM_DCC 0x000F
763#define ACPI_DBG2_BCM2835 0x0010
764#define ACPI_DBG2_SDM845_1_8432MHZ 0x0011
765#define ACPI_DBG2_16550_WITH_GAS 0x0012
766#define ACPI_DBG2_SDM845_7_372MHZ 0x0013
767#define ACPI_DBG2_INTEL_LPSS 0x0014
768#define ACPI_DBG2_RISCV_SBI_CON 0x0015
769
770#define ACPI_DBG2_1394_STANDARD 0x0000
771
772#define ACPI_DBG2_USB_XHCI 0x0000
773#define ACPI_DBG2_USB_EHCI 0x0001
774
775/*******************************************************************************
776 *
777 * DBGP - Debug Port table
778 * Version 1
779 *
780 * Conforms to the "Debug Port Specification", Version 1.00, 2/9/2000
781 *
782 ******************************************************************************/
783
784struct acpi_table_dbgp {
785 struct acpi_table_header header; /* Common ACPI table header */
786 u8 type; /* 0=full 16550, 1=subset of 16550 */
787 u8 reserved[3];
788 struct acpi_generic_address debug_port;
789};
790
791/*******************************************************************************
792 *
793 * DMAR - DMA Remapping table
794 * Version 1
795 *
796 * Conforms to "Intel Virtualization Technology for Directed I/O",
797 * Version 2.3, October 2014
798 *
799 ******************************************************************************/
800
801struct acpi_table_dmar {
802 struct acpi_table_header header; /* Common ACPI table header */
803 u8 width; /* Host Address Width */
804 u8 flags;
805 u8 reserved[10];
806};
807
808/* Masks for Flags field above */
809
810#define ACPI_DMAR_INTR_REMAP (1)
811#define ACPI_DMAR_X2APIC_OPT_OUT (1<<1)
812#define ACPI_DMAR_X2APIC_MODE (1<<2)
813
814/* DMAR subtable header */
815
816struct acpi_dmar_header {
817 u16 type;
818 u16 length;
819};
820
821/* Values for subtable type in struct acpi_dmar_header */
822
823enum acpi_dmar_type {
824 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0,
825 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1,
826 ACPI_DMAR_TYPE_ROOT_ATS = 2,
827 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3,
828 ACPI_DMAR_TYPE_NAMESPACE = 4,
829 ACPI_DMAR_TYPE_SATC = 5,
830 ACPI_DMAR_TYPE_SIDP = 6,
831 ACPI_DMAR_TYPE_RESERVED = 7 /* 7 and greater are reserved */
832};
833
834/* DMAR Device Scope structure */
835
836struct acpi_dmar_device_scope {
837 u8 entry_type;
838 u8 length;
839 u8 flags;
840 u8 reserved;
841 u8 enumeration_id;
842 u8 bus;
843};
844
845/* Values for entry_type in struct acpi_dmar_device_scope - device types */
846
847enum acpi_dmar_scope_type {
848 ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0,
849 ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1,
850 ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2,
851 ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3,
852 ACPI_DMAR_SCOPE_TYPE_HPET = 4,
853 ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5,
854 ACPI_DMAR_SCOPE_TYPE_RESERVED = 6 /* 6 and greater are reserved */
855};
856
857struct acpi_dmar_pci_path {
858 u8 device;
859 u8 function;
860};
861
862/*
863 * DMAR Subtables, correspond to Type in struct acpi_dmar_header
864 */
865
866/* 0: Hardware Unit Definition */
867
868struct acpi_dmar_hardware_unit {
869 struct acpi_dmar_header header;
870 u8 flags;
871 u8 size; /* Size of the register set */
872 u16 segment;
873 u64 address; /* Register Base Address */
874};
875
876/* Masks for Flags field above */
877
878#define ACPI_DMAR_INCLUDE_ALL (1)
879
880/* 1: Reserved Memory Definition */
881
882struct acpi_dmar_reserved_memory {
883 struct acpi_dmar_header header;
884 u16 reserved;
885 u16 segment;
886 u64 base_address; /* 4K aligned base address */
887 u64 end_address; /* 4K aligned limit address */
888};
889
890/* Masks for Flags field above */
891
892#define ACPI_DMAR_ALLOW_ALL (1)
893
894/* 2: Root Port ATS Capability Reporting Structure */
895
896struct acpi_dmar_atsr {
897 struct acpi_dmar_header header;
898 u8 flags;
899 u8 reserved;
900 u16 segment;
901};
902
903/* Masks for Flags field above */
904
905#define ACPI_DMAR_ALL_PORTS (1)
906
907/* 3: Remapping Hardware Static Affinity Structure */
908
909struct acpi_dmar_rhsa {
910 struct acpi_dmar_header header;
911 u32 reserved;
912 u64 base_address;
913 u32 proximity_domain;
914};
915
916/* 4: ACPI Namespace Device Declaration Structure */
917
918struct acpi_dmar_andd {
919 struct acpi_dmar_header header;
920 u8 reserved[3];
921 u8 device_number;
922 union {
923 char __pad;
924 ACPI_FLEX_ARRAY(char, device_name);
925 };
926};
927
928/* 5: SOC Integrated Address Translation Cache Reporting Structure */
929
930struct acpi_dmar_satc {
931 struct acpi_dmar_header header;
932 u8 flags;
933 u8 reserved;
934 u16 segment;
935};
936
937/* 6: so_c Integrated Device Property Reporting Structure */
938
939struct acpi_dmar_sidp {
940 struct acpi_dmar_header header;
941 u16 reserved;
942 u16 segment;
943};
944
945/*******************************************************************************
946 *
947 * DRTM - Dynamic Root of Trust for Measurement table
948 * Conforms to "TCG D-RTM Architecture" June 17 2013, Version 1.0.0
949 * Table version 1
950 *
951 ******************************************************************************/
952
953struct acpi_table_drtm {
954 struct acpi_table_header header; /* Common ACPI table header */
955 u64 entry_base_address;
956 u64 entry_length;
957 u32 entry_address32;
958 u64 entry_address64;
959 u64 exit_address;
960 u64 log_area_address;
961 u32 log_area_length;
962 u64 arch_dependent_address;
963 u32 flags;
964};
965
966/* Flag Definitions for above */
967
968#define ACPI_DRTM_ACCESS_ALLOWED (1)
969#define ACPI_DRTM_ENABLE_GAP_CODE (1<<1)
970#define ACPI_DRTM_INCOMPLETE_MEASUREMENTS (1<<2)
971#define ACPI_DRTM_AUTHORITY_ORDER (1<<3)
972
973/* 1) Validated Tables List (64-bit addresses) */
974
975struct acpi_drtm_vtable_list {
976 u32 validated_table_count;
977 u64 validated_tables[];
978};
979
980/* 2) Resources List (of Resource Descriptors) */
981
982/* Resource Descriptor */
983
984struct acpi_drtm_resource {
985 u8 size[7];
986 u8 type;
987 u64 address;
988};
989
990struct acpi_drtm_resource_list {
991 u32 resource_count;
992 struct acpi_drtm_resource resources[];
993};
994
995/* 3) Platform-specific Identifiers List */
996
997struct acpi_drtm_dps_id {
998 u32 dps_id_length;
999 u8 dps_id[16];
1000};
1001
1002/*******************************************************************************
1003 *
1004 * ECDT - Embedded Controller Boot Resources Table
1005 * Version 1
1006 *
1007 ******************************************************************************/
1008
1009struct acpi_table_ecdt {
1010 struct acpi_table_header header; /* Common ACPI table header */
1011 struct acpi_generic_address control; /* Address of EC command/status register */
1012 struct acpi_generic_address data; /* Address of EC data register */
1013 u32 uid; /* Unique ID - must be same as the EC _UID method */
1014 u8 gpe; /* The GPE for the EC */
1015 u8 id[]; /* Full namepath of the EC in the ACPI namespace */
1016};
1017
1018/*******************************************************************************
1019 *
1020 * EINJ - Error Injection Table (ACPI 4.0)
1021 * Version 1
1022 *
1023 ******************************************************************************/
1024
1025struct acpi_table_einj {
1026 struct acpi_table_header header; /* Common ACPI table header */
1027 u32 header_length;
1028 u8 flags;
1029 u8 reserved[3];
1030 u32 entries;
1031};
1032
1033/* EINJ Injection Instruction Entries (actions) */
1034
1035struct acpi_einj_entry {
1036 struct acpi_whea_header whea_header; /* Common header for WHEA tables */
1037};
1038
1039/* Masks for Flags field above */
1040
1041#define ACPI_EINJ_PRESERVE (1)
1042
1043/* Values for Action field above */
1044
1045enum acpi_einj_actions {
1046 ACPI_EINJ_BEGIN_OPERATION = 0x0,
1047 ACPI_EINJ_GET_TRIGGER_TABLE = 0x1,
1048 ACPI_EINJ_SET_ERROR_TYPE = 0x2,
1049 ACPI_EINJ_GET_ERROR_TYPE = 0x3,
1050 ACPI_EINJ_END_OPERATION = 0x4,
1051 ACPI_EINJ_EXECUTE_OPERATION = 0x5,
1052 ACPI_EINJ_CHECK_BUSY_STATUS = 0x6,
1053 ACPI_EINJ_GET_COMMAND_STATUS = 0x7,
1054 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 0x8,
1055 ACPI_EINJ_GET_EXECUTE_TIMINGS = 0x9,
1056 ACPI_EINJV2_GET_ERROR_TYPE = 0x11,
1057 ACPI_EINJ_ACTION_RESERVED = 0x12, /* 0x12 and greater are reserved */
1058 ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */
1059};
1060
1061/* Values for Instruction field above */
1062
1063enum acpi_einj_instructions {
1064 ACPI_EINJ_READ_REGISTER = 0,
1065 ACPI_EINJ_READ_REGISTER_VALUE = 1,
1066 ACPI_EINJ_WRITE_REGISTER = 2,
1067 ACPI_EINJ_WRITE_REGISTER_VALUE = 3,
1068 ACPI_EINJ_NOOP = 4,
1069 ACPI_EINJ_FLUSH_CACHELINE = 5,
1070 ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */
1071};
1072
1073struct acpi_einj_error_type_with_addr {
1074 u32 error_type;
1075 u32 vendor_struct_offset;
1076 u32 flags;
1077 u32 apic_id;
1078 u64 address;
1079 u64 range;
1080 u32 pcie_id;
1081};
1082
1083struct acpi_einj_vendor {
1084 u32 length;
1085 u32 pcie_id;
1086 u16 vendor_id;
1087 u16 device_id;
1088 u8 revision_id;
1089 u8 reserved[3];
1090};
1091
1092/* EINJ Trigger Error Action Table */
1093
1094struct acpi_einj_trigger {
1095 u32 header_size;
1096 u32 revision;
1097 u32 table_size;
1098 u32 entry_count;
1099};
1100
1101/* Command status return values */
1102
1103enum acpi_einj_command_status {
1104 ACPI_EINJ_SUCCESS = 0,
1105 ACPI_EINJ_FAILURE = 1,
1106 ACPI_EINJ_INVALID_ACCESS = 2,
1107 ACPI_EINJ_STATUS_RESERVED = 3 /* 3 and greater are reserved */
1108};
1109
1110/* Error types returned from ACPI_EINJ_GET_ERROR_TYPE (bitfield) */
1111
1112#define ACPI_EINJ_PROCESSOR_CORRECTABLE (1)
1113#define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1)
1114#define ACPI_EINJ_PROCESSOR_FATAL (1<<2)
1115#define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3)
1116#define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4)
1117#define ACPI_EINJ_MEMORY_FATAL (1<<5)
1118#define ACPI_EINJ_PCIX_CORRECTABLE (1<<6)
1119#define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7)
1120#define ACPI_EINJ_PCIX_FATAL (1<<8)
1121#define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9)
1122#define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10)
1123#define ACPI_EINJ_PLATFORM_FATAL (1<<11)
1124#define ACPI_EINJ_CXL_CACHE_CORRECTABLE (1<<12)
1125#define ACPI_EINJ_CXL_CACHE_UNCORRECTABLE (1<<13)
1126#define ACPI_EINJ_CXL_CACHE_FATAL (1<<14)
1127#define ACPI_EINJ_CXL_MEM_CORRECTABLE (1<<15)
1128#define ACPI_EINJ_CXL_MEM_UNCORRECTABLE (1<<16)
1129#define ACPI_EINJ_CXL_MEM_FATAL (1<<17)
1130#define ACPI_EINJ_VENDOR_DEFINED (1<<31)
1131
1132/*******************************************************************************
1133 *
1134 * ERST - Error Record Serialization Table (ACPI 4.0)
1135 * Version 1
1136 *
1137 ******************************************************************************/
1138
1139struct acpi_table_erst {
1140 struct acpi_table_header header; /* Common ACPI table header */
1141 u32 header_length;
1142 u32 reserved;
1143 u32 entries;
1144};
1145
1146/* ERST Serialization Entries (actions) */
1147
1148struct acpi_erst_entry {
1149 struct acpi_whea_header whea_header; /* Common header for WHEA tables */
1150};
1151
1152/* Masks for Flags field above */
1153
1154#define ACPI_ERST_PRESERVE (1)
1155
1156/* Values for Action field above */
1157
1158enum acpi_erst_actions {
1159 ACPI_ERST_BEGIN_WRITE = 0,
1160 ACPI_ERST_BEGIN_READ = 1,
1161 ACPI_ERST_BEGIN_CLEAR = 2,
1162 ACPI_ERST_END = 3,
1163 ACPI_ERST_SET_RECORD_OFFSET = 4,
1164 ACPI_ERST_EXECUTE_OPERATION = 5,
1165 ACPI_ERST_CHECK_BUSY_STATUS = 6,
1166 ACPI_ERST_GET_COMMAND_STATUS = 7,
1167 ACPI_ERST_GET_RECORD_ID = 8,
1168 ACPI_ERST_SET_RECORD_ID = 9,
1169 ACPI_ERST_GET_RECORD_COUNT = 10,
1170 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11,
1171 ACPI_ERST_NOT_USED = 12,
1172 ACPI_ERST_GET_ERROR_RANGE = 13,
1173 ACPI_ERST_GET_ERROR_LENGTH = 14,
1174 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15,
1175 ACPI_ERST_EXECUTE_TIMINGS = 16,
1176 ACPI_ERST_ACTION_RESERVED = 17 /* 17 and greater are reserved */
1177};
1178
1179/* Values for Instruction field above */
1180
1181enum acpi_erst_instructions {
1182 ACPI_ERST_READ_REGISTER = 0,
1183 ACPI_ERST_READ_REGISTER_VALUE = 1,
1184 ACPI_ERST_WRITE_REGISTER = 2,
1185 ACPI_ERST_WRITE_REGISTER_VALUE = 3,
1186 ACPI_ERST_NOOP = 4,
1187 ACPI_ERST_LOAD_VAR1 = 5,
1188 ACPI_ERST_LOAD_VAR2 = 6,
1189 ACPI_ERST_STORE_VAR1 = 7,
1190 ACPI_ERST_ADD = 8,
1191 ACPI_ERST_SUBTRACT = 9,
1192 ACPI_ERST_ADD_VALUE = 10,
1193 ACPI_ERST_SUBTRACT_VALUE = 11,
1194 ACPI_ERST_STALL = 12,
1195 ACPI_ERST_STALL_WHILE_TRUE = 13,
1196 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14,
1197 ACPI_ERST_GOTO = 15,
1198 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16,
1199 ACPI_ERST_SET_DST_ADDRESS_BASE = 17,
1200 ACPI_ERST_MOVE_DATA = 18,
1201 ACPI_ERST_INSTRUCTION_RESERVED = 19 /* 19 and greater are reserved */
1202};
1203
1204/* Command status return values */
1205
1206enum acpi_erst_command_status {
1207 ACPI_ERST_SUCCESS = 0,
1208 ACPI_ERST_NO_SPACE = 1,
1209 ACPI_ERST_NOT_AVAILABLE = 2,
1210 ACPI_ERST_FAILURE = 3,
1211 ACPI_ERST_RECORD_EMPTY = 4,
1212 ACPI_ERST_NOT_FOUND = 5,
1213 ACPI_ERST_STATUS_RESERVED = 6 /* 6 and greater are reserved */
1214};
1215
1216/* Error Record Serialization Information */
1217
1218struct acpi_erst_info {
1219 u16 signature; /* Should be "ER" */
1220 u8 data[48];
1221};
1222
1223/*******************************************************************************
1224 *
1225 * FPDT - Firmware Performance Data Table (ACPI 5.0)
1226 * Version 1
1227 *
1228 ******************************************************************************/
1229
1230struct acpi_table_fpdt {
1231 struct acpi_table_header header; /* Common ACPI table header */
1232};
1233
1234/* FPDT subtable header (Performance Record Structure) */
1235
1236struct acpi_fpdt_header {
1237 u16 type;
1238 u8 length;
1239 u8 revision;
1240};
1241
1242/* Values for Type field above */
1243
1244enum acpi_fpdt_type {
1245 ACPI_FPDT_TYPE_BOOT = 0,
1246 ACPI_FPDT_TYPE_S3PERF = 1
1247};
1248
1249/*
1250 * FPDT subtables
1251 */
1252
1253/* 0: Firmware Basic Boot Performance Record */
1254
1255struct acpi_fpdt_boot_pointer {
1256 struct acpi_fpdt_header header;
1257 u8 reserved[4];
1258 u64 address;
1259};
1260
1261/* 1: S3 Performance Table Pointer Record */
1262
1263struct acpi_fpdt_s3pt_pointer {
1264 struct acpi_fpdt_header header;
1265 u8 reserved[4];
1266 u64 address;
1267};
1268
1269/*
1270 * S3PT - S3 Performance Table. This table is pointed to by the
1271 * S3 Pointer Record above.
1272 */
1273struct acpi_table_s3pt {
1274 u8 signature[4]; /* "S3PT" */
1275 u32 length;
1276};
1277
1278/*
1279 * S3PT Subtables (Not part of the actual FPDT)
1280 */
1281
1282/* Values for Type field in S3PT header */
1283
1284enum acpi_s3pt_type {
1285 ACPI_S3PT_TYPE_RESUME = 0,
1286 ACPI_S3PT_TYPE_SUSPEND = 1,
1287 ACPI_FPDT_BOOT_PERFORMANCE = 2
1288};
1289
1290struct acpi_s3pt_resume {
1291 struct acpi_fpdt_header header;
1292 u32 resume_count;
1293 u64 full_resume;
1294 u64 average_resume;
1295};
1296
1297struct acpi_s3pt_suspend {
1298 struct acpi_fpdt_header header;
1299 u64 suspend_start;
1300 u64 suspend_end;
1301};
1302
1303/*
1304 * FPDT Boot Performance Record (Not part of the actual FPDT)
1305 */
1306struct acpi_fpdt_boot {
1307 struct acpi_fpdt_header header;
1308 u8 reserved[4];
1309 u64 reset_end;
1310 u64 load_start;
1311 u64 startup_start;
1312 u64 exit_services_entry;
1313 u64 exit_services_exit;
1314};
1315
1316/*******************************************************************************
1317 *
1318 * GTDT - Generic Timer Description Table (ACPI 5.1)
1319 * Version 2
1320 *
1321 ******************************************************************************/
1322
1323struct acpi_table_gtdt {
1324 struct acpi_table_header header; /* Common ACPI table header */
1325 u64 counter_block_addresss;
1326 u32 reserved;
1327 u32 secure_el1_interrupt;
1328 u32 secure_el1_flags;
1329 u32 non_secure_el1_interrupt;
1330 u32 non_secure_el1_flags;
1331 u32 virtual_timer_interrupt;
1332 u32 virtual_timer_flags;
1333 u32 non_secure_el2_interrupt;
1334 u32 non_secure_el2_flags;
1335 u64 counter_read_block_address;
1336 u32 platform_timer_count;
1337 u32 platform_timer_offset;
1338};
1339
1340/* Flag Definitions: Timer Block Physical Timers and Virtual timers */
1341
1342#define ACPI_GTDT_INTERRUPT_MODE (1)
1343#define ACPI_GTDT_INTERRUPT_POLARITY (1<<1)
1344#define ACPI_GTDT_ALWAYS_ON (1<<2)
1345
1346struct acpi_gtdt_el2 {
1347 u32 virtual_el2_timer_gsiv;
1348 u32 virtual_el2_timer_flags;
1349};
1350
1351/* Common GTDT subtable header */
1352
1353struct acpi_gtdt_header {
1354 u8 type;
1355 u16 length;
1356};
1357
1358/* Values for GTDT subtable type above */
1359
1360enum acpi_gtdt_type {
1361 ACPI_GTDT_TYPE_TIMER_BLOCK = 0,
1362 ACPI_GTDT_TYPE_WATCHDOG = 1,
1363 ACPI_GTDT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
1364};
1365
1366/* GTDT Subtables, correspond to Type in struct acpi_gtdt_header */
1367
1368/* 0: Generic Timer Block */
1369
1370struct acpi_gtdt_timer_block {
1371 struct acpi_gtdt_header header;
1372 u8 reserved;
1373 u64 block_address;
1374 u32 timer_count;
1375 u32 timer_offset;
1376};
1377
1378/* Timer Sub-Structure, one per timer */
1379
1380struct acpi_gtdt_timer_entry {
1381 u8 frame_number;
1382 u8 reserved[3];
1383 u64 base_address;
1384 u64 el0_base_address;
1385 u32 timer_interrupt;
1386 u32 timer_flags;
1387 u32 virtual_timer_interrupt;
1388 u32 virtual_timer_flags;
1389 u32 common_flags;
1390};
1391
1392/* Flag Definitions: timer_flags and virtual_timer_flags above */
1393
1394#define ACPI_GTDT_GT_IRQ_MODE (1)
1395#define ACPI_GTDT_GT_IRQ_POLARITY (1<<1)
1396
1397/* Flag Definitions: common_flags above */
1398
1399#define ACPI_GTDT_GT_IS_SECURE_TIMER (1)
1400#define ACPI_GTDT_GT_ALWAYS_ON (1<<1)
1401
1402/* 1: SBSA Generic Watchdog Structure */
1403
1404struct acpi_gtdt_watchdog {
1405 struct acpi_gtdt_header header;
1406 u8 reserved;
1407 u64 refresh_frame_address;
1408 u64 control_frame_address;
1409 u32 timer_interrupt;
1410 u32 timer_flags;
1411};
1412
1413/* Flag Definitions: timer_flags above */
1414
1415#define ACPI_GTDT_WATCHDOG_IRQ_MODE (1)
1416#define ACPI_GTDT_WATCHDOG_IRQ_POLARITY (1<<1)
1417#define ACPI_GTDT_WATCHDOG_SECURE (1<<2)
1418
1419/*******************************************************************************
1420 *
1421 * HEST - Hardware Error Source Table (ACPI 4.0)
1422 * Version 1
1423 *
1424 ******************************************************************************/
1425
1426struct acpi_table_hest {
1427 struct acpi_table_header header; /* Common ACPI table header */
1428 u32 error_source_count;
1429};
1430
1431/* HEST subtable header */
1432
1433struct acpi_hest_header {
1434 u16 type;
1435 u16 source_id;
1436};
1437
1438/* Values for Type field above for subtables */
1439
1440enum acpi_hest_types {
1441 ACPI_HEST_TYPE_IA32_CHECK = 0,
1442 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1,
1443 ACPI_HEST_TYPE_IA32_NMI = 2,
1444 ACPI_HEST_TYPE_NOT_USED3 = 3,
1445 ACPI_HEST_TYPE_NOT_USED4 = 4,
1446 ACPI_HEST_TYPE_NOT_USED5 = 5,
1447 ACPI_HEST_TYPE_AER_ROOT_PORT = 6,
1448 ACPI_HEST_TYPE_AER_ENDPOINT = 7,
1449 ACPI_HEST_TYPE_AER_BRIDGE = 8,
1450 ACPI_HEST_TYPE_GENERIC_ERROR = 9,
1451 ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10,
1452 ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11,
1453 ACPI_HEST_TYPE_RESERVED = 12 /* 12 and greater are reserved */
1454};
1455
1456/*
1457 * HEST substructures contained in subtables
1458 */
1459
1460/*
1461 * IA32 Error Bank(s) - Follows the struct acpi_hest_ia_machine_check and
1462 * struct acpi_hest_ia_corrected structures.
1463 */
1464struct acpi_hest_ia_error_bank {
1465 u8 bank_number;
1466 u8 clear_status_on_init;
1467 u8 status_format;
1468 u8 reserved;
1469 u32 control_register;
1470 u64 control_data;
1471 u32 status_register;
1472 u32 address_register;
1473 u32 misc_register;
1474};
1475
1476/* Common HEST sub-structure for PCI/AER structures below (6,7,8) */
1477
1478struct acpi_hest_aer_common {
1479 u16 reserved1;
1480 u8 flags;
1481 u8 enabled;
1482 u32 records_to_preallocate;
1483 u32 max_sections_per_record;
1484 u32 bus; /* Bus and Segment numbers */
1485 u16 device;
1486 u16 function;
1487 u16 device_control;
1488 u16 reserved2;
1489 u32 uncorrectable_mask;
1490 u32 uncorrectable_severity;
1491 u32 correctable_mask;
1492 u32 advanced_capabilities;
1493};
1494
1495/* Masks for HEST Flags fields */
1496
1497#define ACPI_HEST_FIRMWARE_FIRST (1)
1498#define ACPI_HEST_GLOBAL (1<<1)
1499#define ACPI_HEST_GHES_ASSIST (1<<2)
1500
1501/*
1502 * Macros to access the bus/segment numbers in Bus field above:
1503 * Bus number is encoded in bits 7:0
1504 * Segment number is encoded in bits 23:8
1505 */
1506#define ACPI_HEST_BUS(bus) ((bus) & 0xFF)
1507#define ACPI_HEST_SEGMENT(bus) (((bus) >> 8) & 0xFFFF)
1508
1509/* Hardware Error Notification */
1510
1511struct acpi_hest_notify {
1512 u8 type;
1513 u8 length;
1514 u16 config_write_enable;
1515 u32 poll_interval;
1516 u32 vector;
1517 u32 polling_threshold_value;
1518 u32 polling_threshold_window;
1519 u32 error_threshold_value;
1520 u32 error_threshold_window;
1521};
1522
1523/* Values for Notify Type field above */
1524
1525enum acpi_hest_notify_types {
1526 ACPI_HEST_NOTIFY_POLLED = 0,
1527 ACPI_HEST_NOTIFY_EXTERNAL = 1,
1528 ACPI_HEST_NOTIFY_LOCAL = 2,
1529 ACPI_HEST_NOTIFY_SCI = 3,
1530 ACPI_HEST_NOTIFY_NMI = 4,
1531 ACPI_HEST_NOTIFY_CMCI = 5, /* ACPI 5.0 */
1532 ACPI_HEST_NOTIFY_MCE = 6, /* ACPI 5.0 */
1533 ACPI_HEST_NOTIFY_GPIO = 7, /* ACPI 6.0 */
1534 ACPI_HEST_NOTIFY_SEA = 8, /* ACPI 6.1 */
1535 ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1 */
1536 ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1 */
1537 ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11, /* ACPI 6.2 */
1538 ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */
1539};
1540
1541/* Values for config_write_enable bitfield above */
1542
1543#define ACPI_HEST_TYPE (1)
1544#define ACPI_HEST_POLL_INTERVAL (1<<1)
1545#define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2)
1546#define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3)
1547#define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4)
1548#define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5)
1549
1550/*
1551 * HEST subtables
1552 */
1553
1554/* 0: IA32 Machine Check Exception */
1555
1556struct acpi_hest_ia_machine_check {
1557 struct acpi_hest_header header;
1558 u16 reserved1;
1559 u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */
1560 u8 enabled;
1561 u32 records_to_preallocate;
1562 u32 max_sections_per_record;
1563 u64 global_capability_data;
1564 u64 global_control_data;
1565 u8 num_hardware_banks;
1566 u8 reserved3[7];
1567};
1568
1569/* 1: IA32 Corrected Machine Check */
1570
1571struct acpi_hest_ia_corrected {
1572 struct acpi_hest_header header;
1573 u16 reserved1;
1574 u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */
1575 u8 enabled;
1576 u32 records_to_preallocate;
1577 u32 max_sections_per_record;
1578 struct acpi_hest_notify notify;
1579 u8 num_hardware_banks;
1580 u8 reserved2[3];
1581};
1582
1583/* 2: IA32 Non-Maskable Interrupt */
1584
1585struct acpi_hest_ia_nmi {
1586 struct acpi_hest_header header;
1587 u32 reserved;
1588 u32 records_to_preallocate;
1589 u32 max_sections_per_record;
1590 u32 max_raw_data_length;
1591};
1592
1593/* 3,4,5: Not used */
1594
1595/* 6: PCI Express Root Port AER */
1596
1597struct acpi_hest_aer_root {
1598 struct acpi_hest_header header;
1599 struct acpi_hest_aer_common aer;
1600 u32 root_error_command;
1601};
1602
1603/* 7: PCI Express AER (AER Endpoint) */
1604
1605struct acpi_hest_aer {
1606 struct acpi_hest_header header;
1607 struct acpi_hest_aer_common aer;
1608};
1609
1610/* 8: PCI Express/PCI-X Bridge AER */
1611
1612struct acpi_hest_aer_bridge {
1613 struct acpi_hest_header header;
1614 struct acpi_hest_aer_common aer;
1615 u32 uncorrectable_mask2;
1616 u32 uncorrectable_severity2;
1617 u32 advanced_capabilities2;
1618};
1619
1620/* 9: Generic Hardware Error Source */
1621
1622struct acpi_hest_generic {
1623 struct acpi_hest_header header;
1624 u16 related_source_id;
1625 u8 reserved;
1626 u8 enabled;
1627 u32 records_to_preallocate;
1628 u32 max_sections_per_record;
1629 u32 max_raw_data_length;
1630 struct acpi_generic_address error_status_address;
1631 struct acpi_hest_notify notify;
1632 u32 error_block_length;
1633};
1634
1635/* 10: Generic Hardware Error Source, version 2 */
1636
1637struct acpi_hest_generic_v2 {
1638 struct acpi_hest_header header;
1639 u16 related_source_id;
1640 u8 reserved;
1641 u8 enabled;
1642 u32 records_to_preallocate;
1643 u32 max_sections_per_record;
1644 u32 max_raw_data_length;
1645 struct acpi_generic_address error_status_address;
1646 struct acpi_hest_notify notify;
1647 u32 error_block_length;
1648 struct acpi_generic_address read_ack_register;
1649 u64 read_ack_preserve;
1650 u64 read_ack_write;
1651};
1652
1653/* Generic Error Status block */
1654
1655struct acpi_hest_generic_status {
1656 u32 block_status;
1657 u32 raw_data_offset;
1658 u32 raw_data_length;
1659 u32 data_length;
1660 u32 error_severity;
1661};
1662
1663/* Values for block_status flags above */
1664
1665#define ACPI_HEST_UNCORRECTABLE (1)
1666#define ACPI_HEST_CORRECTABLE (1<<1)
1667#define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2)
1668#define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3)
1669#define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */
1670
1671/* Generic Error Data entry */
1672
1673struct acpi_hest_generic_data {
1674 u8 section_type[16];
1675 u32 error_severity;
1676 u16 revision;
1677 u8 validation_bits;
1678 u8 flags;
1679 u32 error_data_length;
1680 u8 fru_id[16];
1681 u8 fru_text[20];
1682};
1683
1684/* Extension for revision 0x0300 */
1685
1686struct acpi_hest_generic_data_v300 {
1687 u8 section_type[16];
1688 u32 error_severity;
1689 u16 revision;
1690 u8 validation_bits;
1691 u8 flags;
1692 u32 error_data_length;
1693 u8 fru_id[16];
1694 u8 fru_text[20];
1695 u64 time_stamp;
1696};
1697
1698/* Values for error_severity above */
1699
1700#define ACPI_HEST_GEN_ERROR_RECOVERABLE 0
1701#define ACPI_HEST_GEN_ERROR_FATAL 1
1702#define ACPI_HEST_GEN_ERROR_CORRECTED 2
1703#define ACPI_HEST_GEN_ERROR_NONE 3
1704
1705/* Flags for validation_bits above */
1706
1707#define ACPI_HEST_GEN_VALID_FRU_ID (1)
1708#define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1)
1709#define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2)
1710
1711/* 11: IA32 Deferred Machine Check Exception (ACPI 6.2) */
1712
1713struct acpi_hest_ia_deferred_check {
1714 struct acpi_hest_header header;
1715 u16 reserved1;
1716 u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */
1717 u8 enabled;
1718 u32 records_to_preallocate;
1719 u32 max_sections_per_record;
1720 struct acpi_hest_notify notify;
1721 u8 num_hardware_banks;
1722 u8 reserved2[3];
1723};
1724
1725/*******************************************************************************
1726 *
1727 * HMAT - Heterogeneous Memory Attributes Table (ACPI 6.2)
1728 * Version 1
1729 *
1730 ******************************************************************************/
1731
1732struct acpi_table_hmat {
1733 struct acpi_table_header header; /* Common ACPI table header */
1734 u32 reserved;
1735};
1736
1737/* Values for HMAT structure types */
1738
1739enum acpi_hmat_type {
1740 ACPI_HMAT_TYPE_PROXIMITY = 0, /* Memory proximity domain attributes */
1741 ACPI_HMAT_TYPE_LOCALITY = 1, /* System locality latency and bandwidth information */
1742 ACPI_HMAT_TYPE_CACHE = 2, /* Memory side cache information */
1743 ACPI_HMAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */
1744};
1745
1746struct acpi_hmat_structure {
1747 u16 type;
1748 u16 reserved;
1749 u32 length;
1750};
1751
1752/*
1753 * HMAT Structures, correspond to Type in struct acpi_hmat_structure
1754 */
1755
1756/* 0: Memory proximity domain attributes */
1757
1758struct acpi_hmat_proximity_domain {
1759 struct acpi_hmat_structure header;
1760 u16 flags;
1761 u16 reserved1;
1762 u32 processor_PD; /* Processor proximity domain */
1763 u32 memory_PD; /* Memory proximity domain */
1764 u32 reserved2;
1765 u64 reserved3;
1766 u64 reserved4;
1767};
1768
1769/* Masks for Flags field above */
1770
1771#define ACPI_HMAT_PROCESSOR_PD_VALID (1) /* 1: processor_PD field is valid */
1772#define ACPI_HMAT_MEMORY_PD_VALID (1<<1) /* 1: memory_PD field is valid */
1773#define ACPI_HMAT_RESERVATION_HINT (1<<2) /* 1: Reservation hint */
1774
1775/* 1: System locality latency and bandwidth information */
1776
1777struct acpi_hmat_locality {
1778 struct acpi_hmat_structure header;
1779 u8 flags;
1780 u8 data_type;
1781 u8 min_transfer_size;
1782 u8 reserved1;
1783 u32 number_of_initiator_Pds;
1784 u32 number_of_target_Pds;
1785 u32 reserved2;
1786 u64 entry_base_unit;
1787};
1788
1789/* Masks for Flags field above */
1790
1791#define ACPI_HMAT_MEMORY_HIERARCHY (0x0F) /* Bits 0-3 */
1792
1793/* Values for Memory Hierarchy flags */
1794
1795#define ACPI_HMAT_MEMORY 0
1796#define ACPI_HMAT_LAST_LEVEL_CACHE 1
1797#define ACPI_HMAT_1ST_LEVEL_CACHE 2
1798#define ACPI_HMAT_2ND_LEVEL_CACHE 3
1799#define ACPI_HMAT_3RD_LEVEL_CACHE 4
1800#define ACPI_HMAT_MINIMUM_XFER_SIZE 0x10 /* Bit 4: ACPI 6.4 */
1801#define ACPI_HMAT_NON_SEQUENTIAL_XFERS 0x20 /* Bit 5: ACPI 6.4 */
1802
1803
1804/* Values for data_type field above */
1805
1806#define ACPI_HMAT_ACCESS_LATENCY 0
1807#define ACPI_HMAT_READ_LATENCY 1
1808#define ACPI_HMAT_WRITE_LATENCY 2
1809#define ACPI_HMAT_ACCESS_BANDWIDTH 3
1810#define ACPI_HMAT_READ_BANDWIDTH 4
1811#define ACPI_HMAT_WRITE_BANDWIDTH 5
1812
1813/* 2: Memory side cache information */
1814
1815struct acpi_hmat_cache {
1816 struct acpi_hmat_structure header;
1817 u32 memory_PD;
1818 u32 reserved1;
1819 u64 cache_size;
1820 u32 cache_attributes;
1821 u16 address_mode;
1822 u16 number_of_SMBIOShandles;
1823};
1824
1825/* Masks for cache_attributes field above */
1826
1827#define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F)
1828#define ACPI_HMAT_CACHE_LEVEL (0x000000F0)
1829#define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00)
1830#define ACPI_HMAT_WRITE_POLICY (0x0000F000)
1831#define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000)
1832
1833#define ACPI_HMAT_CACHE_MODE_UNKNOWN (0)
1834#define ACPI_HMAT_CACHE_MODE_EXTENDED_LINEAR (1)
1835
1836/* Values for cache associativity flag */
1837
1838#define ACPI_HMAT_CA_NONE (0)
1839#define ACPI_HMAT_CA_DIRECT_MAPPED (1)
1840#define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2)
1841
1842/* Values for write policy flag */
1843
1844#define ACPI_HMAT_CP_NONE (0)
1845#define ACPI_HMAT_CP_WB (1)
1846#define ACPI_HMAT_CP_WT (2)
1847
1848/*******************************************************************************
1849 *
1850 * HPET - High Precision Event Timer table
1851 * Version 1
1852 *
1853 * Conforms to "IA-PC HPET (High Precision Event Timers) Specification",
1854 * Version 1.0a, October 2004
1855 *
1856 ******************************************************************************/
1857
1858struct acpi_table_hpet {
1859 struct acpi_table_header header; /* Common ACPI table header */
1860 u32 id; /* Hardware ID of event timer block */
1861 struct acpi_generic_address address; /* Address of event timer block */
1862 u8 sequence; /* HPET sequence number */
1863 u16 minimum_tick; /* Main counter min tick, periodic mode */
1864 u8 flags;
1865};
1866
1867/* Masks for Flags field above */
1868
1869#define ACPI_HPET_PAGE_PROTECT_MASK (3)
1870
1871/* Values for Page Protect flags */
1872
1873enum acpi_hpet_page_protect {
1874 ACPI_HPET_NO_PAGE_PROTECT = 0,
1875 ACPI_HPET_PAGE_PROTECT4 = 1,
1876 ACPI_HPET_PAGE_PROTECT64 = 2
1877};
1878
1879/*******************************************************************************
1880 *
1881 * IBFT - Boot Firmware Table
1882 * Version 1
1883 *
1884 * Conforms to "iSCSI Boot Firmware Table (iBFT) as Defined in ACPI 3.0b
1885 * Specification", Version 1.01, March 1, 2007
1886 *
1887 * Note: It appears that this table is not intended to appear in the RSDT/XSDT.
1888 * Therefore, it is not currently supported by the disassembler.
1889 *
1890 ******************************************************************************/
1891
1892struct acpi_table_ibft {
1893 struct acpi_table_header header; /* Common ACPI table header */
1894 u8 reserved[12];
1895};
1896
1897/* IBFT common subtable header */
1898
1899struct acpi_ibft_header {
1900 u8 type;
1901 u8 version;
1902 u16 length;
1903 u8 index;
1904 u8 flags;
1905};
1906
1907/* Values for Type field above */
1908
1909enum acpi_ibft_type {
1910 ACPI_IBFT_TYPE_NOT_USED = 0,
1911 ACPI_IBFT_TYPE_CONTROL = 1,
1912 ACPI_IBFT_TYPE_INITIATOR = 2,
1913 ACPI_IBFT_TYPE_NIC = 3,
1914 ACPI_IBFT_TYPE_TARGET = 4,
1915 ACPI_IBFT_TYPE_EXTENSIONS = 5,
1916 ACPI_IBFT_TYPE_RESERVED = 6 /* 6 and greater are reserved */
1917};
1918
1919/* IBFT subtables */
1920
1921struct acpi_ibft_control {
1922 struct acpi_ibft_header header;
1923 u16 extensions;
1924 u16 initiator_offset;
1925 u16 nic0_offset;
1926 u16 target0_offset;
1927 u16 nic1_offset;
1928 u16 target1_offset;
1929};
1930
1931struct acpi_ibft_initiator {
1932 struct acpi_ibft_header header;
1933 u8 sns_server[16];
1934 u8 slp_server[16];
1935 u8 primary_server[16];
1936 u8 secondary_server[16];
1937 u16 name_length;
1938 u16 name_offset;
1939};
1940
1941struct acpi_ibft_nic {
1942 struct acpi_ibft_header header;
1943 u8 ip_address[16];
1944 u8 subnet_mask_prefix;
1945 u8 origin;
1946 u8 gateway[16];
1947 u8 primary_dns[16];
1948 u8 secondary_dns[16];
1949 u8 dhcp[16];
1950 u16 vlan;
1951 u8 mac_address[6];
1952 u16 pci_address;
1953 u16 name_length;
1954 u16 name_offset;
1955};
1956
1957struct acpi_ibft_target {
1958 struct acpi_ibft_header header;
1959 u8 target_ip_address[16];
1960 u16 target_ip_socket;
1961 u8 target_boot_lun[8];
1962 u8 chap_type;
1963 u8 nic_association;
1964 u16 target_name_length;
1965 u16 target_name_offset;
1966 u16 chap_name_length;
1967 u16 chap_name_offset;
1968 u16 chap_secret_length;
1969 u16 chap_secret_offset;
1970 u16 reverse_chap_name_length;
1971 u16 reverse_chap_name_offset;
1972 u16 reverse_chap_secret_length;
1973 u16 reverse_chap_secret_offset;
1974};
1975
1976/* Reset to default packing */
1977
1978#pragma pack()
1979
1980#endif /* __ACTBL1_H__ */
1981