| 1 | /* SPDX-License-Identifier: GPL-2.0 */ | 
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| 2 | /* | 
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| 3 | * Intel SoC PMIC Driver | 
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| 4 | * | 
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| 5 | * Copyright (C) 2012-2014 Intel Corporation. All rights reserved. | 
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| 6 | * | 
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| 7 | * Author: Yang, Bin <bin.yang@intel.com> | 
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| 8 | * Author: Zhu, Lejun <lejun.zhu@linux.intel.com> | 
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| 9 | */ | 
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| 10 |  | 
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| 11 | #ifndef __INTEL_SOC_PMIC_H__ | 
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| 12 | #define __INTEL_SOC_PMIC_H__ | 
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| 13 |  | 
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| 14 | #include <linux/regmap.h> | 
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| 15 |  | 
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| 16 | enum intel_cht_wc_models { | 
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| 17 | INTEL_CHT_WC_UNKNOWN, | 
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| 18 | INTEL_CHT_WC_GPD_WIN_POCKET, | 
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| 19 | INTEL_CHT_WC_XIAOMI_MIPAD2, | 
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| 20 | INTEL_CHT_WC_LENOVO_YOGABOOK1, | 
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| 21 | INTEL_CHT_WC_LENOVO_YT3_X90, | 
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| 22 | }; | 
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| 23 |  | 
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| 24 | /** | 
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| 25 | * struct intel_soc_pmic - Intel SoC PMIC data | 
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| 26 | * @irq: Master interrupt number of the parent PMIC device | 
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| 27 | * @regmap: Pointer to the parent PMIC device regmap structure | 
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| 28 | * @irq_chip_data: IRQ chip data for the PMIC itself | 
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| 29 | * @irq_chip_data_pwrbtn: Chained IRQ chip data for the Power Button | 
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| 30 | * @irq_chip_data_tmu: Chained IRQ chip data for the Time Management Unit | 
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| 31 | * @irq_chip_data_bcu: Chained IRQ chip data for the Burst Control Unit | 
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| 32 | * @irq_chip_data_adc: Chained IRQ chip data for the General Purpose ADC | 
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| 33 | * @irq_chip_data_chgr: Chained IRQ chip data for the External Charger | 
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| 34 | * @irq_chip_data_crit: Chained IRQ chip data for the Critical Event Handler | 
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| 35 | * @dev: Pointer to the parent PMIC device | 
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| 36 | * @scu: Pointer to the SCU IPC device data structure | 
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| 37 | */ | 
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| 38 | struct intel_soc_pmic { | 
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| 39 | int irq; | 
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| 40 | struct regmap *regmap; | 
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| 41 | struct regmap_irq_chip_data *irq_chip_data; | 
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| 42 | struct regmap_irq_chip_data *irq_chip_data_pwrbtn; | 
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| 43 | struct regmap_irq_chip_data *irq_chip_data_tmu; | 
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| 44 | struct regmap_irq_chip_data *irq_chip_data_bcu; | 
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| 45 | struct regmap_irq_chip_data *irq_chip_data_adc; | 
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| 46 | struct regmap_irq_chip_data *irq_chip_data_chgr; | 
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| 47 | struct regmap_irq_chip_data *irq_chip_data_crit; | 
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| 48 | struct device *dev; | 
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| 49 | struct intel_scu_ipc_dev *scu; | 
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| 50 | enum intel_cht_wc_models cht_wc_model; | 
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| 51 | }; | 
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| 52 |  | 
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| 53 | int intel_soc_pmic_exec_mipi_pmic_seq_element(u16 i2c_address, u32 reg_address, | 
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| 54 | u32 value, u32 mask); | 
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| 55 |  | 
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| 56 | #endif	/* __INTEL_SOC_PMIC_H__ */ | 
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| 57 |  | 
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