| 1 | /* SPDX-License-Identifier: GPL-2.0 */ | 
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| 2 | #ifndef _LINUX_T10_PI_H | 
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| 3 | #define _LINUX_T10_PI_H | 
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| 4 |  | 
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| 5 | #include <linux/types.h> | 
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| 6 | #include <linux/blk-mq.h> | 
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| 7 |  | 
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| 8 | /* | 
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| 9 | * A T10 PI-capable target device can be formatted with different | 
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| 10 | * protection schemes.	Currently 0 through 3 are defined: | 
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| 11 | * | 
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| 12 | * Type 0 is regular (unprotected) I/O | 
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| 13 | * | 
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| 14 | * Type 1 defines the contents of the guard and reference tags | 
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| 15 | * | 
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| 16 | * Type 2 defines the contents of the guard and reference tags and | 
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| 17 | * uses 32-byte commands to seed the latter | 
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| 18 | * | 
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| 19 | * Type 3 defines the contents of the guard tag only | 
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| 20 | */ | 
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| 21 | enum t10_dif_type { | 
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| 22 | T10_PI_TYPE0_PROTECTION = 0x0, | 
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| 23 | T10_PI_TYPE1_PROTECTION = 0x1, | 
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| 24 | T10_PI_TYPE2_PROTECTION = 0x2, | 
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| 25 | T10_PI_TYPE3_PROTECTION = 0x3, | 
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| 26 | }; | 
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| 27 |  | 
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| 28 | /* | 
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| 29 | * T10 Protection Information tuple. | 
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| 30 | */ | 
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| 31 | struct t10_pi_tuple { | 
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| 32 | __be16 guard_tag;	/* Checksum */ | 
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| 33 | __be16 app_tag;		/* Opaque storage */ | 
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| 34 | __be32 ref_tag;		/* Target LBA or indirect LBA */ | 
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| 35 | }; | 
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| 36 |  | 
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| 37 | #define T10_PI_APP_ESCAPE cpu_to_be16(0xffff) | 
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| 38 | #define T10_PI_REF_ESCAPE cpu_to_be32(0xffffffff) | 
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| 39 |  | 
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| 40 | static inline u32 t10_pi_ref_tag(struct request *rq) | 
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| 41 | { | 
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| 42 | unsigned int shift = ilog2(queue_logical_block_size(rq->q)); | 
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| 43 |  | 
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| 44 | if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && | 
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| 45 | rq->q->limits.integrity.interval_exp) | 
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| 46 | shift = rq->q->limits.integrity.interval_exp; | 
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| 47 | return blk_rq_pos(rq) >> (shift - SECTOR_SHIFT) & 0xffffffff; | 
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| 48 | } | 
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| 49 |  | 
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| 50 | struct crc64_pi_tuple { | 
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| 51 | __be64 guard_tag; | 
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| 52 | __be16 app_tag; | 
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| 53 | __u8   ref_tag[6]; | 
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| 54 | }; | 
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| 55 |  | 
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| 56 | /** | 
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| 57 | * lower_48_bits() - return bits 0-47 of a number | 
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| 58 | * @n: the number we're accessing | 
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| 59 | */ | 
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| 60 | static inline u64 lower_48_bits(u64 n) | 
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| 61 | { | 
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| 62 | return n & ((1ull << 48) - 1); | 
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| 63 | } | 
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| 64 |  | 
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| 65 | static inline u64 ext_pi_ref_tag(struct request *rq) | 
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| 66 | { | 
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| 67 | unsigned int shift = ilog2(queue_logical_block_size(rq->q)); | 
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| 68 |  | 
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| 69 | if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && | 
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| 70 | rq->q->limits.integrity.interval_exp) | 
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| 71 | shift = rq->q->limits.integrity.interval_exp; | 
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| 72 | return lower_48_bits(n: blk_rq_pos(rq) >> (shift - SECTOR_SHIFT)); | 
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| 73 | } | 
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| 74 |  | 
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| 75 | #endif | 
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| 76 |  | 
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