1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2010-2017 Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
4 *
5 * membarrier system call
6 */
7#include <uapi/linux/membarrier.h>
8#include "sched.h"
9
10/*
11 * For documentation purposes, here are some membarrier ordering
12 * scenarios to keep in mind:
13 *
14 * A) Userspace thread execution after IPI vs membarrier's memory
15 * barrier before sending the IPI
16 *
17 * Userspace variables:
18 *
19 * int x = 0, y = 0;
20 *
21 * The memory barrier at the start of membarrier() on CPU0 is necessary in
22 * order to enforce the guarantee that any writes occurring on CPU0 before
23 * the membarrier() is executed will be visible to any code executing on
24 * CPU1 after the IPI-induced memory barrier:
25 *
26 * CPU0 CPU1
27 *
28 * x = 1
29 * membarrier():
30 * a: smp_mb()
31 * b: send IPI IPI-induced mb
32 * c: smp_mb()
33 * r2 = y
34 * y = 1
35 * barrier()
36 * r1 = x
37 *
38 * BUG_ON(r1 == 0 && r2 == 0)
39 *
40 * The write to y and load from x by CPU1 are unordered by the hardware,
41 * so it's possible to have "r1 = x" reordered before "y = 1" at any
42 * point after (b). If the memory barrier at (a) is omitted, then "x = 1"
43 * can be reordered after (a) (although not after (c)), so we get r1 == 0
44 * and r2 == 0. This violates the guarantee that membarrier() is
45 * supposed by provide.
46 *
47 * The timing of the memory barrier at (a) has to ensure that it executes
48 * before the IPI-induced memory barrier on CPU1.
49 *
50 * B) Userspace thread execution before IPI vs membarrier's memory
51 * barrier after completing the IPI
52 *
53 * Userspace variables:
54 *
55 * int x = 0, y = 0;
56 *
57 * The memory barrier at the end of membarrier() on CPU0 is necessary in
58 * order to enforce the guarantee that any writes occurring on CPU1 before
59 * the membarrier() is executed will be visible to any code executing on
60 * CPU0 after the membarrier():
61 *
62 * CPU0 CPU1
63 *
64 * x = 1
65 * barrier()
66 * y = 1
67 * r2 = y
68 * membarrier():
69 * a: smp_mb()
70 * b: send IPI IPI-induced mb
71 * c: smp_mb()
72 * r1 = x
73 * BUG_ON(r1 == 0 && r2 == 1)
74 *
75 * The writes to x and y are unordered by the hardware, so it's possible to
76 * have "r2 = 1" even though the write to x doesn't execute until (b). If
77 * the memory barrier at (c) is omitted then "r1 = x" can be reordered
78 * before (b) (although not before (a)), so we get "r1 = 0". This violates
79 * the guarantee that membarrier() is supposed to provide.
80 *
81 * The timing of the memory barrier at (c) has to ensure that it executes
82 * after the IPI-induced memory barrier on CPU1.
83 *
84 * C) Scheduling userspace thread -> kthread -> userspace thread vs membarrier
85 *
86 * CPU0 CPU1
87 *
88 * membarrier():
89 * a: smp_mb()
90 * d: switch to kthread (includes mb)
91 * b: read rq->curr->mm == NULL
92 * e: switch to user (includes mb)
93 * c: smp_mb()
94 *
95 * Using the scenario from (A), we can show that (a) needs to be paired
96 * with (e). Using the scenario from (B), we can show that (c) needs to
97 * be paired with (d).
98 *
99 * D) exit_mm vs membarrier
100 *
101 * Two thread groups are created, A and B. Thread group B is created by
102 * issuing clone from group A with flag CLONE_VM set, but not CLONE_THREAD.
103 * Let's assume we have a single thread within each thread group (Thread A
104 * and Thread B). Thread A runs on CPU0, Thread B runs on CPU1.
105 *
106 * CPU0 CPU1
107 *
108 * membarrier():
109 * a: smp_mb()
110 * exit_mm():
111 * d: smp_mb()
112 * e: current->mm = NULL
113 * b: read rq->curr->mm == NULL
114 * c: smp_mb()
115 *
116 * Using scenario (B), we can show that (c) needs to be paired with (d).
117 *
118 * E) kthread_{use,unuse}_mm vs membarrier
119 *
120 * CPU0 CPU1
121 *
122 * membarrier():
123 * a: smp_mb()
124 * kthread_unuse_mm()
125 * d: smp_mb()
126 * e: current->mm = NULL
127 * b: read rq->curr->mm == NULL
128 * kthread_use_mm()
129 * f: current->mm = mm
130 * g: smp_mb()
131 * c: smp_mb()
132 *
133 * Using the scenario from (A), we can show that (a) needs to be paired
134 * with (g). Using the scenario from (B), we can show that (c) needs to
135 * be paired with (d).
136 */
137
138/*
139 * Bitmask made from a "or" of all commands within enum membarrier_cmd,
140 * except MEMBARRIER_CMD_QUERY.
141 */
142#ifdef CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE
143#define MEMBARRIER_PRIVATE_EXPEDITED_SYNC_CORE_BITMASK \
144 (MEMBARRIER_CMD_PRIVATE_EXPEDITED_SYNC_CORE \
145 | MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED_SYNC_CORE)
146#else
147#define MEMBARRIER_PRIVATE_EXPEDITED_SYNC_CORE_BITMASK 0
148#endif
149
150#ifdef CONFIG_RSEQ
151#define MEMBARRIER_PRIVATE_EXPEDITED_RSEQ_BITMASK \
152 (MEMBARRIER_CMD_PRIVATE_EXPEDITED_RSEQ \
153 | MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED_RSEQ)
154#else
155#define MEMBARRIER_PRIVATE_EXPEDITED_RSEQ_BITMASK 0
156#endif
157
158#define MEMBARRIER_CMD_BITMASK \
159 (MEMBARRIER_CMD_GLOBAL | MEMBARRIER_CMD_GLOBAL_EXPEDITED \
160 | MEMBARRIER_CMD_REGISTER_GLOBAL_EXPEDITED \
161 | MEMBARRIER_CMD_PRIVATE_EXPEDITED \
162 | MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED \
163 | MEMBARRIER_PRIVATE_EXPEDITED_SYNC_CORE_BITMASK \
164 | MEMBARRIER_PRIVATE_EXPEDITED_RSEQ_BITMASK \
165 | MEMBARRIER_CMD_GET_REGISTRATIONS)
166
167static DEFINE_MUTEX(membarrier_ipi_mutex);
168#define SERIALIZE_IPI() guard(mutex)(&membarrier_ipi_mutex)
169
170static void ipi_mb(void *info)
171{
172 smp_mb(); /* IPIs should be serializing but paranoid. */
173}
174
175static void ipi_sync_core(void *info)
176{
177 /*
178 * The smp_mb() in membarrier after all the IPIs is supposed to
179 * ensure that memory on remote CPUs that occur before the IPI
180 * become visible to membarrier()'s caller -- see scenario B in
181 * the big comment at the top of this file.
182 *
183 * A sync_core() would provide this guarantee, but
184 * sync_core_before_usermode() might end up being deferred until
185 * after membarrier()'s smp_mb().
186 */
187 smp_mb(); /* IPIs should be serializing but paranoid. */
188
189 sync_core_before_usermode();
190}
191
192static void ipi_rseq(void *info)
193{
194 /*
195 * Ensure that all stores done by the calling thread are visible
196 * to the current task before the current task resumes. We could
197 * probably optimize this away on most architectures, but by the
198 * time we've already sent an IPI, the cost of the extra smp_mb()
199 * is negligible.
200 */
201 smp_mb();
202 rseq_preempt(current);
203}
204
205static void ipi_sync_rq_state(void *info)
206{
207 struct mm_struct *mm = (struct mm_struct *) info;
208
209 if (current->mm != mm)
210 return;
211 this_cpu_write(runqueues.membarrier_state,
212 atomic_read(&mm->membarrier_state));
213 /*
214 * Issue a memory barrier after setting
215 * MEMBARRIER_STATE_GLOBAL_EXPEDITED in the current runqueue to
216 * guarantee that no memory access following registration is reordered
217 * before registration.
218 */
219 smp_mb();
220}
221
222void membarrier_exec_mmap(struct mm_struct *mm)
223{
224 /*
225 * Issue a memory barrier before clearing membarrier_state to
226 * guarantee that no memory access prior to exec is reordered after
227 * clearing this state.
228 */
229 smp_mb();
230 atomic_set(v: &mm->membarrier_state, i: 0);
231 /*
232 * Keep the runqueue membarrier_state in sync with this mm
233 * membarrier_state.
234 */
235 this_cpu_write(runqueues.membarrier_state, 0);
236}
237
238void membarrier_update_current_mm(struct mm_struct *next_mm)
239{
240 struct rq *rq = this_rq();
241 int membarrier_state = 0;
242
243 if (next_mm)
244 membarrier_state = atomic_read(v: &next_mm->membarrier_state);
245 if (READ_ONCE(rq->membarrier_state) == membarrier_state)
246 return;
247 WRITE_ONCE(rq->membarrier_state, membarrier_state);
248}
249
250static int membarrier_global_expedited(void)
251{
252 int cpu;
253 cpumask_var_t tmpmask;
254
255 if (num_online_cpus() == 1)
256 return 0;
257
258 /*
259 * Matches memory barriers after rq->curr modification in
260 * scheduler.
261 */
262 smp_mb(); /* system call entry is not a mb. */
263
264 if (!zalloc_cpumask_var(mask: &tmpmask, GFP_KERNEL))
265 return -ENOMEM;
266
267 SERIALIZE_IPI();
268 cpus_read_lock();
269 rcu_read_lock();
270 for_each_online_cpu(cpu) {
271 struct task_struct *p;
272
273 /*
274 * Skipping the current CPU is OK even through we can be
275 * migrated at any point. The current CPU, at the point
276 * where we read raw_smp_processor_id(), is ensured to
277 * be in program order with respect to the caller
278 * thread. Therefore, we can skip this CPU from the
279 * iteration.
280 */
281 if (cpu == raw_smp_processor_id())
282 continue;
283
284 if (!(READ_ONCE(cpu_rq(cpu)->membarrier_state) &
285 MEMBARRIER_STATE_GLOBAL_EXPEDITED))
286 continue;
287
288 /*
289 * Skip the CPU if it runs a kernel thread which is not using
290 * a task mm.
291 */
292 p = rcu_dereference(cpu_rq(cpu)->curr);
293 if (!p->mm)
294 continue;
295
296 __cpumask_set_cpu(cpu, dstp: tmpmask);
297 }
298 rcu_read_unlock();
299
300 preempt_disable();
301 smp_call_function_many(mask: tmpmask, func: ipi_mb, NULL, wait: 1);
302 preempt_enable();
303
304 free_cpumask_var(mask: tmpmask);
305 cpus_read_unlock();
306
307 /*
308 * Memory barrier on the caller thread _after_ we finished
309 * waiting for the last IPI. Matches memory barriers before
310 * rq->curr modification in scheduler.
311 */
312 smp_mb(); /* exit from system call is not a mb */
313 return 0;
314}
315
316static int membarrier_private_expedited(int flags, int cpu_id)
317{
318 cpumask_var_t tmpmask;
319 struct mm_struct *mm = current->mm;
320 smp_call_func_t ipi_func = ipi_mb;
321
322 if (flags == MEMBARRIER_FLAG_SYNC_CORE) {
323 if (!IS_ENABLED(CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE))
324 return -EINVAL;
325 if (!(atomic_read(v: &mm->membarrier_state) &
326 MEMBARRIER_STATE_PRIVATE_EXPEDITED_SYNC_CORE_READY))
327 return -EPERM;
328 ipi_func = ipi_sync_core;
329 prepare_sync_core_cmd(mm);
330 } else if (flags == MEMBARRIER_FLAG_RSEQ) {
331 if (!IS_ENABLED(CONFIG_RSEQ))
332 return -EINVAL;
333 if (!(atomic_read(v: &mm->membarrier_state) &
334 MEMBARRIER_STATE_PRIVATE_EXPEDITED_RSEQ_READY))
335 return -EPERM;
336 ipi_func = ipi_rseq;
337 } else {
338 WARN_ON_ONCE(flags);
339 if (!(atomic_read(v: &mm->membarrier_state) &
340 MEMBARRIER_STATE_PRIVATE_EXPEDITED_READY))
341 return -EPERM;
342 }
343
344 if (flags != MEMBARRIER_FLAG_SYNC_CORE &&
345 (atomic_read(v: &mm->mm_users) == 1 || num_online_cpus() == 1))
346 return 0;
347
348 /*
349 * Matches memory barriers after rq->curr modification in
350 * scheduler.
351 *
352 * On RISC-V, this barrier pairing is also needed for the
353 * SYNC_CORE command when switching between processes, cf.
354 * the inline comments in membarrier_arch_switch_mm().
355 */
356 smp_mb(); /* system call entry is not a mb. */
357
358 if (cpu_id < 0 && !zalloc_cpumask_var(mask: &tmpmask, GFP_KERNEL))
359 return -ENOMEM;
360
361 SERIALIZE_IPI();
362 cpus_read_lock();
363
364 if (cpu_id >= 0) {
365 struct task_struct *p;
366
367 if (cpu_id >= nr_cpu_ids || !cpu_online(cpu: cpu_id))
368 goto out;
369 rcu_read_lock();
370 p = rcu_dereference(cpu_rq(cpu_id)->curr);
371 if (!p || p->mm != mm) {
372 rcu_read_unlock();
373 goto out;
374 }
375 rcu_read_unlock();
376 } else {
377 int cpu;
378
379 rcu_read_lock();
380 for_each_online_cpu(cpu) {
381 struct task_struct *p;
382
383 p = rcu_dereference(cpu_rq(cpu)->curr);
384 if (p && p->mm == mm)
385 __cpumask_set_cpu(cpu, dstp: tmpmask);
386 }
387 rcu_read_unlock();
388 }
389
390 if (cpu_id >= 0) {
391 /*
392 * smp_call_function_single() will call ipi_func() if cpu_id
393 * is the calling CPU.
394 */
395 smp_call_function_single(cpuid: cpu_id, func: ipi_func, NULL, wait: 1);
396 } else {
397 /*
398 * For regular membarrier, we can save a few cycles by
399 * skipping the current cpu -- we're about to do smp_mb()
400 * below, and if we migrate to a different cpu, this cpu
401 * and the new cpu will execute a full barrier in the
402 * scheduler.
403 *
404 * For SYNC_CORE, we do need a barrier on the current cpu --
405 * otherwise, if we are migrated and replaced by a different
406 * task in the same mm just before, during, or after
407 * membarrier, we will end up with some thread in the mm
408 * running without a core sync.
409 *
410 * For RSEQ, don't rseq_preempt() the caller. User code
411 * is not supposed to issue syscalls at all from inside an
412 * rseq critical section.
413 */
414 if (flags != MEMBARRIER_FLAG_SYNC_CORE) {
415 preempt_disable();
416 smp_call_function_many(mask: tmpmask, func: ipi_func, NULL, wait: true);
417 preempt_enable();
418 } else {
419 on_each_cpu_mask(mask: tmpmask, func: ipi_func, NULL, wait: true);
420 }
421 }
422
423out:
424 if (cpu_id < 0)
425 free_cpumask_var(mask: tmpmask);
426 cpus_read_unlock();
427
428 /*
429 * Memory barrier on the caller thread _after_ we finished
430 * waiting for the last IPI. Matches memory barriers before
431 * rq->curr modification in scheduler.
432 */
433 smp_mb(); /* exit from system call is not a mb */
434
435 return 0;
436}
437
438static int sync_runqueues_membarrier_state(struct mm_struct *mm)
439{
440 int membarrier_state = atomic_read(v: &mm->membarrier_state);
441 cpumask_var_t tmpmask;
442 int cpu;
443
444 if (atomic_read(v: &mm->mm_users) == 1 || num_online_cpus() == 1) {
445 this_cpu_write(runqueues.membarrier_state, membarrier_state);
446
447 /*
448 * For single mm user, we can simply issue a memory barrier
449 * after setting MEMBARRIER_STATE_GLOBAL_EXPEDITED in the
450 * mm and in the current runqueue to guarantee that no memory
451 * access following registration is reordered before
452 * registration.
453 */
454 smp_mb();
455 return 0;
456 }
457
458 if (!zalloc_cpumask_var(mask: &tmpmask, GFP_KERNEL))
459 return -ENOMEM;
460
461 /*
462 * For mm with multiple users, we need to ensure all future
463 * scheduler executions will observe @mm's new membarrier
464 * state.
465 */
466 synchronize_rcu();
467
468 /*
469 * For each cpu runqueue, if the task's mm match @mm, ensure that all
470 * @mm's membarrier state set bits are also set in the runqueue's
471 * membarrier state. This ensures that a runqueue scheduling
472 * between threads which are users of @mm has its membarrier state
473 * updated.
474 */
475 SERIALIZE_IPI();
476 cpus_read_lock();
477 rcu_read_lock();
478 for_each_online_cpu(cpu) {
479 struct rq *rq = cpu_rq(cpu);
480 struct task_struct *p;
481
482 p = rcu_dereference(rq->curr);
483 if (p && p->mm == mm)
484 __cpumask_set_cpu(cpu, dstp: tmpmask);
485 }
486 rcu_read_unlock();
487
488 on_each_cpu_mask(mask: tmpmask, func: ipi_sync_rq_state, info: mm, wait: true);
489
490 free_cpumask_var(mask: tmpmask);
491 cpus_read_unlock();
492
493 return 0;
494}
495
496static int membarrier_register_global_expedited(void)
497{
498 struct task_struct *p = current;
499 struct mm_struct *mm = p->mm;
500 int ret;
501
502 if (atomic_read(v: &mm->membarrier_state) &
503 MEMBARRIER_STATE_GLOBAL_EXPEDITED_READY)
504 return 0;
505 atomic_or(i: MEMBARRIER_STATE_GLOBAL_EXPEDITED, v: &mm->membarrier_state);
506 ret = sync_runqueues_membarrier_state(mm);
507 if (ret)
508 return ret;
509 atomic_or(i: MEMBARRIER_STATE_GLOBAL_EXPEDITED_READY,
510 v: &mm->membarrier_state);
511
512 return 0;
513}
514
515static int membarrier_register_private_expedited(int flags)
516{
517 struct task_struct *p = current;
518 struct mm_struct *mm = p->mm;
519 int ready_state = MEMBARRIER_STATE_PRIVATE_EXPEDITED_READY,
520 set_state = MEMBARRIER_STATE_PRIVATE_EXPEDITED,
521 ret;
522
523 if (flags == MEMBARRIER_FLAG_SYNC_CORE) {
524 if (!IS_ENABLED(CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE))
525 return -EINVAL;
526 ready_state =
527 MEMBARRIER_STATE_PRIVATE_EXPEDITED_SYNC_CORE_READY;
528 } else if (flags == MEMBARRIER_FLAG_RSEQ) {
529 if (!IS_ENABLED(CONFIG_RSEQ))
530 return -EINVAL;
531 ready_state =
532 MEMBARRIER_STATE_PRIVATE_EXPEDITED_RSEQ_READY;
533 } else {
534 WARN_ON_ONCE(flags);
535 }
536
537 /*
538 * We need to consider threads belonging to different thread
539 * groups, which use the same mm. (CLONE_VM but not
540 * CLONE_THREAD).
541 */
542 if ((atomic_read(v: &mm->membarrier_state) & ready_state) == ready_state)
543 return 0;
544 if (flags & MEMBARRIER_FLAG_SYNC_CORE)
545 set_state |= MEMBARRIER_STATE_PRIVATE_EXPEDITED_SYNC_CORE;
546 if (flags & MEMBARRIER_FLAG_RSEQ)
547 set_state |= MEMBARRIER_STATE_PRIVATE_EXPEDITED_RSEQ;
548 atomic_or(i: set_state, v: &mm->membarrier_state);
549 ret = sync_runqueues_membarrier_state(mm);
550 if (ret)
551 return ret;
552 atomic_or(i: ready_state, v: &mm->membarrier_state);
553
554 return 0;
555}
556
557static int membarrier_get_registrations(void)
558{
559 struct task_struct *p = current;
560 struct mm_struct *mm = p->mm;
561 int registrations_mask = 0, membarrier_state, i;
562 static const int states[] = {
563 MEMBARRIER_STATE_GLOBAL_EXPEDITED |
564 MEMBARRIER_STATE_GLOBAL_EXPEDITED_READY,
565 MEMBARRIER_STATE_PRIVATE_EXPEDITED |
566 MEMBARRIER_STATE_PRIVATE_EXPEDITED_READY,
567 MEMBARRIER_STATE_PRIVATE_EXPEDITED_SYNC_CORE |
568 MEMBARRIER_STATE_PRIVATE_EXPEDITED_SYNC_CORE_READY,
569 MEMBARRIER_STATE_PRIVATE_EXPEDITED_RSEQ |
570 MEMBARRIER_STATE_PRIVATE_EXPEDITED_RSEQ_READY
571 };
572 static const int registration_cmds[] = {
573 MEMBARRIER_CMD_REGISTER_GLOBAL_EXPEDITED,
574 MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED,
575 MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED_SYNC_CORE,
576 MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED_RSEQ
577 };
578 BUILD_BUG_ON(ARRAY_SIZE(states) != ARRAY_SIZE(registration_cmds));
579
580 membarrier_state = atomic_read(v: &mm->membarrier_state);
581 for (i = 0; i < ARRAY_SIZE(states); ++i) {
582 if (membarrier_state & states[i]) {
583 registrations_mask |= registration_cmds[i];
584 membarrier_state &= ~states[i];
585 }
586 }
587 WARN_ON_ONCE(membarrier_state != 0);
588 return registrations_mask;
589}
590
591/**
592 * sys_membarrier - issue memory barriers on a set of threads
593 * @cmd: Takes command values defined in enum membarrier_cmd.
594 * @flags: Currently needs to be 0 for all commands other than
595 * MEMBARRIER_CMD_PRIVATE_EXPEDITED_RSEQ: in the latter
596 * case it can be MEMBARRIER_CMD_FLAG_CPU, indicating that @cpu_id
597 * contains the CPU on which to interrupt (= restart)
598 * the RSEQ critical section.
599 * @cpu_id: if @flags == MEMBARRIER_CMD_FLAG_CPU, indicates the cpu on which
600 * RSEQ CS should be interrupted (@cmd must be
601 * MEMBARRIER_CMD_PRIVATE_EXPEDITED_RSEQ).
602 *
603 * If this system call is not implemented, -ENOSYS is returned. If the
604 * command specified does not exist, not available on the running
605 * kernel, or if the command argument is invalid, this system call
606 * returns -EINVAL. For a given command, with flags argument set to 0,
607 * if this system call returns -ENOSYS or -EINVAL, it is guaranteed to
608 * always return the same value until reboot. In addition, it can return
609 * -ENOMEM if there is not enough memory available to perform the system
610 * call.
611 *
612 * All memory accesses performed in program order from each targeted thread
613 * is guaranteed to be ordered with respect to sys_membarrier(). If we use
614 * the semantic "barrier()" to represent a compiler barrier forcing memory
615 * accesses to be performed in program order across the barrier, and
616 * smp_mb() to represent explicit memory barriers forcing full memory
617 * ordering across the barrier, we have the following ordering table for
618 * each pair of barrier(), sys_membarrier() and smp_mb():
619 *
620 * The pair ordering is detailed as (O: ordered, X: not ordered):
621 *
622 * barrier() smp_mb() sys_membarrier()
623 * barrier() X X O
624 * smp_mb() X O O
625 * sys_membarrier() O O O
626 */
627SYSCALL_DEFINE3(membarrier, int, cmd, unsigned int, flags, int, cpu_id)
628{
629 switch (cmd) {
630 case MEMBARRIER_CMD_PRIVATE_EXPEDITED_RSEQ:
631 if (unlikely(flags && flags != MEMBARRIER_CMD_FLAG_CPU))
632 return -EINVAL;
633 break;
634 default:
635 if (unlikely(flags))
636 return -EINVAL;
637 }
638
639 if (!(flags & MEMBARRIER_CMD_FLAG_CPU))
640 cpu_id = -1;
641
642 switch (cmd) {
643 case MEMBARRIER_CMD_QUERY:
644 {
645 int cmd_mask = MEMBARRIER_CMD_BITMASK;
646
647 if (tick_nohz_full_enabled())
648 cmd_mask &= ~MEMBARRIER_CMD_GLOBAL;
649 return cmd_mask;
650 }
651 case MEMBARRIER_CMD_GLOBAL:
652 /* MEMBARRIER_CMD_GLOBAL is not compatible with nohz_full. */
653 if (tick_nohz_full_enabled())
654 return -EINVAL;
655 if (num_online_cpus() > 1)
656 synchronize_rcu();
657 return 0;
658 case MEMBARRIER_CMD_GLOBAL_EXPEDITED:
659 return membarrier_global_expedited();
660 case MEMBARRIER_CMD_REGISTER_GLOBAL_EXPEDITED:
661 return membarrier_register_global_expedited();
662 case MEMBARRIER_CMD_PRIVATE_EXPEDITED:
663 return membarrier_private_expedited(flags: 0, cpu_id);
664 case MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED:
665 return membarrier_register_private_expedited(flags: 0);
666 case MEMBARRIER_CMD_PRIVATE_EXPEDITED_SYNC_CORE:
667 return membarrier_private_expedited(flags: MEMBARRIER_FLAG_SYNC_CORE, cpu_id);
668 case MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED_SYNC_CORE:
669 return membarrier_register_private_expedited(flags: MEMBARRIER_FLAG_SYNC_CORE);
670 case MEMBARRIER_CMD_PRIVATE_EXPEDITED_RSEQ:
671 return membarrier_private_expedited(flags: MEMBARRIER_FLAG_RSEQ, cpu_id);
672 case MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED_RSEQ:
673 return membarrier_register_private_expedited(flags: MEMBARRIER_FLAG_RSEQ);
674 case MEMBARRIER_CMD_GET_REGISTRATIONS:
675 return membarrier_get_registrations();
676 default:
677 return -EINVAL;
678 }
679}
680