| 1 | // SPDX-License-Identifier: GPL-2.0-or-later | 
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| 2 | /* | 
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| 3 | *  hdac_i915.c - routines for sync between HD-A core and i915 display driver | 
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| 4 | */ | 
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| 5 |  | 
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| 6 | #include <linux/init.h> | 
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| 7 | #include <linux/module.h> | 
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| 8 | #include <linux/pci.h> | 
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| 9 | #include <sound/core.h> | 
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| 10 | #include <sound/hdaudio.h> | 
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| 11 | #include <sound/hda_i915.h> | 
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| 12 | #include <sound/hda_register.h> | 
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| 13 | #include <video/nomodeset.h> | 
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| 14 |  | 
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| 15 | static int gpu_bind = -1; | 
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| 16 | module_param(gpu_bind, int, 0644); | 
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| 17 | MODULE_PARM_DESC(gpu_bind, "Whether to bind sound component to GPU " | 
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| 18 | "(1=always, 0=never, -1=on nomodeset(default))"); | 
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| 19 |  | 
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| 20 | /** | 
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| 21 | * snd_hdac_i915_set_bclk - Reprogram BCLK for HSW/BDW | 
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| 22 | * @bus: HDA core bus | 
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| 23 | * | 
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| 24 | * Intel HSW/BDW display HDA controller is in GPU. Both its power and link BCLK | 
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| 25 | * depends on GPU. Two Extended Mode registers EM4 (M value) and EM5 (N Value) | 
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| 26 | * are used to convert CDClk (Core Display Clock) to 24MHz BCLK: | 
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| 27 | * BCLK = CDCLK * M / N | 
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| 28 | * The values will be lost when the display power well is disabled and need to | 
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| 29 | * be restored to avoid abnormal playback speed. | 
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| 30 | * | 
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| 31 | * Call this function at initializing and changing power well, as well as | 
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| 32 | * at ELD notifier for the hotplug. | 
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| 33 | */ | 
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| 34 | void snd_hdac_i915_set_bclk(struct hdac_bus *bus) | 
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| 35 | { | 
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| 36 | struct drm_audio_component *acomp = bus->audio_component; | 
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| 37 | struct pci_dev *pci = to_pci_dev(bus->dev); | 
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| 38 | int cdclk_freq; | 
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| 39 | unsigned int bclk_m, bclk_n; | 
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| 40 |  | 
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| 41 | if (!acomp || !acomp->ops || !acomp->ops->get_cdclk_freq) | 
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| 42 | return; /* only for i915 binding */ | 
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| 43 | if (!HDA_CONTROLLER_IS_HSW(pci)) | 
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| 44 | return; /* only HSW/BDW */ | 
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| 45 |  | 
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| 46 | cdclk_freq = acomp->ops->get_cdclk_freq(acomp->dev); | 
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| 47 | switch (cdclk_freq) { | 
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| 48 | case 337500: | 
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| 49 | bclk_m = 16; | 
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| 50 | bclk_n = 225; | 
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| 51 | break; | 
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| 52 |  | 
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| 53 | case 450000: | 
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| 54 | default: /* default CDCLK 450MHz */ | 
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| 55 | bclk_m = 4; | 
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| 56 | bclk_n = 75; | 
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| 57 | break; | 
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| 58 |  | 
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| 59 | case 540000: | 
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| 60 | bclk_m = 4; | 
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| 61 | bclk_n = 90; | 
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| 62 | break; | 
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| 63 |  | 
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| 64 | case 675000: | 
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| 65 | bclk_m = 8; | 
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| 66 | bclk_n = 225; | 
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| 67 | break; | 
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| 68 | } | 
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| 69 |  | 
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| 70 | snd_hdac_chip_writew(bus, HSW_EM4, bclk_m); | 
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| 71 | snd_hdac_chip_writew(bus, HSW_EM5, bclk_n); | 
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| 72 | } | 
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| 73 | EXPORT_SYMBOL_GPL(snd_hdac_i915_set_bclk); | 
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| 74 |  | 
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| 75 | /* returns true if the devices can be connected for audio */ | 
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| 76 | static bool connectivity_check(struct pci_dev *i915, struct pci_dev *hdac) | 
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| 77 | { | 
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| 78 | struct pci_bus *bus_a = i915->bus, *bus_b = hdac->bus; | 
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| 79 |  | 
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| 80 | /* directly connected on the same bus */ | 
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| 81 | if (bus_a == bus_b) | 
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| 82 | return true; | 
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| 83 |  | 
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| 84 | bus_a = bus_a->parent; | 
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| 85 | bus_b = bus_b->parent; | 
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| 86 |  | 
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| 87 | /* connected via parent bus (may be NULL!) */ | 
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| 88 | if (bus_a == bus_b) | 
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| 89 | return true; | 
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| 90 |  | 
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| 91 | if (!bus_a || !bus_b) | 
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| 92 | return false; | 
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| 93 |  | 
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| 94 | /* | 
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| 95 | * on i915 discrete GPUs with embedded HDA audio, the two | 
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| 96 | * devices are connected via 2nd level PCI bridge | 
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| 97 | */ | 
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| 98 | bus_a = bus_a->parent; | 
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| 99 | bus_b = bus_b->parent; | 
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| 100 | if (bus_a && bus_a == bus_b) | 
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| 101 | return true; | 
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| 102 |  | 
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| 103 | return false; | 
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| 104 | } | 
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| 105 |  | 
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| 106 | static int i915_component_master_match(struct device *dev, int subcomponent, | 
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| 107 | void *data) | 
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| 108 | { | 
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| 109 | struct pci_dev *hdac_pci, *i915_pci; | 
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| 110 | struct hdac_bus *bus = data; | 
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| 111 |  | 
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| 112 | if (!dev_is_pci(dev)) | 
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| 113 | return 0; | 
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| 114 |  | 
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| 115 | hdac_pci = to_pci_dev(bus->dev); | 
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| 116 | i915_pci = to_pci_dev(dev); | 
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| 117 |  | 
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| 118 | if ((!strcmp(dev->driver->name, "i915") || | 
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| 119 | !strcmp(dev->driver->name, "xe")) && | 
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| 120 | subcomponent == I915_COMPONENT_AUDIO && | 
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| 121 | connectivity_check(i915: i915_pci, hdac: hdac_pci)) | 
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| 122 | return 1; | 
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| 123 |  | 
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| 124 | return 0; | 
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| 125 | } | 
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| 126 |  | 
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| 127 | /* check whether Intel graphics is present and reachable */ | 
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| 128 | static int i915_gfx_present(struct pci_dev *hdac_pci) | 
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| 129 | { | 
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| 130 | /* List of known platforms with no i915 support. */ | 
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| 131 | static const struct pci_device_id denylist[] = { | 
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| 132 | /* CNL */ | 
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| 133 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x5a40), 0x030000, 0xff0000 }, | 
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| 134 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x5a41), .class: 0x030000, .class_mask: 0xff0000 }, | 
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| 135 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x5a42), .class: 0x030000, .class_mask: 0xff0000 }, | 
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| 136 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x5a44), .class: 0x030000, .class_mask: 0xff0000 }, | 
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| 137 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x5a49), .class: 0x030000, .class_mask: 0xff0000 }, | 
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| 138 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x5a4a), .class: 0x030000, .class_mask: 0xff0000 }, | 
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| 139 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x5a4c), .class: 0x030000, .class_mask: 0xff0000 }, | 
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| 140 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x5a50), .class: 0x030000, .class_mask: 0xff0000 }, | 
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| 141 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x5a51), .class: 0x030000, .class_mask: 0xff0000 }, | 
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| 142 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x5a52), .class: 0x030000, .class_mask: 0xff0000 }, | 
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| 143 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x5a54), .class: 0x030000, .class_mask: 0xff0000 }, | 
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| 144 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x5a59), .class: 0x030000, .class_mask: 0xff0000 }, | 
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| 145 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x5a5a), .class: 0x030000, .class_mask: 0xff0000 }, | 
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| 146 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x5a5c), .class: 0x030000, .class_mask: 0xff0000 }, | 
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| 147 | /* LKF */ | 
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| 148 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x9840), .class: 0x030000, .class_mask: 0xff0000 }, | 
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| 149 | {} | 
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| 150 | }; | 
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| 151 | struct pci_dev *display_dev = NULL; | 
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| 152 |  | 
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| 153 | if (!gpu_bind || (gpu_bind < 0 && video_firmware_drivers_only())) | 
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| 154 | return false; | 
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| 155 |  | 
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| 156 | for_each_pci_dev(display_dev) { | 
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| 157 | if (display_dev->vendor != PCI_VENDOR_ID_INTEL || | 
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| 158 | !pci_is_display(pdev: display_dev)) | 
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| 159 | continue; | 
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| 160 |  | 
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| 161 | if (pci_match_id(ids: denylist, dev: display_dev)) | 
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| 162 | continue; | 
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| 163 |  | 
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| 164 | if (connectivity_check(i915: display_dev, hdac: hdac_pci)) { | 
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| 165 | pci_dev_put(dev: display_dev); | 
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| 166 | return true; | 
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| 167 | } | 
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| 168 | } | 
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| 169 |  | 
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| 170 | return false; | 
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| 171 | } | 
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| 172 |  | 
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| 173 | /** | 
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| 174 | * snd_hdac_i915_init - Initialize i915 audio component | 
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| 175 | * @bus: HDA core bus | 
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| 176 | * | 
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| 177 | * This function is supposed to be used only by a HD-audio controller | 
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| 178 | * driver that needs the interaction with i915 graphics. | 
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| 179 | * | 
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| 180 | * This function initializes and sets up the audio component to communicate | 
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| 181 | * with i915 graphics driver. | 
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| 182 | * | 
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| 183 | * Returns zero for success or a negative error code. | 
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| 184 | */ | 
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| 185 | int snd_hdac_i915_init(struct hdac_bus *bus) | 
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| 186 | { | 
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| 187 | struct drm_audio_component *acomp; | 
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| 188 | int err; | 
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| 189 |  | 
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| 190 | if (!i915_gfx_present(to_pci_dev(bus->dev))) | 
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| 191 | return -ENODEV; | 
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| 192 |  | 
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| 193 | err = snd_hdac_acomp_init(bus, NULL, | 
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| 194 | match_master: i915_component_master_match, | 
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| 195 | extra_size: sizeof(struct i915_audio_component) - sizeof(*acomp)); | 
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| 196 | if (err < 0) | 
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| 197 | return err; | 
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| 198 | acomp = bus->audio_component; | 
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| 199 | if (!acomp) | 
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| 200 | return -ENODEV; | 
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| 201 | if (!acomp->ops) { | 
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| 202 | snd_hdac_acomp_exit(bus); | 
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| 203 | return dev_err_probe(dev: bus->dev, err: -EPROBE_DEFER, | 
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| 204 | fmt: "couldn't bind with audio component\n"); | 
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| 205 | } | 
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| 206 | return 0; | 
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| 207 | } | 
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| 208 | EXPORT_SYMBOL_GPL(snd_hdac_i915_init); | 
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| 209 |  | 
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