| 1 | /* SPDX-License-Identifier: GPL-2.0 */ | 
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| 2 | #ifndef _ASM_X86_AGP_H | 
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| 3 | #define _ASM_X86_AGP_H | 
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| 4 |  | 
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| 5 | #include <linux/pgtable.h> | 
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| 6 | #include <asm/cacheflush.h> | 
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| 7 |  | 
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| 8 | /* | 
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| 9 | * Functions to keep the agpgart mappings coherent with the MMU. The | 
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| 10 | * GART gives the CPU a physical alias of pages in memory. The alias | 
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| 11 | * region is mapped uncacheable. Make sure there are no conflicting | 
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| 12 | * mappings with different cacheability attributes for the same | 
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| 13 | * page. This avoids data corruption on some CPUs. | 
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| 14 | */ | 
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| 15 |  | 
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| 16 | #define map_page_into_agp(page) set_pages_uc(page, 1) | 
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| 17 | #define unmap_page_from_agp(page) set_pages_wb(page, 1) | 
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| 18 |  | 
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| 19 | /* | 
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| 20 | * Could use CLFLUSH here if the cpu supports it. But then it would | 
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| 21 | * need to be called for each cacheline of the whole page so it may | 
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| 22 | * not be worth it. Would need a page for it. | 
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| 23 | */ | 
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| 24 | #define flush_agp_cache() wbinvd() | 
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| 25 |  | 
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| 26 | #endif /* _ASM_X86_AGP_H */ | 
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| 27 |  | 
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