| 1 | /* SPDX-License-Identifier: GPL-2.0 */ | 
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| 2 | /* Copyright (C) 2021-2022 Intel Corporation */ | 
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| 3 | #ifndef _ASM_X86_TDX_H | 
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| 4 | #define _ASM_X86_TDX_H | 
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| 5 |  | 
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| 6 | #include <linux/init.h> | 
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| 7 | #include <linux/bits.h> | 
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| 8 | #include <linux/mmzone.h> | 
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| 9 |  | 
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| 10 | #include <asm/errno.h> | 
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| 11 | #include <asm/ptrace.h> | 
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| 12 | #include <asm/trapnr.h> | 
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| 13 | #include <asm/shared/tdx.h> | 
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| 14 |  | 
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| 15 | /* | 
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| 16 | * SW-defined error codes. | 
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| 17 | * | 
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| 18 | * Bits 47:40 == 0xFF indicate Reserved status code class that never used by | 
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| 19 | * TDX module. | 
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| 20 | */ | 
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| 21 | #define TDX_ERROR			_BITUL(63) | 
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| 22 | #define TDX_NON_RECOVERABLE		_BITUL(62) | 
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| 23 | #define TDX_SW_ERROR			(TDX_ERROR | GENMASK_ULL(47, 40)) | 
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| 24 | #define TDX_SEAMCALL_VMFAILINVALID	(TDX_SW_ERROR | _UL(0xFFFF0000)) | 
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| 25 |  | 
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| 26 | #define TDX_SEAMCALL_GP			(TDX_SW_ERROR | X86_TRAP_GP) | 
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| 27 | #define TDX_SEAMCALL_UD			(TDX_SW_ERROR | X86_TRAP_UD) | 
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| 28 |  | 
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| 29 | /* | 
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| 30 | * TDX module SEAMCALL leaf function error codes | 
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| 31 | */ | 
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| 32 | #define TDX_SUCCESS		0ULL | 
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| 33 | #define TDX_RND_NO_ENTROPY	0x8000020300000000ULL | 
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| 34 |  | 
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| 35 | #ifndef __ASSEMBLER__ | 
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| 36 |  | 
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| 37 | #include <uapi/asm/mce.h> | 
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| 38 | #include <asm/tdx_global_metadata.h> | 
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| 39 | #include <linux/pgtable.h> | 
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| 40 |  | 
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| 41 | /* | 
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| 42 | * Used by the #VE exception handler to gather the #VE exception | 
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| 43 | * info from the TDX module. This is a software only structure | 
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| 44 | * and not part of the TDX module/VMM ABI. | 
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| 45 | */ | 
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| 46 | struct ve_info { | 
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| 47 | u64 exit_reason; | 
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| 48 | u64 exit_qual; | 
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| 49 | /* Guest Linear (virtual) Address */ | 
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| 50 | u64 gla; | 
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| 51 | /* Guest Physical Address */ | 
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| 52 | u64 gpa; | 
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| 53 | u32 instr_len; | 
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| 54 | u32 instr_info; | 
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| 55 | }; | 
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| 56 |  | 
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| 57 | #ifdef CONFIG_INTEL_TDX_GUEST | 
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| 58 |  | 
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| 59 | void __init tdx_early_init(void); | 
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| 60 |  | 
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| 61 | void tdx_get_ve_info(struct ve_info *ve); | 
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| 62 |  | 
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| 63 | bool tdx_handle_virt_exception(struct pt_regs *regs, struct ve_info *ve); | 
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| 64 |  | 
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| 65 | void tdx_halt(void); | 
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| 66 |  | 
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| 67 | bool tdx_early_handle_ve(struct pt_regs *regs); | 
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| 68 |  | 
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| 69 | int tdx_mcall_get_report0(u8 *reportdata, u8 *tdreport); | 
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| 70 |  | 
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| 71 | int tdx_mcall_extend_rtmr(u8 index, u8 *data); | 
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| 72 |  | 
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| 73 | u64 tdx_hcall_get_quote(u8 *buf, size_t size); | 
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| 74 |  | 
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| 75 | void __init tdx_dump_attributes(u64 td_attr); | 
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| 76 | void __init tdx_dump_td_ctls(u64 td_ctls); | 
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| 77 |  | 
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| 78 | #else | 
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| 79 |  | 
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| 80 | static inline void tdx_early_init(void) { }; | 
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| 81 | static inline void tdx_halt(void) { }; | 
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| 82 |  | 
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| 83 | static inline bool tdx_early_handle_ve(struct pt_regs *regs) { return false; } | 
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| 84 |  | 
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| 85 | #endif /* CONFIG_INTEL_TDX_GUEST */ | 
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| 86 |  | 
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| 87 | #if defined(CONFIG_KVM_GUEST) && defined(CONFIG_INTEL_TDX_GUEST) | 
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| 88 | long tdx_kvm_hypercall(unsigned int nr, unsigned long p1, unsigned long p2, | 
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| 89 | unsigned long p3, unsigned long p4); | 
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| 90 | #else | 
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| 91 | static inline long tdx_kvm_hypercall(unsigned int nr, unsigned long p1, | 
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| 92 | unsigned long p2, unsigned long p3, | 
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| 93 | unsigned long p4) | 
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| 94 | { | 
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| 95 | return -ENODEV; | 
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| 96 | } | 
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| 97 | #endif /* CONFIG_INTEL_TDX_GUEST && CONFIG_KVM_GUEST */ | 
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| 98 |  | 
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| 99 | #ifdef CONFIG_INTEL_TDX_HOST | 
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| 100 | u64 __seamcall(u64 fn, struct tdx_module_args *args); | 
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| 101 | u64 __seamcall_ret(u64 fn, struct tdx_module_args *args); | 
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| 102 | u64 __seamcall_saved_ret(u64 fn, struct tdx_module_args *args); | 
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| 103 | void tdx_init(void); | 
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| 104 |  | 
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| 105 | #include <linux/preempt.h> | 
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| 106 | #include <asm/archrandom.h> | 
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| 107 | #include <asm/processor.h> | 
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| 108 |  | 
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| 109 | typedef u64 (*sc_func_t)(u64 fn, struct tdx_module_args *args); | 
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| 110 |  | 
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| 111 | static __always_inline u64 __seamcall_dirty_cache(sc_func_t func, u64 fn, | 
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| 112 | struct tdx_module_args *args) | 
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| 113 | { | 
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| 114 | lockdep_assert_preemption_disabled(); | 
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| 115 |  | 
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| 116 | /* | 
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| 117 | * SEAMCALLs are made to the TDX module and can generate dirty | 
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| 118 | * cachelines of TDX private memory.  Mark cache state incoherent | 
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| 119 | * so that the cache can be flushed during kexec. | 
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| 120 | * | 
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| 121 | * This needs to be done before actually making the SEAMCALL, | 
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| 122 | * because kexec-ing CPU could send NMI to stop remote CPUs, | 
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| 123 | * in which case even disabling IRQ won't help here. | 
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| 124 | */ | 
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| 125 | this_cpu_write(cache_state_incoherent, true); | 
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| 126 |  | 
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| 127 | return func(fn, args); | 
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| 128 | } | 
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| 129 |  | 
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| 130 | static __always_inline u64 sc_retry(sc_func_t func, u64 fn, | 
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| 131 | struct tdx_module_args *args) | 
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| 132 | { | 
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| 133 | int retry = RDRAND_RETRY_LOOPS; | 
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| 134 | u64 ret; | 
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| 135 |  | 
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| 136 | do { | 
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| 137 | preempt_disable(); | 
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| 138 | ret = __seamcall_dirty_cache(func, fn, args); | 
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| 139 | preempt_enable(); | 
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| 140 | } while (ret == TDX_RND_NO_ENTROPY && --retry); | 
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| 141 |  | 
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| 142 | return ret; | 
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| 143 | } | 
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| 144 |  | 
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| 145 | #define seamcall(_fn, _args)		sc_retry(__seamcall, (_fn), (_args)) | 
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| 146 | #define seamcall_ret(_fn, _args)	sc_retry(__seamcall_ret, (_fn), (_args)) | 
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| 147 | #define seamcall_saved_ret(_fn, _args)	sc_retry(__seamcall_saved_ret, (_fn), (_args)) | 
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| 148 | int tdx_cpu_enable(void); | 
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| 149 | int tdx_enable(void); | 
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| 150 | const char *tdx_dump_mce_info(struct mce *m); | 
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| 151 | const struct tdx_sys_info *tdx_get_sysinfo(void); | 
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| 152 |  | 
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| 153 | int tdx_guest_keyid_alloc(void); | 
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| 154 | u32 tdx_get_nr_guest_keyids(void); | 
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| 155 | void tdx_guest_keyid_free(unsigned int keyid); | 
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| 156 |  | 
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| 157 | void tdx_quirk_reset_page(struct page *page); | 
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| 158 |  | 
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| 159 | struct tdx_td { | 
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| 160 | /* TD root structure: */ | 
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| 161 | struct page *tdr_page; | 
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| 162 |  | 
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| 163 | int tdcs_nr_pages; | 
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| 164 | /* TD control structure: */ | 
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| 165 | struct page **tdcs_pages; | 
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| 166 |  | 
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| 167 | /* Size of `tdcx_pages` in struct tdx_vp */ | 
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| 168 | int tdcx_nr_pages; | 
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| 169 | }; | 
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| 170 |  | 
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| 171 | struct tdx_vp { | 
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| 172 | /* TDVP root page */ | 
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| 173 | struct page *tdvpr_page; | 
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| 174 | /* precalculated page_to_phys(tdvpr_page) for use in noinstr code */ | 
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| 175 | phys_addr_t tdvpr_pa; | 
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| 176 |  | 
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| 177 | /* TD vCPU control structure: */ | 
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| 178 | struct page **tdcx_pages; | 
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| 179 | }; | 
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| 180 |  | 
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| 181 | static inline u64 mk_keyed_paddr(u16 hkid, struct page *page) | 
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| 182 | { | 
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| 183 | u64 ret; | 
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| 184 |  | 
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| 185 | ret = page_to_phys(page); | 
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| 186 | /* KeyID bits are just above the physical address bits: */ | 
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| 187 | ret |= (u64)hkid << boot_cpu_data.x86_phys_bits; | 
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| 188 |  | 
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| 189 | return ret; | 
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| 190 | } | 
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| 191 |  | 
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| 192 | static inline int pg_level_to_tdx_sept_level(enum pg_level level) | 
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| 193 | { | 
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| 194 | WARN_ON_ONCE(level == PG_LEVEL_NONE); | 
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| 195 | return level - 1; | 
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| 196 | } | 
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| 197 |  | 
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| 198 | u64 tdh_vp_enter(struct tdx_vp *vp, struct tdx_module_args *args); | 
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| 199 | u64 tdh_mng_addcx(struct tdx_td *td, struct page *tdcs_page); | 
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| 200 | u64 tdh_mem_page_add(struct tdx_td *td, u64 gpa, struct page *page, struct page *source, u64 *ext_err1, u64 *ext_err2); | 
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| 201 | u64 tdh_mem_sept_add(struct tdx_td *td, u64 gpa, int level, struct page *page, u64 *ext_err1, u64 *ext_err2); | 
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| 202 | u64 tdh_vp_addcx(struct tdx_vp *vp, struct page *tdcx_page); | 
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| 203 | u64 tdh_mem_page_aug(struct tdx_td *td, u64 gpa, int level, struct page *page, u64 *ext_err1, u64 *ext_err2); | 
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| 204 | u64 tdh_mem_range_block(struct tdx_td *td, u64 gpa, int level, u64 *ext_err1, u64 *ext_err2); | 
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| 205 | u64 tdh_mng_key_config(struct tdx_td *td); | 
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| 206 | u64 tdh_mng_create(struct tdx_td *td, u16 hkid); | 
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| 207 | u64 tdh_vp_create(struct tdx_td *td, struct tdx_vp *vp); | 
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| 208 | u64 tdh_mng_rd(struct tdx_td *td, u64 field, u64 *data); | 
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| 209 | u64 tdh_mr_extend(struct tdx_td *td, u64 gpa, u64 *ext_err1, u64 *ext_err2); | 
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| 210 | u64 tdh_mr_finalize(struct tdx_td *td); | 
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| 211 | u64 tdh_vp_flush(struct tdx_vp *vp); | 
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| 212 | u64 tdh_mng_vpflushdone(struct tdx_td *td); | 
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| 213 | u64 tdh_mng_key_freeid(struct tdx_td *td); | 
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| 214 | u64 tdh_mng_init(struct tdx_td *td, u64 td_params, u64 *extended_err); | 
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| 215 | u64 tdh_vp_init(struct tdx_vp *vp, u64 initial_rcx, u32 x2apicid); | 
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| 216 | u64 tdh_vp_rd(struct tdx_vp *vp, u64 field, u64 *data); | 
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| 217 | u64 tdh_vp_wr(struct tdx_vp *vp, u64 field, u64 data, u64 mask); | 
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| 218 | u64 tdh_phymem_page_reclaim(struct page *page, u64 *tdx_pt, u64 *tdx_owner, u64 *tdx_size); | 
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| 219 | u64 tdh_mem_track(struct tdx_td *tdr); | 
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| 220 | u64 tdh_mem_page_remove(struct tdx_td *td, u64 gpa, u64 level, u64 *ext_err1, u64 *ext_err2); | 
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| 221 | u64 tdh_phymem_cache_wb(bool resume); | 
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| 222 | u64 tdh_phymem_page_wbinvd_tdr(struct tdx_td *td); | 
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| 223 | u64 tdh_phymem_page_wbinvd_hkid(u64 hkid, struct page *page); | 
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| 224 | #else | 
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| 225 | static inline void tdx_init(void) { } | 
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| 226 | static inline int tdx_cpu_enable(void) { return -ENODEV; } | 
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| 227 | static inline int tdx_enable(void)  { return -ENODEV; } | 
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| 228 | static inline u32 tdx_get_nr_guest_keyids(void) { return 0; } | 
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| 229 | static inline const char *tdx_dump_mce_info(struct mce *m) { return NULL; } | 
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| 230 | static inline const struct tdx_sys_info *tdx_get_sysinfo(void) { return NULL; } | 
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| 231 | #endif	/* CONFIG_INTEL_TDX_HOST */ | 
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| 232 |  | 
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| 233 | #ifdef CONFIG_KEXEC_CORE | 
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| 234 | void tdx_cpu_flush_cache_for_kexec(void); | 
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| 235 | #else | 
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| 236 | static inline void tdx_cpu_flush_cache_for_kexec(void) { } | 
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| 237 | #endif | 
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| 238 |  | 
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| 239 | #endif /* !__ASSEMBLER__ */ | 
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| 240 | #endif /* _ASM_X86_TDX_H */ | 
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| 241 |  | 
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