1// SPDX-License-Identifier: MIT
2
3#include <linux/export.h>
4#include <linux/module.h>
5
6#include <drm/display/drm_hdmi_helper.h>
7#include <drm/drm_connector.h>
8#include <drm/drm_edid.h>
9#include <drm/drm_modes.h>
10#include <drm/drm_print.h>
11#include <drm/drm_property.h>
12
13static inline bool is_eotf_supported(u8 output_eotf, u8 sink_eotf)
14{
15 return sink_eotf & BIT(output_eotf);
16}
17
18/**
19 * drm_hdmi_infoframe_set_hdr_metadata() - fill an HDMI DRM infoframe with
20 * HDR metadata from userspace
21 * @frame: HDMI DRM infoframe
22 * @conn_state: Connector state containing HDR metadata
23 *
24 * Return: 0 on success or a negative error code on failure.
25 */
26int drm_hdmi_infoframe_set_hdr_metadata(struct hdmi_drm_infoframe *frame,
27 const struct drm_connector_state *conn_state)
28{
29 struct drm_connector *connector;
30 struct hdr_output_metadata *hdr_metadata;
31 int err;
32
33 if (!frame || !conn_state)
34 return -EINVAL;
35
36 connector = conn_state->connector;
37
38 if (!conn_state->hdr_output_metadata)
39 return -EINVAL;
40
41 hdr_metadata = conn_state->hdr_output_metadata->data;
42
43 if (!hdr_metadata || !connector)
44 return -EINVAL;
45
46 /* Sink EOTF is Bit map while infoframe is absolute values */
47 if (!is_eotf_supported(output_eotf: hdr_metadata->hdmi_metadata_type1.eotf,
48 sink_eotf: connector->display_info.hdr_sink_metadata.hdmi_type1.eotf))
49 DRM_DEBUG_KMS("Unknown EOTF %d\n", hdr_metadata->hdmi_metadata_type1.eotf);
50
51 err = hdmi_drm_infoframe_init(frame);
52 if (err < 0)
53 return err;
54
55 frame->eotf = hdr_metadata->hdmi_metadata_type1.eotf;
56 frame->metadata_type = hdr_metadata->hdmi_metadata_type1.metadata_type;
57
58 BUILD_BUG_ON(sizeof(frame->display_primaries) !=
59 sizeof(hdr_metadata->hdmi_metadata_type1.display_primaries));
60 BUILD_BUG_ON(sizeof(frame->white_point) !=
61 sizeof(hdr_metadata->hdmi_metadata_type1.white_point));
62
63 memcpy(to: &frame->display_primaries,
64 from: &hdr_metadata->hdmi_metadata_type1.display_primaries,
65 len: sizeof(frame->display_primaries));
66
67 memcpy(to: &frame->white_point,
68 from: &hdr_metadata->hdmi_metadata_type1.white_point,
69 len: sizeof(frame->white_point));
70
71 frame->max_display_mastering_luminance =
72 hdr_metadata->hdmi_metadata_type1.max_display_mastering_luminance;
73 frame->min_display_mastering_luminance =
74 hdr_metadata->hdmi_metadata_type1.min_display_mastering_luminance;
75 frame->max_fall = hdr_metadata->hdmi_metadata_type1.max_fall;
76 frame->max_cll = hdr_metadata->hdmi_metadata_type1.max_cll;
77
78 return 0;
79}
80EXPORT_SYMBOL(drm_hdmi_infoframe_set_hdr_metadata);
81
82/* HDMI Colorspace Spec Definitions */
83#define FULL_COLORIMETRY_MASK 0x1FF
84#define NORMAL_COLORIMETRY_MASK 0x3
85#define EXTENDED_COLORIMETRY_MASK 0x7
86#define EXTENDED_ACE_COLORIMETRY_MASK 0xF
87
88#define C(x) ((x) << 0)
89#define EC(x) ((x) << 2)
90#define ACE(x) ((x) << 5)
91
92#define HDMI_COLORIMETRY_NO_DATA 0x0
93#define HDMI_COLORIMETRY_SMPTE_170M_YCC (C(1) | EC(0) | ACE(0))
94#define HDMI_COLORIMETRY_BT709_YCC (C(2) | EC(0) | ACE(0))
95#define HDMI_COLORIMETRY_XVYCC_601 (C(3) | EC(0) | ACE(0))
96#define HDMI_COLORIMETRY_XVYCC_709 (C(3) | EC(1) | ACE(0))
97#define HDMI_COLORIMETRY_SYCC_601 (C(3) | EC(2) | ACE(0))
98#define HDMI_COLORIMETRY_OPYCC_601 (C(3) | EC(3) | ACE(0))
99#define HDMI_COLORIMETRY_OPRGB (C(3) | EC(4) | ACE(0))
100#define HDMI_COLORIMETRY_BT2020_CYCC (C(3) | EC(5) | ACE(0))
101#define HDMI_COLORIMETRY_BT2020_RGB (C(3) | EC(6) | ACE(0))
102#define HDMI_COLORIMETRY_BT2020_YCC (C(3) | EC(6) | ACE(0))
103#define HDMI_COLORIMETRY_DCI_P3_RGB_D65 (C(3) | EC(7) | ACE(0))
104#define HDMI_COLORIMETRY_DCI_P3_RGB_THEATER (C(3) | EC(7) | ACE(1))
105
106static const u32 hdmi_colorimetry_val[] = {
107 [DRM_MODE_COLORIMETRY_NO_DATA] = HDMI_COLORIMETRY_NO_DATA,
108 [DRM_MODE_COLORIMETRY_SMPTE_170M_YCC] = HDMI_COLORIMETRY_SMPTE_170M_YCC,
109 [DRM_MODE_COLORIMETRY_BT709_YCC] = HDMI_COLORIMETRY_BT709_YCC,
110 [DRM_MODE_COLORIMETRY_XVYCC_601] = HDMI_COLORIMETRY_XVYCC_601,
111 [DRM_MODE_COLORIMETRY_XVYCC_709] = HDMI_COLORIMETRY_XVYCC_709,
112 [DRM_MODE_COLORIMETRY_SYCC_601] = HDMI_COLORIMETRY_SYCC_601,
113 [DRM_MODE_COLORIMETRY_OPYCC_601] = HDMI_COLORIMETRY_OPYCC_601,
114 [DRM_MODE_COLORIMETRY_OPRGB] = HDMI_COLORIMETRY_OPRGB,
115 [DRM_MODE_COLORIMETRY_BT2020_CYCC] = HDMI_COLORIMETRY_BT2020_CYCC,
116 [DRM_MODE_COLORIMETRY_BT2020_RGB] = HDMI_COLORIMETRY_BT2020_RGB,
117 [DRM_MODE_COLORIMETRY_BT2020_YCC] = HDMI_COLORIMETRY_BT2020_YCC,
118};
119
120#undef C
121#undef EC
122#undef ACE
123
124/**
125 * drm_hdmi_avi_infoframe_colorimetry() - fill the HDMI AVI infoframe
126 * colorimetry information
127 * @frame: HDMI AVI infoframe
128 * @conn_state: connector state
129 */
130void drm_hdmi_avi_infoframe_colorimetry(struct hdmi_avi_infoframe *frame,
131 const struct drm_connector_state *conn_state)
132{
133 u32 colorimetry_val;
134 u32 colorimetry_index = conn_state->colorspace & FULL_COLORIMETRY_MASK;
135
136 if (colorimetry_index >= ARRAY_SIZE(hdmi_colorimetry_val))
137 colorimetry_val = HDMI_COLORIMETRY_NO_DATA;
138 else
139 colorimetry_val = hdmi_colorimetry_val[colorimetry_index];
140
141 frame->colorimetry = colorimetry_val & NORMAL_COLORIMETRY_MASK;
142 /*
143 * ToDo: Extend it for ACE formats as well. Modify the infoframe
144 * structure and extend it in drivers/video/hdmi
145 */
146 frame->extended_colorimetry = (colorimetry_val >> 2) &
147 EXTENDED_COLORIMETRY_MASK;
148}
149EXPORT_SYMBOL(drm_hdmi_avi_infoframe_colorimetry);
150
151/**
152 * drm_hdmi_avi_infoframe_bars() - fill the HDMI AVI infoframe
153 * bar information
154 * @frame: HDMI AVI infoframe
155 * @conn_state: connector state
156 */
157void drm_hdmi_avi_infoframe_bars(struct hdmi_avi_infoframe *frame,
158 const struct drm_connector_state *conn_state)
159{
160 frame->right_bar = conn_state->tv.margins.right;
161 frame->left_bar = conn_state->tv.margins.left;
162 frame->top_bar = conn_state->tv.margins.top;
163 frame->bottom_bar = conn_state->tv.margins.bottom;
164}
165EXPORT_SYMBOL(drm_hdmi_avi_infoframe_bars);
166
167/**
168 * drm_hdmi_avi_infoframe_content_type() - fill the HDMI AVI infoframe
169 * content type information, based
170 * on correspondent DRM property.
171 * @frame: HDMI AVI infoframe
172 * @conn_state: DRM display connector state
173 *
174 */
175void drm_hdmi_avi_infoframe_content_type(struct hdmi_avi_infoframe *frame,
176 const struct drm_connector_state *conn_state)
177{
178 switch (conn_state->content_type) {
179 case DRM_MODE_CONTENT_TYPE_GRAPHICS:
180 frame->content_type = HDMI_CONTENT_TYPE_GRAPHICS;
181 break;
182 case DRM_MODE_CONTENT_TYPE_CINEMA:
183 frame->content_type = HDMI_CONTENT_TYPE_CINEMA;
184 break;
185 case DRM_MODE_CONTENT_TYPE_GAME:
186 frame->content_type = HDMI_CONTENT_TYPE_GAME;
187 break;
188 case DRM_MODE_CONTENT_TYPE_PHOTO:
189 frame->content_type = HDMI_CONTENT_TYPE_PHOTO;
190 break;
191 default:
192 /* Graphics is the default(0) */
193 frame->content_type = HDMI_CONTENT_TYPE_GRAPHICS;
194 }
195
196 frame->itc = conn_state->content_type != DRM_MODE_CONTENT_TYPE_NO_DATA;
197}
198EXPORT_SYMBOL(drm_hdmi_avi_infoframe_content_type);
199
200/**
201 * drm_hdmi_compute_mode_clock() - Computes the TMDS Character Rate
202 * @mode: Display mode to compute the clock for
203 * @bpc: Bits per character
204 * @fmt: Output Pixel Format used
205 *
206 * Returns the TMDS Character Rate for a given mode, bpc count and output format.
207 *
208 * RETURNS:
209 * The TMDS Character Rate, in Hertz, or 0 on error.
210 */
211unsigned long long
212drm_hdmi_compute_mode_clock(const struct drm_display_mode *mode,
213 unsigned int bpc, enum hdmi_colorspace fmt)
214{
215 unsigned long long clock = mode->clock * 1000ULL;
216 unsigned int vic = drm_match_cea_mode(to_match: mode);
217
218 /*
219 * CTA-861-G Spec, section 5.4 - Color Coding and Quantization
220 * mandates that VIC 1 always uses 8 bpc.
221 */
222 if (vic == 1 && bpc != 8)
223 return 0;
224
225 if (fmt == HDMI_COLORSPACE_YUV422) {
226 /*
227 * HDMI 1.0 Spec, section 6.5 - Pixel Encoding states that
228 * YUV422 sends 24 bits over three channels, with Cb and Cr
229 * components being sent on odd and even pixels, respectively.
230 *
231 * If fewer than 12 bpc are sent, data are left justified.
232 */
233 if (bpc > 12)
234 return 0;
235
236 /*
237 * HDMI 1.0 Spec, section 6.5 - Pixel Encoding
238 * specifies that YUV422 sends two 12-bits components over
239 * three TMDS channels per pixel clock, which is equivalent to
240 * three 8-bits components over three channels used by RGB as
241 * far as the clock rate goes.
242 */
243 bpc = 8;
244 }
245
246 /*
247 * HDMI 2.0 Spec, Section 7.1 - YCbCr 4:2:0 Pixel Encoding
248 * specifies that YUV420 encoding is carried at a TMDS Character Rate
249 * equal to half the pixel clock rate.
250 */
251 if (fmt == HDMI_COLORSPACE_YUV420)
252 clock = clock / 2;
253
254 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
255 clock = clock * 2;
256
257 return DIV_ROUND_CLOSEST_ULL(clock * bpc, 8);
258}
259EXPORT_SYMBOL(drm_hdmi_compute_mode_clock);
260
261struct drm_hdmi_acr_n_cts_entry {
262 unsigned int n;
263 unsigned int cts;
264};
265
266struct drm_hdmi_acr_data {
267 unsigned long tmds_clock_khz;
268 struct drm_hdmi_acr_n_cts_entry n_cts_32k,
269 n_cts_44k1,
270 n_cts_48k;
271};
272
273static const struct drm_hdmi_acr_data hdmi_acr_n_cts[] = {
274 {
275 /* "Other" entry */
276 .n_cts_32k = { .n = 4096, },
277 .n_cts_44k1 = { .n = 6272, },
278 .n_cts_48k = { .n = 6144, },
279 }, {
280 .tmds_clock_khz = 25175,
281 .n_cts_32k = { .n = 4576, .cts = 28125, },
282 .n_cts_44k1 = { .n = 7007, .cts = 31250, },
283 .n_cts_48k = { .n = 6864, .cts = 28125, },
284 }, {
285 .tmds_clock_khz = 25200,
286 .n_cts_32k = { .n = 4096, .cts = 25200, },
287 .n_cts_44k1 = { .n = 6272, .cts = 28000, },
288 .n_cts_48k = { .n = 6144, .cts = 25200, },
289 }, {
290 .tmds_clock_khz = 27000,
291 .n_cts_32k = { .n = 4096, .cts = 27000, },
292 .n_cts_44k1 = { .n = 6272, .cts = 30000, },
293 .n_cts_48k = { .n = 6144, .cts = 27000, },
294 }, {
295 .tmds_clock_khz = 27027,
296 .n_cts_32k = { .n = 4096, .cts = 27027, },
297 .n_cts_44k1 = { .n = 6272, .cts = 30030, },
298 .n_cts_48k = { .n = 6144, .cts = 27027, },
299 }, {
300 .tmds_clock_khz = 54000,
301 .n_cts_32k = { .n = 4096, .cts = 54000, },
302 .n_cts_44k1 = { .n = 6272, .cts = 60000, },
303 .n_cts_48k = { .n = 6144, .cts = 54000, },
304 }, {
305 .tmds_clock_khz = 54054,
306 .n_cts_32k = { .n = 4096, .cts = 54054, },
307 .n_cts_44k1 = { .n = 6272, .cts = 60060, },
308 .n_cts_48k = { .n = 6144, .cts = 54054, },
309 }, {
310 .tmds_clock_khz = 74176,
311 .n_cts_32k = { .n = 11648, .cts = 210937, }, /* and 210938 */
312 .n_cts_44k1 = { .n = 17836, .cts = 234375, },
313 .n_cts_48k = { .n = 11648, .cts = 140625, },
314 }, {
315 .tmds_clock_khz = 74250,
316 .n_cts_32k = { .n = 4096, .cts = 74250, },
317 .n_cts_44k1 = { .n = 6272, .cts = 82500, },
318 .n_cts_48k = { .n = 6144, .cts = 74250, },
319 }, {
320 .tmds_clock_khz = 148352,
321 .n_cts_32k = { .n = 11648, .cts = 421875, },
322 .n_cts_44k1 = { .n = 8918, .cts = 234375, },
323 .n_cts_48k = { .n = 5824, .cts = 140625, },
324 }, {
325 .tmds_clock_khz = 148500,
326 .n_cts_32k = { .n = 4096, .cts = 148500, },
327 .n_cts_44k1 = { .n = 6272, .cts = 165000, },
328 .n_cts_48k = { .n = 6144, .cts = 148500, },
329 }, {
330 .tmds_clock_khz = 296703,
331 .n_cts_32k = { .n = 5824, .cts = 421875, },
332 .n_cts_44k1 = { .n = 4459, .cts = 234375, },
333 .n_cts_48k = { .n = 5824, .cts = 281250, },
334 }, {
335 .tmds_clock_khz = 297000,
336 .n_cts_32k = { .n = 3072, .cts = 222750, },
337 .n_cts_44k1 = { .n = 4704, .cts = 247500, },
338 .n_cts_48k = { .n = 5120, .cts = 247500, },
339 }, {
340 .tmds_clock_khz = 593407,
341 .n_cts_32k = { .n = 5824, .cts = 843750, },
342 .n_cts_44k1 = { .n = 8918, .cts = 937500, },
343 .n_cts_48k = { .n = 5824, .cts = 562500, },
344 }, {
345 .tmds_clock_khz = 594000,
346 .n_cts_32k = { .n = 3072, .cts = 445500, },
347 .n_cts_44k1 = { .n = 9408, .cts = 990000, },
348 .n_cts_48k = { .n = 6144, .cts = 594000, },
349 },
350};
351
352static int drm_hdmi_acr_find_tmds_entry(unsigned long tmds_clock_khz)
353{
354 int i;
355
356 /* skip the "other" entry */
357 for (i = 1; i < ARRAY_SIZE(hdmi_acr_n_cts); i++) {
358 if (hdmi_acr_n_cts[i].tmds_clock_khz == tmds_clock_khz)
359 return i;
360 }
361
362 return 0;
363}
364
365/**
366 * drm_hdmi_acr_get_n_cts() - get N and CTS values for Audio Clock Regeneration
367 *
368 * @tmds_char_rate: TMDS clock (char rate) as used by the HDMI connector
369 * @sample_rate: audio sample rate
370 * @out_n: a pointer to write the N value
371 * @out_cts: a pointer to write the CTS value
372 *
373 * Get the N and CTS values (either by calculating them or by returning data
374 * from the tables. This follows the HDMI 1.4b Section 7.2 "Audio Sample Clock
375 * Capture and Regeneration".
376 *
377 * Note, @sample_rate corresponds to the Fs value, see sections 7.2.4 - 7.2.6
378 * on how to select Fs for non-L-PCM formats.
379 */
380void
381drm_hdmi_acr_get_n_cts(unsigned long long tmds_char_rate,
382 unsigned int sample_rate,
383 unsigned int *out_n,
384 unsigned int *out_cts)
385{
386 /* be a bit more tolerant, especially for the 1.001 entries */
387 unsigned long tmds_clock_khz = DIV_ROUND_CLOSEST_ULL(tmds_char_rate, 1000);
388 const struct drm_hdmi_acr_n_cts_entry *entry;
389 unsigned int n, cts, mult;
390 int tmds_idx;
391
392 tmds_idx = drm_hdmi_acr_find_tmds_entry(tmds_clock_khz);
393
394 /*
395 * Don't change the order, 192 kHz is divisible by 48k and 32k, but it
396 * should use 48k entry.
397 */
398 if (sample_rate % 48000 == 0) {
399 entry = &hdmi_acr_n_cts[tmds_idx].n_cts_48k;
400 mult = sample_rate / 48000;
401 } else if (sample_rate % 44100 == 0) {
402 entry = &hdmi_acr_n_cts[tmds_idx].n_cts_44k1;
403 mult = sample_rate / 44100;
404 } else if (sample_rate % 32000 == 0) {
405 entry = &hdmi_acr_n_cts[tmds_idx].n_cts_32k;
406 mult = sample_rate / 32000;
407 } else {
408 entry = NULL;
409 }
410
411 if (entry) {
412 n = entry->n * mult;
413 cts = entry->cts;
414 } else {
415 /* Recommended optimal value, HDMI 1.4b, Section 7.2.1 */
416 n = 128 * sample_rate / 1000;
417 cts = 0;
418 }
419
420 if (!cts)
421 cts = DIV_ROUND_CLOSEST_ULL(tmds_char_rate * n,
422 128 * sample_rate);
423
424 *out_n = n;
425 *out_cts = cts;
426}
427EXPORT_SYMBOL(drm_hdmi_acr_get_n_cts);
428