| 1 | // SPDX-License-Identifier: MIT | 
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| 2 | /* | 
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| 3 | * Copyright © 2019 Intel Corporation | 
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| 4 | */ | 
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| 5 |  | 
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| 6 | #include "gem/i915_gem_context.h" | 
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| 7 | #include "gem/i915_gem_pm.h" | 
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| 8 |  | 
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| 9 | #include "i915_drm_client.h" | 
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| 10 | #include "i915_drv.h" | 
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| 11 | #include "i915_trace.h" | 
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| 12 |  | 
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| 13 | #include "intel_context.h" | 
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| 14 | #include "intel_engine.h" | 
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| 15 | #include "intel_engine_pm.h" | 
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| 16 | #include "intel_ring.h" | 
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| 17 |  | 
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| 18 | static struct kmem_cache *slab_ce; | 
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| 19 |  | 
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| 20 | static struct intel_context *intel_context_alloc(void) | 
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| 21 | { | 
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| 22 | return kmem_cache_zalloc(slab_ce, GFP_KERNEL); | 
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| 23 | } | 
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| 24 |  | 
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| 25 | static void rcu_context_free(struct rcu_head *rcu) | 
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| 26 | { | 
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| 27 | struct intel_context *ce = container_of(rcu, typeof(*ce), rcu); | 
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| 28 |  | 
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| 29 | trace_intel_context_free(ce); | 
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| 30 | if (intel_context_has_own_state(ce)) | 
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| 31 | fput(ce->default_state); | 
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| 32 | kmem_cache_free(s: slab_ce, objp: ce); | 
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| 33 | } | 
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| 34 |  | 
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| 35 | void intel_context_free(struct intel_context *ce) | 
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| 36 | { | 
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| 37 | call_rcu(head: &ce->rcu, func: rcu_context_free); | 
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| 38 | } | 
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| 39 |  | 
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| 40 | struct intel_context * | 
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| 41 | intel_context_create(struct intel_engine_cs *engine) | 
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| 42 | { | 
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| 43 | struct intel_context *ce; | 
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| 44 |  | 
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| 45 | ce = intel_context_alloc(); | 
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| 46 | if (!ce) | 
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| 47 | return ERR_PTR(error: -ENOMEM); | 
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| 48 |  | 
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| 49 | intel_context_init(ce, engine); | 
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| 50 | trace_intel_context_create(ce); | 
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| 51 | return ce; | 
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| 52 | } | 
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| 53 |  | 
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| 54 | int intel_context_alloc_state(struct intel_context *ce) | 
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| 55 | { | 
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| 56 | struct i915_gem_context *ctx; | 
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| 57 | int err = 0; | 
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| 58 |  | 
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| 59 | if (mutex_lock_interruptible(lock: &ce->pin_mutex)) | 
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| 60 | return -EINTR; | 
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| 61 |  | 
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| 62 | if (!test_bit(CONTEXT_ALLOC_BIT, &ce->flags)) { | 
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| 63 | if (intel_context_is_banned(ce)) { | 
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| 64 | err = -EIO; | 
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| 65 | goto unlock; | 
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| 66 | } | 
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| 67 |  | 
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| 68 | err = ce->ops->alloc(ce); | 
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| 69 | if (unlikely(err)) | 
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| 70 | goto unlock; | 
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| 71 |  | 
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| 72 | set_bit(CONTEXT_ALLOC_BIT, addr: &ce->flags); | 
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| 73 |  | 
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| 74 | rcu_read_lock(); | 
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| 75 | ctx = rcu_dereference(ce->gem_context); | 
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| 76 | if (ctx && !kref_get_unless_zero(kref: &ctx->ref)) | 
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| 77 | ctx = NULL; | 
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| 78 | rcu_read_unlock(); | 
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| 79 | if (ctx) { | 
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| 80 | if (ctx->client) | 
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| 81 | i915_drm_client_add_context_objects(client: ctx->client, | 
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| 82 | ce); | 
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| 83 | i915_gem_context_put(ctx); | 
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| 84 | } | 
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| 85 | } | 
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| 86 |  | 
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| 87 | unlock: | 
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| 88 | mutex_unlock(lock: &ce->pin_mutex); | 
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| 89 | return err; | 
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| 90 | } | 
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| 91 |  | 
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| 92 | static int intel_context_active_acquire(struct intel_context *ce) | 
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| 93 | { | 
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| 94 | int err; | 
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| 95 |  | 
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| 96 | __i915_active_acquire(ref: &ce->active); | 
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| 97 |  | 
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| 98 | if (intel_context_is_barrier(ce) || intel_engine_uses_guc(engine: ce->engine) || | 
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| 99 | intel_context_is_parallel(ce)) | 
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| 100 | return 0; | 
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| 101 |  | 
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| 102 | /* Preallocate tracking nodes */ | 
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| 103 | err = i915_active_acquire_preallocate_barrier(ref: &ce->active, | 
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| 104 | engine: ce->engine); | 
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| 105 | if (err) | 
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| 106 | i915_active_release(ref: &ce->active); | 
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| 107 |  | 
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| 108 | return err; | 
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| 109 | } | 
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| 110 |  | 
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| 111 | static void intel_context_active_release(struct intel_context *ce) | 
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| 112 | { | 
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| 113 | /* Nodes preallocated in intel_context_active() */ | 
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| 114 | i915_active_acquire_barrier(ref: &ce->active); | 
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| 115 | i915_active_release(ref: &ce->active); | 
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| 116 | } | 
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| 117 |  | 
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| 118 | static int __context_pin_state(struct i915_vma *vma, struct i915_gem_ww_ctx *ww) | 
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| 119 | { | 
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| 120 | unsigned int bias = i915_ggtt_pin_bias(vma) | PIN_OFFSET_BIAS; | 
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| 121 | int err; | 
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| 122 |  | 
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| 123 | err = i915_ggtt_pin(vma, ww, align: 0, flags: bias | PIN_HIGH); | 
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| 124 | if (err) | 
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| 125 | return err; | 
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| 126 |  | 
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| 127 | err = i915_active_acquire(ref: &vma->active); | 
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| 128 | if (err) | 
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| 129 | goto err_unpin; | 
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| 130 |  | 
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| 131 | /* | 
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| 132 | * And mark it as a globally pinned object to let the shrinker know | 
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| 133 | * it cannot reclaim the object until we release it. | 
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| 134 | */ | 
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| 135 | i915_vma_make_unshrinkable(vma); | 
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| 136 | vma->obj->mm.dirty = true; | 
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| 137 |  | 
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| 138 | return 0; | 
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| 139 |  | 
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| 140 | err_unpin: | 
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| 141 | i915_vma_unpin(vma); | 
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| 142 | return err; | 
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| 143 | } | 
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| 144 |  | 
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| 145 | static void __context_unpin_state(struct i915_vma *vma) | 
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| 146 | { | 
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| 147 | i915_vma_make_shrinkable(vma); | 
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| 148 | i915_active_release(ref: &vma->active); | 
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| 149 | __i915_vma_unpin(vma); | 
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| 150 | } | 
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| 151 |  | 
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| 152 | static int __ring_active(struct intel_ring *ring, | 
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| 153 | struct i915_gem_ww_ctx *ww) | 
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| 154 | { | 
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| 155 | int err; | 
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| 156 |  | 
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| 157 | err = intel_ring_pin(ring, ww); | 
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| 158 | if (err) | 
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| 159 | return err; | 
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| 160 |  | 
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| 161 | err = i915_active_acquire(ref: &ring->vma->active); | 
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| 162 | if (err) | 
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| 163 | goto err_pin; | 
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| 164 |  | 
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| 165 | return 0; | 
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| 166 |  | 
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| 167 | err_pin: | 
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| 168 | intel_ring_unpin(ring); | 
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| 169 | return err; | 
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| 170 | } | 
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| 171 |  | 
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| 172 | static void __ring_retire(struct intel_ring *ring) | 
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| 173 | { | 
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| 174 | i915_active_release(ref: &ring->vma->active); | 
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| 175 | intel_ring_unpin(ring); | 
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| 176 | } | 
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| 177 |  | 
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| 178 | static int intel_context_pre_pin(struct intel_context *ce, | 
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| 179 | struct i915_gem_ww_ctx *ww) | 
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| 180 | { | 
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| 181 | int err; | 
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| 182 |  | 
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| 183 | CE_TRACE(ce, "active\n"); | 
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| 184 |  | 
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| 185 | err = __ring_active(ring: ce->ring, ww); | 
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| 186 | if (err) | 
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| 187 | return err; | 
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| 188 |  | 
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| 189 | err = intel_timeline_pin(tl: ce->timeline, ww); | 
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| 190 | if (err) | 
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| 191 | goto err_ring; | 
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| 192 |  | 
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| 193 | if (!ce->state) | 
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| 194 | return 0; | 
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| 195 |  | 
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| 196 | err = __context_pin_state(vma: ce->state, ww); | 
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| 197 | if (err) | 
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| 198 | goto err_timeline; | 
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| 199 |  | 
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| 200 |  | 
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| 201 | return 0; | 
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| 202 |  | 
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| 203 | err_timeline: | 
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| 204 | intel_timeline_unpin(tl: ce->timeline); | 
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| 205 | err_ring: | 
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| 206 | __ring_retire(ring: ce->ring); | 
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| 207 | return err; | 
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| 208 | } | 
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| 209 |  | 
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| 210 | static void intel_context_post_unpin(struct intel_context *ce) | 
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| 211 | { | 
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| 212 | if (ce->state) | 
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| 213 | __context_unpin_state(vma: ce->state); | 
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| 214 |  | 
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| 215 | intel_timeline_unpin(tl: ce->timeline); | 
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| 216 | __ring_retire(ring: ce->ring); | 
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| 217 | } | 
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| 218 |  | 
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| 219 | int __intel_context_do_pin_ww(struct intel_context *ce, | 
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| 220 | struct i915_gem_ww_ctx *ww) | 
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| 221 | { | 
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| 222 | bool handoff = false; | 
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| 223 | void *vaddr; | 
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| 224 | int err = 0; | 
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| 225 |  | 
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| 226 | if (unlikely(!test_bit(CONTEXT_ALLOC_BIT, &ce->flags))) { | 
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| 227 | err = intel_context_alloc_state(ce); | 
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| 228 | if (err) | 
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| 229 | return err; | 
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| 230 | } | 
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| 231 |  | 
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| 232 | /* | 
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| 233 | * We always pin the context/ring/timeline here, to ensure a pin | 
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| 234 | * refcount for __intel_context_active(), which prevent a lock | 
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| 235 | * inversion of ce->pin_mutex vs dma_resv_lock(). | 
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| 236 | */ | 
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| 237 |  | 
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| 238 | err = i915_gem_object_lock(obj: ce->timeline->hwsp_ggtt->obj, ww); | 
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| 239 | if (!err) | 
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| 240 | err = i915_gem_object_lock(obj: ce->ring->vma->obj, ww); | 
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| 241 | if (!err && ce->state) | 
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| 242 | err = i915_gem_object_lock(obj: ce->state->obj, ww); | 
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| 243 | if (!err) | 
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| 244 | err = intel_context_pre_pin(ce, ww); | 
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| 245 | if (err) | 
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| 246 | return err; | 
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| 247 |  | 
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| 248 | err = ce->ops->pre_pin(ce, ww, &vaddr); | 
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| 249 | if (err) | 
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| 250 | goto err_ctx_unpin; | 
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| 251 |  | 
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| 252 | err = i915_active_acquire(ref: &ce->active); | 
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| 253 | if (err) | 
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| 254 | goto err_post_unpin; | 
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| 255 |  | 
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| 256 | err = mutex_lock_interruptible(lock: &ce->pin_mutex); | 
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| 257 | if (err) | 
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| 258 | goto err_release; | 
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| 259 |  | 
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| 260 | intel_engine_pm_might_get(engine: ce->engine); | 
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| 261 |  | 
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| 262 | if (unlikely(intel_context_is_closed(ce))) { | 
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| 263 | err = -ENOENT; | 
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| 264 | goto err_unlock; | 
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| 265 | } | 
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| 266 |  | 
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| 267 | if (likely(!atomic_add_unless(&ce->pin_count, 1, 0))) { | 
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| 268 | err = intel_context_active_acquire(ce); | 
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| 269 | if (unlikely(err)) | 
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| 270 | goto err_unlock; | 
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| 271 |  | 
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| 272 | err = ce->ops->pin(ce, vaddr); | 
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| 273 | if (err) { | 
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| 274 | intel_context_active_release(ce); | 
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| 275 | goto err_unlock; | 
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| 276 | } | 
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| 277 |  | 
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| 278 | CE_TRACE(ce, "pin ring:{start:%08x, head:%04x, tail:%04x}\n", | 
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| 279 | i915_ggtt_offset(ce->ring->vma), | 
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| 280 | ce->ring->head, ce->ring->tail); | 
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| 281 |  | 
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| 282 | handoff = true; | 
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| 283 | smp_mb__before_atomic(); /* flush pin before it is visible */ | 
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| 284 | atomic_inc(v: &ce->pin_count); | 
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| 285 | } | 
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| 286 |  | 
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| 287 | GEM_BUG_ON(!intel_context_is_pinned(ce)); /* no overflow! */ | 
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| 288 |  | 
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| 289 | trace_intel_context_do_pin(ce); | 
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| 290 |  | 
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| 291 | err_unlock: | 
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| 292 | mutex_unlock(lock: &ce->pin_mutex); | 
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| 293 | err_release: | 
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| 294 | i915_active_release(ref: &ce->active); | 
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| 295 | err_post_unpin: | 
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| 296 | if (!handoff) | 
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| 297 | ce->ops->post_unpin(ce); | 
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| 298 | err_ctx_unpin: | 
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| 299 | intel_context_post_unpin(ce); | 
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| 300 |  | 
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| 301 | /* | 
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| 302 | * Unlock the hwsp_ggtt object since it's shared. | 
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| 303 | * In principle we can unlock all the global state locked above | 
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| 304 | * since it's pinned and doesn't need fencing, and will | 
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| 305 | * thus remain resident until it is explicitly unpinned. | 
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| 306 | */ | 
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| 307 | i915_gem_ww_unlock_single(obj: ce->timeline->hwsp_ggtt->obj); | 
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| 308 |  | 
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| 309 | return err; | 
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| 310 | } | 
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| 311 |  | 
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| 312 | int __intel_context_do_pin(struct intel_context *ce) | 
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| 313 | { | 
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| 314 | struct i915_gem_ww_ctx ww; | 
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| 315 | int err; | 
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| 316 |  | 
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| 317 | i915_gem_ww_ctx_init(ctx: &ww, intr: true); | 
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| 318 | retry: | 
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| 319 | err = __intel_context_do_pin_ww(ce, ww: &ww); | 
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| 320 | if (err == -EDEADLK) { | 
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| 321 | err = i915_gem_ww_ctx_backoff(ctx: &ww); | 
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| 322 | if (!err) | 
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| 323 | goto retry; | 
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| 324 | } | 
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| 325 | i915_gem_ww_ctx_fini(ctx: &ww); | 
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| 326 | return err; | 
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| 327 | } | 
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| 328 |  | 
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| 329 | void __intel_context_do_unpin(struct intel_context *ce, int sub) | 
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| 330 | { | 
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| 331 | if (!atomic_sub_and_test(i: sub, v: &ce->pin_count)) | 
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| 332 | return; | 
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| 333 |  | 
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| 334 | CE_TRACE(ce, "unpin\n"); | 
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| 335 | ce->ops->unpin(ce); | 
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| 336 | ce->ops->post_unpin(ce); | 
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| 337 |  | 
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| 338 | /* | 
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| 339 | * Once released, we may asynchronously drop the active reference. | 
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| 340 | * As that may be the only reference keeping the context alive, | 
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| 341 | * take an extra now so that it is not freed before we finish | 
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| 342 | * dereferencing it. | 
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| 343 | */ | 
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| 344 | intel_context_get(ce); | 
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| 345 | intel_context_active_release(ce); | 
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| 346 | trace_intel_context_do_unpin(ce); | 
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| 347 | intel_context_put(ce); | 
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| 348 | } | 
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| 349 |  | 
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| 350 | static void __intel_context_retire(struct i915_active *active) | 
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| 351 | { | 
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| 352 | struct intel_context *ce = container_of(active, typeof(*ce), active); | 
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| 353 |  | 
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| 354 | CE_TRACE(ce, "retire runtime: { total:%lluns, avg:%lluns }\n", | 
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| 355 | intel_context_get_total_runtime_ns(ce), | 
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| 356 | intel_context_get_avg_runtime_ns(ce)); | 
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| 357 |  | 
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| 358 | set_bit(CONTEXT_VALID_BIT, addr: &ce->flags); | 
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| 359 | intel_context_post_unpin(ce); | 
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| 360 | intel_context_put(ce); | 
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| 361 | } | 
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| 362 |  | 
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| 363 | static int __intel_context_active(struct i915_active *active) | 
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| 364 | { | 
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| 365 | struct intel_context *ce = container_of(active, typeof(*ce), active); | 
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| 366 |  | 
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| 367 | intel_context_get(ce); | 
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| 368 |  | 
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| 369 | /* everything should already be activated by intel_context_pre_pin() */ | 
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| 370 | GEM_WARN_ON(!i915_active_acquire_if_busy(&ce->ring->vma->active)); | 
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| 371 | __intel_ring_pin(ring: ce->ring); | 
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| 372 |  | 
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| 373 | __intel_timeline_pin(tl: ce->timeline); | 
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| 374 |  | 
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| 375 | if (ce->state) { | 
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| 376 | GEM_WARN_ON(!i915_active_acquire_if_busy(&ce->state->active)); | 
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| 377 | __i915_vma_pin(vma: ce->state); | 
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| 378 | i915_vma_make_unshrinkable(vma: ce->state); | 
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| 379 | } | 
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| 380 |  | 
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| 381 | return 0; | 
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| 382 | } | 
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| 383 |  | 
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| 384 | static int | 
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| 385 | sw_fence_dummy_notify(struct i915_sw_fence *sf, | 
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| 386 | enum i915_sw_fence_notify state) | 
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| 387 | { | 
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| 388 | return NOTIFY_DONE; | 
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| 389 | } | 
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| 390 |  | 
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| 391 | void | 
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| 392 | intel_context_init(struct intel_context *ce, struct intel_engine_cs *engine) | 
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| 393 | { | 
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| 394 | GEM_BUG_ON(!engine->cops); | 
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| 395 | GEM_BUG_ON(!engine->gt->vm); | 
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| 396 |  | 
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| 397 | kref_init(kref: &ce->ref); | 
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| 398 |  | 
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| 399 | ce->engine = engine; | 
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| 400 | ce->ops = engine->cops; | 
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| 401 | ce->sseu = engine->sseu; | 
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| 402 | ce->ring = NULL; | 
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| 403 | ce->ring_size = SZ_4K; | 
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| 404 |  | 
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| 405 | ewma_runtime_init(e: &ce->stats.runtime.avg); | 
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| 406 |  | 
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| 407 | ce->vm = i915_vm_get(vm: engine->gt->vm); | 
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| 408 |  | 
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| 409 | /* NB ce->signal_link/lock is used under RCU */ | 
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| 410 | spin_lock_init(&ce->signal_lock); | 
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| 411 | INIT_LIST_HEAD(list: &ce->signals); | 
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| 412 |  | 
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| 413 | mutex_init(&ce->pin_mutex); | 
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| 414 |  | 
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| 415 | spin_lock_init(&ce->guc_state.lock); | 
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| 416 | INIT_LIST_HEAD(list: &ce->guc_state.fences); | 
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| 417 | INIT_LIST_HEAD(list: &ce->guc_state.requests); | 
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| 418 |  | 
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| 419 | ce->guc_id.id = GUC_INVALID_CONTEXT_ID; | 
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| 420 | INIT_LIST_HEAD(list: &ce->guc_id.link); | 
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| 421 |  | 
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| 422 | INIT_LIST_HEAD(list: &ce->destroyed_link); | 
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| 423 |  | 
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| 424 | INIT_LIST_HEAD(list: &ce->parallel.child_list); | 
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| 425 |  | 
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| 426 | /* | 
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| 427 | * Initialize fence to be complete as this is expected to be complete | 
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| 428 | * unless there is a pending schedule disable outstanding. | 
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| 429 | */ | 
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| 430 | i915_sw_fence_init(&ce->guc_state.blocked, | 
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| 431 | sw_fence_dummy_notify); | 
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| 432 | i915_sw_fence_commit(fence: &ce->guc_state.blocked); | 
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| 433 |  | 
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| 434 | i915_active_init(&ce->active, | 
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| 435 | __intel_context_active, __intel_context_retire, 0); | 
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| 436 | } | 
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| 437 |  | 
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| 438 | void intel_context_fini(struct intel_context *ce) | 
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| 439 | { | 
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| 440 | struct intel_context *child, *next; | 
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| 441 |  | 
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| 442 | if (ce->timeline) | 
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| 443 | intel_timeline_put(timeline: ce->timeline); | 
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| 444 | i915_vm_put(vm: ce->vm); | 
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| 445 |  | 
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| 446 | /* Need to put the creation ref for the children */ | 
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| 447 | if (intel_context_is_parent(ce)) | 
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| 448 | for_each_child_safe(ce, child, next) | 
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| 449 | intel_context_put(ce: child); | 
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| 450 |  | 
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| 451 | mutex_destroy(lock: &ce->pin_mutex); | 
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| 452 | i915_active_fini(ref: &ce->active); | 
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| 453 | i915_sw_fence_fini(fence: &ce->guc_state.blocked); | 
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| 454 | } | 
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| 455 |  | 
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| 456 | void i915_context_module_exit(void) | 
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| 457 | { | 
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| 458 | kmem_cache_destroy(s: slab_ce); | 
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| 459 | } | 
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| 460 |  | 
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| 461 | int __init i915_context_module_init(void) | 
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| 462 | { | 
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| 463 | slab_ce = KMEM_CACHE(intel_context, SLAB_HWCACHE_ALIGN); | 
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| 464 | if (!slab_ce) | 
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| 465 | return -ENOMEM; | 
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| 466 |  | 
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| 467 | return 0; | 
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| 468 | } | 
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| 469 |  | 
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| 470 | void intel_context_enter_engine(struct intel_context *ce) | 
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| 471 | { | 
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| 472 | intel_engine_pm_get(engine: ce->engine); | 
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| 473 | intel_timeline_enter(tl: ce->timeline); | 
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| 474 | } | 
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| 475 |  | 
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| 476 | void intel_context_exit_engine(struct intel_context *ce) | 
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| 477 | { | 
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| 478 | intel_timeline_exit(tl: ce->timeline); | 
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| 479 | intel_engine_pm_put(engine: ce->engine); | 
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| 480 | } | 
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| 481 |  | 
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| 482 | int intel_context_prepare_remote_request(struct intel_context *ce, | 
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| 483 | struct i915_request *rq) | 
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| 484 | { | 
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| 485 | struct intel_timeline *tl = ce->timeline; | 
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| 486 | int err; | 
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| 487 |  | 
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| 488 | /* Only suitable for use in remotely modifying this context */ | 
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| 489 | GEM_BUG_ON(rq->context == ce); | 
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| 490 |  | 
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| 491 | if (rcu_access_pointer(rq->timeline) != tl) { /* timeline sharing! */ | 
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| 492 | /* Queue this switch after current activity by this context. */ | 
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| 493 | err = i915_active_fence_set(active: &tl->last_request, rq); | 
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| 494 | if (err) | 
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| 495 | return err; | 
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| 496 | } | 
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| 497 |  | 
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| 498 | /* | 
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| 499 | * Guarantee context image and the timeline remains pinned until the | 
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| 500 | * modifying request is retired by setting the ce activity tracker. | 
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| 501 | * | 
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| 502 | * But we only need to take one pin on the account of it. Or in other | 
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| 503 | * words transfer the pinned ce object to tracked active request. | 
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| 504 | */ | 
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| 505 | GEM_BUG_ON(i915_active_is_idle(&ce->active)); | 
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| 506 | return i915_active_add_request(ref: &ce->active, rq); | 
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| 507 | } | 
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| 508 |  | 
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| 509 | struct i915_request *intel_context_create_request(struct intel_context *ce) | 
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| 510 | { | 
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| 511 | struct i915_gem_ww_ctx ww; | 
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| 512 | struct i915_request *rq; | 
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| 513 | int err; | 
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| 514 |  | 
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| 515 | i915_gem_ww_ctx_init(ctx: &ww, intr: true); | 
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| 516 | retry: | 
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| 517 | err = intel_context_pin_ww(ce, ww: &ww); | 
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| 518 | if (!err) { | 
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| 519 | rq = i915_request_create(ce); | 
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| 520 | intel_context_unpin(ce); | 
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| 521 | } else if (err == -EDEADLK) { | 
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| 522 | err = i915_gem_ww_ctx_backoff(ctx: &ww); | 
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| 523 | if (!err) | 
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| 524 | goto retry; | 
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| 525 | rq = ERR_PTR(error: err); | 
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| 526 | } else { | 
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| 527 | rq = ERR_PTR(error: err); | 
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| 528 | } | 
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| 529 |  | 
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| 530 | i915_gem_ww_ctx_fini(ctx: &ww); | 
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| 531 |  | 
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| 532 | if (IS_ERR(ptr: rq)) | 
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| 533 | return rq; | 
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| 534 |  | 
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| 535 | /* | 
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| 536 | * timeline->mutex should be the inner lock, but is used as outer lock. | 
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| 537 | * Hack around this to shut up lockdep in selftests.. | 
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| 538 | */ | 
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| 539 | lockdep_unpin_lock(&ce->timeline->mutex, rq->cookie); | 
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| 540 | mutex_release(&ce->timeline->mutex.dep_map, _RET_IP_); | 
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| 541 | mutex_acquire(&ce->timeline->mutex.dep_map, SINGLE_DEPTH_NESTING, 0, _RET_IP_); | 
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| 542 | rq->cookie = lockdep_pin_lock(&ce->timeline->mutex); | 
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| 543 |  | 
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| 544 | return rq; | 
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| 545 | } | 
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| 546 |  | 
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| 547 | struct i915_request *intel_context_get_active_request(struct intel_context *ce) | 
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| 548 | { | 
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| 549 | struct intel_context *parent = intel_context_to_parent(ce); | 
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| 550 | struct i915_request *rq, *active = NULL; | 
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| 551 | unsigned long flags; | 
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| 552 |  | 
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| 553 | GEM_BUG_ON(!intel_engine_uses_guc(ce->engine)); | 
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| 554 |  | 
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| 555 | /* | 
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| 556 | * We search the parent list to find an active request on the submitted | 
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| 557 | * context. The parent list contains the requests for all the contexts | 
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| 558 | * in the relationship so we have to do a compare of each request's | 
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| 559 | * context. | 
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| 560 | */ | 
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| 561 | spin_lock_irqsave(&parent->guc_state.lock, flags); | 
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| 562 | list_for_each_entry_reverse(rq, &parent->guc_state.requests, | 
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| 563 | sched.link) { | 
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| 564 | if (rq->context != ce) | 
|---|
| 565 | continue; | 
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| 566 | if (i915_request_completed(rq)) | 
|---|
| 567 | break; | 
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| 568 |  | 
|---|
| 569 | active = rq; | 
|---|
| 570 | } | 
|---|
| 571 | if (active) | 
|---|
| 572 | active = i915_request_get_rcu(rq: active); | 
|---|
| 573 | spin_unlock_irqrestore(lock: &parent->guc_state.lock, flags); | 
|---|
| 574 |  | 
|---|
| 575 | return active; | 
|---|
| 576 | } | 
|---|
| 577 |  | 
|---|
| 578 | void intel_context_bind_parent_child(struct intel_context *parent, | 
|---|
| 579 | struct intel_context *child) | 
|---|
| 580 | { | 
|---|
| 581 | /* | 
|---|
| 582 | * Callers responsibility to validate that this function is used | 
|---|
| 583 | * correctly but we use GEM_BUG_ON here ensure that they do. | 
|---|
| 584 | */ | 
|---|
| 585 | GEM_BUG_ON(intel_context_is_pinned(parent)); | 
|---|
| 586 | GEM_BUG_ON(intel_context_is_child(parent)); | 
|---|
| 587 | GEM_BUG_ON(intel_context_is_pinned(child)); | 
|---|
| 588 | GEM_BUG_ON(intel_context_is_child(child)); | 
|---|
| 589 | GEM_BUG_ON(intel_context_is_parent(child)); | 
|---|
| 590 |  | 
|---|
| 591 | parent->parallel.child_index = parent->parallel.number_children++; | 
|---|
| 592 | list_add_tail(new: &child->parallel.child_link, | 
|---|
| 593 | head: &parent->parallel.child_list); | 
|---|
| 594 | child->parallel.parent = parent; | 
|---|
| 595 | } | 
|---|
| 596 |  | 
|---|
| 597 | u64 intel_context_get_total_runtime_ns(struct intel_context *ce) | 
|---|
| 598 | { | 
|---|
| 599 | u64 total, active; | 
|---|
| 600 |  | 
|---|
| 601 | if (ce->ops->update_stats) | 
|---|
| 602 | ce->ops->update_stats(ce); | 
|---|
| 603 |  | 
|---|
| 604 | total = ce->stats.runtime.total; | 
|---|
| 605 | if (ce->ops->flags & COPS_RUNTIME_CYCLES) | 
|---|
| 606 | total *= ce->engine->gt->clock_period_ns; | 
|---|
| 607 |  | 
|---|
| 608 | active = READ_ONCE(ce->stats.active); | 
|---|
| 609 | if (active) | 
|---|
| 610 | active = intel_context_clock() - active; | 
|---|
| 611 |  | 
|---|
| 612 | return total + active; | 
|---|
| 613 | } | 
|---|
| 614 |  | 
|---|
| 615 | u64 intel_context_get_avg_runtime_ns(struct intel_context *ce) | 
|---|
| 616 | { | 
|---|
| 617 | u64 avg = ewma_runtime_read(e: &ce->stats.runtime.avg); | 
|---|
| 618 |  | 
|---|
| 619 | if (ce->ops->flags & COPS_RUNTIME_CYCLES) | 
|---|
| 620 | avg *= ce->engine->gt->clock_period_ns; | 
|---|
| 621 |  | 
|---|
| 622 | return avg; | 
|---|
| 623 | } | 
|---|
| 624 |  | 
|---|
| 625 | bool intel_context_ban(struct intel_context *ce, struct i915_request *rq) | 
|---|
| 626 | { | 
|---|
| 627 | bool ret = intel_context_set_banned(ce); | 
|---|
| 628 |  | 
|---|
| 629 | trace_intel_context_ban(ce); | 
|---|
| 630 |  | 
|---|
| 631 | if (ce->ops->revoke) | 
|---|
| 632 | ce->ops->revoke(ce, rq, | 
|---|
| 633 | INTEL_CONTEXT_BANNED_PREEMPT_TIMEOUT_MS); | 
|---|
| 634 |  | 
|---|
| 635 | return ret; | 
|---|
| 636 | } | 
|---|
| 637 |  | 
|---|
| 638 | bool intel_context_revoke(struct intel_context *ce) | 
|---|
| 639 | { | 
|---|
| 640 | bool ret = intel_context_set_exiting(ce); | 
|---|
| 641 |  | 
|---|
| 642 | if (ce->ops->revoke) | 
|---|
| 643 | ce->ops->revoke(ce, NULL, ce->engine->props.preempt_timeout_ms); | 
|---|
| 644 |  | 
|---|
| 645 | return ret; | 
|---|
| 646 | } | 
|---|
| 647 |  | 
|---|
| 648 | #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST) | 
|---|
| 649 | #include "selftest_context.c" | 
|---|
| 650 | #endif | 
|---|
| 651 |  | 
|---|