| 1 | /* SPDX-License-Identifier: GPL-2.0+ */ | 
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| 2 | /* | 
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| 3 | *  Driver for 8250/16550-type serial ports | 
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| 4 | * | 
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| 5 | *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. | 
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| 6 | * | 
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| 7 | *  Copyright (C) 2001 Russell King. | 
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| 8 | */ | 
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| 9 |  | 
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| 10 | #include <linux/bits.h> | 
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| 11 | #include <linux/serial_8250.h> | 
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| 12 | #include <linux/serial_core.h> | 
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| 13 | #include <linux/dmaengine.h> | 
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| 14 |  | 
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| 15 | #include "../serial_mctrl_gpio.h" | 
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| 16 |  | 
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| 17 | struct uart_8250_dma { | 
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| 18 | int (*tx_dma)(struct uart_8250_port *p); | 
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| 19 | int (*rx_dma)(struct uart_8250_port *p); | 
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| 20 | void (*prepare_tx_dma)(struct uart_8250_port *p); | 
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| 21 | void (*prepare_rx_dma)(struct uart_8250_port *p); | 
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| 22 |  | 
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| 23 | /* Filter function */ | 
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| 24 | dma_filter_fn		fn; | 
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| 25 | /* Parameter to the filter function */ | 
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| 26 | void			*rx_param; | 
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| 27 | void			*tx_param; | 
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| 28 |  | 
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| 29 | struct dma_slave_config	rxconf; | 
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| 30 | struct dma_slave_config	txconf; | 
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| 31 |  | 
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| 32 | struct dma_chan		*rxchan; | 
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| 33 | struct dma_chan		*txchan; | 
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| 34 |  | 
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| 35 | /* Device address base for DMA operations */ | 
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| 36 | phys_addr_t		rx_dma_addr; | 
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| 37 | phys_addr_t		tx_dma_addr; | 
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| 38 |  | 
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| 39 | /* DMA address of the buffer in memory */ | 
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| 40 | dma_addr_t		rx_addr; | 
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| 41 | dma_addr_t		tx_addr; | 
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| 42 |  | 
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| 43 | dma_cookie_t		rx_cookie; | 
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| 44 | dma_cookie_t		tx_cookie; | 
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| 45 |  | 
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| 46 | void			*rx_buf; | 
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| 47 |  | 
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| 48 | size_t			rx_size; | 
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| 49 | size_t			tx_size; | 
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| 50 |  | 
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| 51 | unsigned char		tx_running; | 
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| 52 | unsigned char		tx_err; | 
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| 53 | unsigned char		rx_running; | 
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| 54 | }; | 
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| 55 |  | 
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| 56 | struct old_serial_port { | 
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| 57 | unsigned int uart; | 
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| 58 | unsigned int baud_base; | 
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| 59 | unsigned int port; | 
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| 60 | unsigned int irq; | 
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| 61 | upf_t        flags; | 
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| 62 | unsigned char io_type; | 
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| 63 | unsigned char __iomem *iomem_base; | 
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| 64 | unsigned short iomem_reg_shift; | 
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| 65 | }; | 
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| 66 |  | 
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| 67 | struct serial8250_config { | 
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| 68 | const char	*name; | 
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| 69 | unsigned short	fifo_size; | 
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| 70 | unsigned short	tx_loadsz; | 
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| 71 | unsigned char	fcr; | 
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| 72 | unsigned char	rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE]; | 
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| 73 | unsigned int	flags; | 
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| 74 | }; | 
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| 75 |  | 
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| 76 | #define UART_CAP_FIFO	BIT(8)	/* UART has FIFO */ | 
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| 77 | #define UART_CAP_EFR	BIT(9)	/* UART has EFR */ | 
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| 78 | #define UART_CAP_SLEEP	BIT(10)	/* UART has IER sleep */ | 
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| 79 | #define UART_CAP_AFE	BIT(11)	/* MCR-based hw flow control */ | 
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| 80 | #define UART_CAP_UUE	BIT(12)	/* UART needs IER bit 6 set (Xscale) */ | 
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| 81 | #define UART_CAP_RTOIE	BIT(13)	/* UART needs IER bit 4 set (Xscale, Tegra) */ | 
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| 82 | #define UART_CAP_HFIFO	BIT(14)	/* UART has a "hidden" FIFO */ | 
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| 83 | #define UART_CAP_RPM	BIT(15)	/* Runtime PM is active while idle */ | 
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| 84 | #define UART_CAP_IRDA	BIT(16)	/* UART supports IrDA line discipline */ | 
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| 85 | #define UART_CAP_MINI	BIT(17)	/* Mini UART on BCM283X family lacks: | 
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| 86 | * STOP PARITY EPAR SPAR WLEN5 WLEN6 | 
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| 87 | */ | 
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| 88 | #define UART_CAP_NOTEMT	BIT(18)	/* UART without interrupt on TEMT available */ | 
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| 89 |  | 
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| 90 | #define UART_BUG_QUOT	BIT(0)	/* UART has buggy quot LSB */ | 
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| 91 | #define UART_BUG_TXEN	BIT(1)	/* UART has buggy TX IIR status */ | 
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| 92 | #define UART_BUG_NOMSR	BIT(2)	/* UART has buggy MSR status bits (Au1x00) */ | 
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| 93 | #define UART_BUG_THRE	BIT(3)	/* UART has buggy THRE reassertion */ | 
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| 94 | #define UART_BUG_TXRACE	BIT(5)	/* UART Tx fails to set remote DR */ | 
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| 95 |  | 
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| 96 | /* Module parameters */ | 
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| 97 | #define UART_NR	CONFIG_SERIAL_8250_NR_UARTS | 
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| 98 |  | 
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| 99 | extern unsigned int nr_uarts; | 
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| 100 |  | 
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| 101 | #ifdef CONFIG_SERIAL_8250_SHARE_IRQ | 
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| 102 | #define SERIAL8250_SHARE_IRQS 1 | 
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| 103 | #else | 
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| 104 | #define SERIAL8250_SHARE_IRQS 0 | 
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| 105 | #endif | 
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| 106 |  | 
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| 107 | extern unsigned int share_irqs; | 
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| 108 | extern unsigned int skip_txen_test; | 
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| 109 |  | 
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| 110 | #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags)		\ | 
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| 111 | {							\ | 
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| 112 | .iobase		= _base,			\ | 
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| 113 | .irq		= _irq,				\ | 
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| 114 | .uartclk	= 1843200,			\ | 
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| 115 | .iotype		= UPIO_PORT,			\ | 
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| 116 | .flags		= UPF_BOOT_AUTOCONF | (_flags),	\ | 
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| 117 | } | 
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| 118 |  | 
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| 119 | #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0) | 
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| 120 |  | 
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| 121 | extern struct uart_driver serial8250_reg; | 
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| 122 | void serial8250_register_ports(struct uart_driver *drv, struct device *dev); | 
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| 123 |  | 
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| 124 | /* Legacy ISA bus related APIs */ | 
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| 125 | typedef void (*serial8250_isa_config_fn)(int, struct uart_port *, u32 *); | 
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| 126 | extern serial8250_isa_config_fn serial8250_isa_config; | 
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| 127 |  | 
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| 128 | void serial8250_isa_init_ports(void); | 
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| 129 |  | 
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| 130 | extern struct platform_device *serial8250_isa_devs; | 
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| 131 |  | 
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| 132 | extern const struct uart_ops *univ8250_port_base_ops; | 
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| 133 | extern struct uart_ops univ8250_port_ops; | 
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| 134 |  | 
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| 135 | static inline int serial_in(struct uart_8250_port *up, int offset) | 
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| 136 | { | 
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| 137 | return up->port.serial_in(&up->port, offset); | 
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| 138 | } | 
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| 139 |  | 
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| 140 | static inline void serial_out(struct uart_8250_port *up, int offset, int value) | 
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| 141 | { | 
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| 142 | up->port.serial_out(&up->port, offset, value); | 
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| 143 | } | 
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| 144 |  | 
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| 145 | /** | 
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| 146 | *	serial_lsr_in - Read LSR register and preserve flags across reads | 
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| 147 | *	@up:	uart 8250 port | 
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| 148 | * | 
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| 149 | *	Read LSR register and handle saving non-preserved flags across reads. | 
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| 150 | *	The flags that are not preserved across reads are stored into | 
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| 151 | *	up->lsr_saved_flags. | 
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| 152 | * | 
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| 153 | *	Returns LSR value or'ed with the preserved flags (if any). | 
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| 154 | */ | 
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| 155 | static inline u16 serial_lsr_in(struct uart_8250_port *up) | 
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| 156 | { | 
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| 157 | u16 lsr = up->lsr_saved_flags; | 
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| 158 |  | 
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| 159 | lsr |= serial_in(up, UART_LSR); | 
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| 160 | up->lsr_saved_flags = lsr & up->lsr_save_mask; | 
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| 161 |  | 
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| 162 | return lsr; | 
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| 163 | } | 
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| 164 |  | 
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| 165 | /* | 
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| 166 | * For the 16C950 | 
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| 167 | */ | 
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| 168 | static void serial_icr_write(struct uart_8250_port *up, int offset, int value) | 
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| 169 | { | 
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| 170 | serial_out(up, UART_SCR, value: offset); | 
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| 171 | serial_out(up, UART_ICR, value); | 
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| 172 | } | 
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| 173 |  | 
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| 174 | static unsigned int __maybe_unused serial_icr_read(struct uart_8250_port *up, | 
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| 175 | int offset) | 
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| 176 | { | 
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| 177 | unsigned int value; | 
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| 178 |  | 
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| 179 | serial_icr_write(up, UART_ACR, value: up->acr | UART_ACR_ICRRD); | 
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| 180 | serial_out(up, UART_SCR, value: offset); | 
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| 181 | value = serial_in(up, UART_ICR); | 
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| 182 | serial_icr_write(up, UART_ACR, value: up->acr); | 
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| 183 |  | 
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| 184 | return value; | 
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| 185 | } | 
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| 186 |  | 
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| 187 | void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p); | 
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| 188 |  | 
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| 189 | void serial8250_rpm_get(struct uart_8250_port *p); | 
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| 190 | void serial8250_rpm_put(struct uart_8250_port *p); | 
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| 191 | DEFINE_GUARD(serial8250_rpm, struct uart_8250_port *, | 
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| 192 | serial8250_rpm_get(_T), serial8250_rpm_put(_T)); | 
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| 193 |  | 
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| 194 | static inline u32 serial_dl_read(struct uart_8250_port *up) | 
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| 195 | { | 
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| 196 | return up->dl_read(up); | 
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| 197 | } | 
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| 198 |  | 
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| 199 | static inline void serial_dl_write(struct uart_8250_port *up, u32 value) | 
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| 200 | { | 
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| 201 | up->dl_write(up, value); | 
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| 202 | } | 
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| 203 |  | 
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| 204 | static inline bool serial8250_set_THRI(struct uart_8250_port *up) | 
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| 205 | { | 
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| 206 | /* Port locked to synchronize UART_IER access against the console. */ | 
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| 207 | lockdep_assert_held_once(&up->port.lock); | 
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| 208 |  | 
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| 209 | if (up->ier & UART_IER_THRI) | 
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| 210 | return false; | 
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| 211 | up->ier |= UART_IER_THRI; | 
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| 212 | serial_out(up, UART_IER, value: up->ier); | 
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| 213 | return true; | 
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| 214 | } | 
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| 215 |  | 
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| 216 | static inline bool serial8250_clear_THRI(struct uart_8250_port *up) | 
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| 217 | { | 
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| 218 | /* Port locked to synchronize UART_IER access against the console. */ | 
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| 219 | lockdep_assert_held_once(&up->port.lock); | 
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| 220 |  | 
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| 221 | if (!(up->ier & UART_IER_THRI)) | 
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| 222 | return false; | 
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| 223 | up->ier &= ~UART_IER_THRI; | 
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| 224 | serial_out(up, UART_IER, value: up->ier); | 
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| 225 | return true; | 
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| 226 | } | 
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| 227 |  | 
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| 228 | struct uart_8250_port *serial8250_setup_port(int index); | 
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| 229 | struct uart_8250_port *serial8250_get_port(int line); | 
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| 230 |  | 
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| 231 | int serial8250_em485_config(struct uart_port *port, struct ktermios *termios, | 
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| 232 | struct serial_rs485 *rs485); | 
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| 233 | void serial8250_em485_start_tx(struct uart_8250_port *p, bool toggle_ier); | 
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| 234 | void serial8250_em485_stop_tx(struct uart_8250_port *p, bool toggle_ier); | 
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| 235 | void serial8250_em485_destroy(struct uart_8250_port *p); | 
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| 236 | extern struct serial_rs485 serial8250_em485_supported; | 
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| 237 |  | 
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| 238 | /* MCR <-> TIOCM conversion */ | 
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| 239 | static inline int serial8250_TIOCM_to_MCR(int tiocm) | 
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| 240 | { | 
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| 241 | int mcr = 0; | 
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| 242 |  | 
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| 243 | if (tiocm & TIOCM_RTS) | 
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| 244 | mcr |= UART_MCR_RTS; | 
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| 245 | if (tiocm & TIOCM_DTR) | 
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| 246 | mcr |= UART_MCR_DTR; | 
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| 247 | if (tiocm & TIOCM_OUT1) | 
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| 248 | mcr |= UART_MCR_OUT1; | 
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| 249 | if (tiocm & TIOCM_OUT2) | 
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| 250 | mcr |= UART_MCR_OUT2; | 
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| 251 | if (tiocm & TIOCM_LOOP) | 
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| 252 | mcr |= UART_MCR_LOOP; | 
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| 253 |  | 
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| 254 | return mcr; | 
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| 255 | } | 
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| 256 |  | 
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| 257 | static inline int serial8250_MCR_to_TIOCM(int mcr) | 
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| 258 | { | 
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| 259 | int tiocm = 0; | 
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| 260 |  | 
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| 261 | if (mcr & UART_MCR_RTS) | 
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| 262 | tiocm |= TIOCM_RTS; | 
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| 263 | if (mcr & UART_MCR_DTR) | 
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| 264 | tiocm |= TIOCM_DTR; | 
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| 265 | if (mcr & UART_MCR_OUT1) | 
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| 266 | tiocm |= TIOCM_OUT1; | 
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| 267 | if (mcr & UART_MCR_OUT2) | 
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| 268 | tiocm |= TIOCM_OUT2; | 
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| 269 | if (mcr & UART_MCR_LOOP) | 
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| 270 | tiocm |= TIOCM_LOOP; | 
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| 271 |  | 
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| 272 | return tiocm; | 
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| 273 | } | 
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| 274 |  | 
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| 275 | /* MSR <-> TIOCM conversion */ | 
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| 276 | static inline int serial8250_MSR_to_TIOCM(int msr) | 
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| 277 | { | 
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| 278 | int tiocm = 0; | 
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| 279 |  | 
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| 280 | if (msr & UART_MSR_DCD) | 
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| 281 | tiocm |= TIOCM_CAR; | 
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| 282 | if (msr & UART_MSR_RI) | 
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| 283 | tiocm |= TIOCM_RNG; | 
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| 284 | if (msr & UART_MSR_DSR) | 
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| 285 | tiocm |= TIOCM_DSR; | 
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| 286 | if (msr & UART_MSR_CTS) | 
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| 287 | tiocm |= TIOCM_CTS; | 
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| 288 |  | 
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| 289 | return tiocm; | 
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| 290 | } | 
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| 291 |  | 
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| 292 | static inline void serial8250_out_MCR(struct uart_8250_port *up, int value) | 
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| 293 | { | 
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| 294 | serial_out(up, UART_MCR, value); | 
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| 295 |  | 
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| 296 | if (up->gpios) | 
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| 297 | mctrl_gpio_set(gpios: up->gpios, mctrl: serial8250_MCR_to_TIOCM(mcr: value)); | 
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| 298 | } | 
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| 299 |  | 
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| 300 | static inline int serial8250_in_MCR(struct uart_8250_port *up) | 
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| 301 | { | 
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| 302 | int mctrl; | 
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| 303 |  | 
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| 304 | mctrl = serial_in(up, UART_MCR); | 
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| 305 |  | 
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| 306 | if (up->gpios) { | 
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| 307 | unsigned int mctrl_gpio = 0; | 
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| 308 |  | 
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| 309 | mctrl_gpio = mctrl_gpio_get_outputs(gpios: up->gpios, mctrl: &mctrl_gpio); | 
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| 310 | mctrl |= serial8250_TIOCM_to_MCR(tiocm: mctrl_gpio); | 
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| 311 | } | 
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| 312 |  | 
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| 313 | return mctrl; | 
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| 314 | } | 
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| 315 |  | 
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| 316 | #ifdef CONFIG_SERIAL_8250_PNP | 
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| 317 | int serial8250_pnp_init(void); | 
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| 318 | void serial8250_pnp_exit(void); | 
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| 319 | #else | 
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| 320 | static inline int serial8250_pnp_init(void) { return 0; } | 
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| 321 | static inline void serial8250_pnp_exit(void) { } | 
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| 322 | #endif | 
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| 323 |  | 
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| 324 | #ifdef CONFIG_SERIAL_8250_RSA | 
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| 325 | void univ8250_rsa_support(struct uart_ops *ops); | 
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| 326 | void rsa_enable(struct uart_8250_port *up); | 
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| 327 | void rsa_disable(struct uart_8250_port *up); | 
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| 328 | void rsa_autoconfig(struct uart_8250_port *up); | 
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| 329 | void rsa_reset(struct uart_8250_port *up); | 
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| 330 | #else | 
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| 331 | static inline void univ8250_rsa_support(struct uart_ops *ops) { } | 
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| 332 | static inline void rsa_enable(struct uart_8250_port *up) {} | 
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| 333 | static inline void rsa_disable(struct uart_8250_port *up) {} | 
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| 334 | static inline void rsa_autoconfig(struct uart_8250_port *up) {} | 
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| 335 | static inline void rsa_reset(struct uart_8250_port *up) {} | 
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| 336 | #endif | 
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| 337 |  | 
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| 338 | #ifdef CONFIG_SERIAL_8250_FINTEK | 
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| 339 | int fintek_8250_probe(struct uart_8250_port *uart); | 
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| 340 | #else | 
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| 341 | static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; } | 
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| 342 | #endif | 
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| 343 |  | 
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| 344 | #ifdef CONFIG_ARCH_OMAP1 | 
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| 345 | #include <linux/soc/ti/omap1-soc.h> | 
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| 346 | static inline int is_omap1_8250(struct uart_8250_port *pt) | 
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| 347 | { | 
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| 348 | int res; | 
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| 349 |  | 
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| 350 | switch (pt->port.mapbase) { | 
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| 351 | case OMAP1_UART1_BASE: | 
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| 352 | case OMAP1_UART2_BASE: | 
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| 353 | case OMAP1_UART3_BASE: | 
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| 354 | res = 1; | 
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| 355 | break; | 
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| 356 | default: | 
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| 357 | res = 0; | 
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| 358 | break; | 
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| 359 | } | 
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| 360 |  | 
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| 361 | return res; | 
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| 362 | } | 
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| 363 |  | 
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| 364 | static inline int is_omap1510_8250(struct uart_8250_port *pt) | 
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| 365 | { | 
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| 366 | if (!cpu_is_omap1510()) | 
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| 367 | return 0; | 
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| 368 |  | 
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| 369 | return is_omap1_8250(pt); | 
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| 370 | } | 
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| 371 | #else | 
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| 372 | static inline int is_omap1_8250(struct uart_8250_port *pt) | 
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| 373 | { | 
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| 374 | return 0; | 
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| 375 | } | 
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| 376 | static inline int is_omap1510_8250(struct uart_8250_port *pt) | 
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| 377 | { | 
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| 378 | return 0; | 
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| 379 | } | 
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| 380 | #endif | 
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| 381 |  | 
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| 382 | #ifdef CONFIG_SERIAL_8250_DMA | 
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| 383 | extern int serial8250_tx_dma(struct uart_8250_port *); | 
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| 384 | extern void serial8250_tx_dma_flush(struct uart_8250_port *); | 
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| 385 | extern int serial8250_rx_dma(struct uart_8250_port *); | 
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| 386 | extern void serial8250_rx_dma_flush(struct uart_8250_port *); | 
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| 387 | extern int serial8250_request_dma(struct uart_8250_port *); | 
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| 388 | extern void serial8250_release_dma(struct uart_8250_port *); | 
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| 389 |  | 
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| 390 | static inline void serial8250_do_prepare_tx_dma(struct uart_8250_port *p) | 
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| 391 | { | 
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| 392 | struct uart_8250_dma *dma = p->dma; | 
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| 393 |  | 
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| 394 | if (dma->prepare_tx_dma) | 
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| 395 | dma->prepare_tx_dma(p); | 
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| 396 | } | 
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| 397 |  | 
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| 398 | static inline void serial8250_do_prepare_rx_dma(struct uart_8250_port *p) | 
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| 399 | { | 
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| 400 | struct uart_8250_dma *dma = p->dma; | 
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| 401 |  | 
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| 402 | if (dma->prepare_rx_dma) | 
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| 403 | dma->prepare_rx_dma(p); | 
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| 404 | } | 
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| 405 |  | 
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| 406 | static inline bool serial8250_tx_dma_running(struct uart_8250_port *p) | 
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| 407 | { | 
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| 408 | struct uart_8250_dma *dma = p->dma; | 
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| 409 |  | 
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| 410 | return dma && dma->tx_running; | 
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| 411 | } | 
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| 412 | #else | 
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| 413 | static inline int serial8250_tx_dma(struct uart_8250_port *p) | 
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| 414 | { | 
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| 415 | return -1; | 
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| 416 | } | 
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| 417 | static inline void serial8250_tx_dma_flush(struct uart_8250_port *p) { } | 
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| 418 | static inline int serial8250_rx_dma(struct uart_8250_port *p) | 
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| 419 | { | 
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| 420 | return -1; | 
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| 421 | } | 
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| 422 | static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { } | 
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| 423 | static inline int serial8250_request_dma(struct uart_8250_port *p) | 
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| 424 | { | 
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| 425 | return -1; | 
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| 426 | } | 
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| 427 | static inline void serial8250_release_dma(struct uart_8250_port *p) { } | 
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| 428 |  | 
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| 429 | static inline bool serial8250_tx_dma_running(struct uart_8250_port *p) | 
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| 430 | { | 
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| 431 | return false; | 
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| 432 | } | 
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| 433 | #endif | 
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| 434 |  | 
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| 435 | static inline int ns16550a_goto_highspeed(struct uart_8250_port *up) | 
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| 436 | { | 
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| 437 | unsigned char status; | 
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| 438 |  | 
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| 439 | status = serial_in(up, offset: 0x04); /* EXCR2 */ | 
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| 440 | #define PRESL(x) ((x) & 0x30) | 
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| 441 | if (PRESL(status) == 0x10) { | 
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| 442 | /* already in high speed mode */ | 
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| 443 | return 0; | 
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| 444 | } else { | 
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| 445 | status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */ | 
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| 446 | status |= 0x10;  /* 1.625 divisor for baud_base --> 921600 */ | 
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| 447 | serial_out(up, offset: 0x04, value: status); | 
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| 448 | } | 
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| 449 | return 1; | 
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| 450 | } | 
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| 451 |  | 
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| 452 | static inline int serial_index(struct uart_port *port) | 
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| 453 | { | 
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| 454 | return port->minor - 64; | 
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| 455 | } | 
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| 456 |  | 
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