1/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2/******************************************************************************
3 *
4 * Name: actbl2.h - ACPI Table Definitions
5 *
6 * Copyright (C) 2000 - 2025, Intel Corp.
7 *
8 *****************************************************************************/
9
10#ifndef __ACTBL2_H__
11#define __ACTBL2_H__
12
13/*******************************************************************************
14 *
15 * Additional ACPI Tables (2)
16 *
17 * These tables are not consumed directly by the ACPICA subsystem, but are
18 * included here to support device drivers and the AML disassembler.
19 *
20 ******************************************************************************/
21
22/*
23 * Values for description table header signatures for tables defined in this
24 * file. Useful because they make it more difficult to inadvertently type in
25 * the wrong signature.
26 */
27#define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */
28#define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */
29#define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */
30#define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */
31#define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */
32#define ACPI_SIG_ERDT "ERDT" /* Enhanced Resource Director Technology */
33#define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
34#define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
35#define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
36#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
37#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
38#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
39#define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */
40#define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
41#define ACPI_SIG_MRRM "MRRM" /* Memory Range and Region Mapping table */
42#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
43#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
44#define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */
45#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
46#define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
47#define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */
48#define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
49#define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
50#define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */
51#define ACPI_SIG_RASF "RASF" /* RAS Feature table */
52#define ACPI_SIG_RAS2 "RAS2" /* RAS2 Feature table */
53#define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */
54#define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */
55#define ACPI_SIG_RIMT "RIMT" /* RISC-V IO Mapping Table */
56#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
57#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
58#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
59#define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */
60#define ACPI_SIG_SWFT "SWFT" /* SoundWire File Table */
61#define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */
62
63/*
64 * All tables must be byte-packed to match the ACPI specification, since
65 * the tables are provided by the system BIOS.
66 */
67#pragma pack(1)
68
69/*
70 * Note: C bitfields are not used for this reason:
71 *
72 * "Bitfields are great and easy to read, but unfortunately the C language
73 * does not specify the layout of bitfields in memory, which means they are
74 * essentially useless for dealing with packed data in on-disk formats or
75 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
76 * this decision was a design error in C. Ritchie could have picked an order
77 * and stuck with it." Norman Ramsey.
78 * See http://stackoverflow.com/a/1053662/41661
79 */
80
81/*******************************************************************************
82 *
83 * AEST - Arm Error Source Table
84 *
85 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1(Sep 2020) and
86 * 2.0(May 2023) Platform Design Document.
87 *
88 ******************************************************************************/
89
90struct acpi_table_aest {
91 struct acpi_table_header header;
92};
93
94/* Common Subtable header - one per Node Structure (Subtable) */
95
96struct acpi_aest_hdr {
97 u8 type;
98 u16 length;
99 u8 reserved;
100 u32 node_specific_offset;
101 u32 node_interface_offset;
102 u32 node_interrupt_offset;
103 u32 node_interrupt_count;
104 u64 timestamp_rate;
105 u64 reserved1;
106 u64 error_injection_rate;
107};
108
109/* Values for Type above */
110
111#define ACPI_AEST_PROCESSOR_ERROR_NODE 0
112#define ACPI_AEST_MEMORY_ERROR_NODE 1
113#define ACPI_AEST_SMMU_ERROR_NODE 2
114#define ACPI_AEST_VENDOR_ERROR_NODE 3
115#define ACPI_AEST_GIC_ERROR_NODE 4
116#define ACPI_AEST_PCIE_ERROR_NODE 5
117#define ACPI_AEST_PROXY_ERROR_NODE 6
118#define ACPI_AEST_NODE_TYPE_RESERVED 7 /* 7 and above are reserved */
119
120/*
121 * AEST subtables (Error nodes)
122 */
123
124/* 0: Processor Error */
125
126typedef struct acpi_aest_processor {
127 u32 processor_id;
128 u8 resource_type;
129 u8 reserved;
130 u8 flags;
131 u8 revision;
132 u64 processor_affinity;
133
134} acpi_aest_processor;
135
136/* Values for resource_type above, related structs below */
137
138#define ACPI_AEST_CACHE_RESOURCE 0
139#define ACPI_AEST_TLB_RESOURCE 1
140#define ACPI_AEST_GENERIC_RESOURCE 2
141#define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */
142
143/* 0R: Processor Cache Resource Substructure */
144
145typedef struct acpi_aest_processor_cache {
146 u32 cache_reference;
147 u32 reserved;
148
149} acpi_aest_processor_cache;
150
151/* Values for cache_type above */
152
153#define ACPI_AEST_CACHE_DATA 0
154#define ACPI_AEST_CACHE_INSTRUCTION 1
155#define ACPI_AEST_CACHE_UNIFIED 2
156#define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */
157
158/* 1R: Processor TLB Resource Substructure */
159
160typedef struct acpi_aest_processor_tlb {
161 u32 tlb_level;
162 u32 reserved;
163
164} acpi_aest_processor_tlb;
165
166/* 2R: Processor Generic Resource Substructure */
167
168typedef struct acpi_aest_processor_generic {
169 u32 resource;
170
171} acpi_aest_processor_generic;
172
173/* 1: Memory Error */
174
175typedef struct acpi_aest_memory {
176 u32 srat_proximity_domain;
177
178} acpi_aest_memory;
179
180/* 2: Smmu Error */
181
182typedef struct acpi_aest_smmu {
183 u32 iort_node_reference;
184 u32 subcomponent_reference;
185
186} acpi_aest_smmu;
187
188/* 3: Vendor Defined */
189
190typedef struct acpi_aest_vendor {
191 u32 acpi_hid;
192 u32 acpi_uid;
193 u8 vendor_specific_data[16];
194
195} acpi_aest_vendor;
196
197struct acpi_aest_vendor_v2 {
198 char acpi_hid[8];
199 u32 acpi_uid;
200 u8 vendor_specific_data[16];
201};
202
203/* 4: Gic Error */
204
205typedef struct acpi_aest_gic {
206 u32 interface_type;
207 u32 instance_id;
208
209} acpi_aest_gic;
210
211/* Values for interface_type above */
212
213#define ACPI_AEST_GIC_CPU 0
214#define ACPI_AEST_GIC_DISTRIBUTOR 1
215#define ACPI_AEST_GIC_REDISTRIBUTOR 2
216#define ACPI_AEST_GIC_ITS 3
217#define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */
218
219/* 5: PCIe Error */
220
221struct acpi_aest_pcie {
222 u32 iort_node_reference;
223};
224
225/* 6: Proxy Error */
226
227struct acpi_aest_proxy {
228 u64 node_address;
229};
230
231/* Node Interface Structure */
232
233typedef struct acpi_aest_node_interface {
234 u8 type;
235 u8 reserved[3];
236 u32 flags;
237 u64 address;
238 u32 error_record_index;
239 u32 error_record_count;
240 u64 error_record_implemented;
241 u64 error_status_reporting;
242 u64 addressing_mode;
243
244} acpi_aest_node_interface;
245
246/* Node Interface Structure V2 */
247
248struct acpi_aest_node_interface_header {
249 u8 type;
250 u8 group_format;
251 u8 reserved[2];
252 u32 flags;
253 u64 address;
254 u32 error_record_index;
255 u32 error_record_count;
256};
257
258#define ACPI_AEST_NODE_GROUP_FORMAT_4K 0
259#define ACPI_AEST_NODE_GROUP_FORMAT_16K 1
260#define ACPI_AEST_NODE_GROUP_FORMAT_64K 2
261
262struct acpi_aest_node_interface_common {
263 u32 error_node_device;
264 u32 processor_affinity;
265 u64 error_group_register_base;
266 u64 fault_inject_register_base;
267 u64 interrupt_config_register_base;
268};
269
270struct acpi_aest_node_interface_4k {
271 u64 error_record_implemented;
272 u64 error_status_reporting;
273 u64 addressing_mode;
274 struct acpi_aest_node_interface_common common;
275};
276
277struct acpi_aest_node_interface_16k {
278 u64 error_record_implemented[4];
279 u64 error_status_reporting[4];
280 u64 addressing_mode[4];
281 struct acpi_aest_node_interface_common common;
282};
283
284struct acpi_aest_node_interface_64k {
285 u64 error_record_implemented[14];
286 u64 error_status_reporting[14];
287 u64 addressing_mode[14];
288 struct acpi_aest_node_interface_common common;
289};
290
291/* Values for Type field above */
292
293#define ACPI_AEST_NODE_SYSTEM_REGISTER 0
294#define ACPI_AEST_NODE_MEMORY_MAPPED 1
295#define ACPI_AEST_NODE_SINGLE_RECORD_MEMORY_MAPPED 2
296#define ACPI_AEST_XFACE_RESERVED 3 /* 2 and above are reserved */
297
298/* Node Interrupt Structure */
299
300typedef struct acpi_aest_node_interrupt {
301 u8 type;
302 u8 reserved[2];
303 u8 flags;
304 u32 gsiv;
305 u8 iort_id;
306 u8 reserved1[3];
307
308} acpi_aest_node_interrupt;
309
310/* Node Interrupt Structure V2 */
311
312struct acpi_aest_node_interrupt_v2 {
313 u8 type;
314 u8 reserved[2];
315 u8 flags;
316 u32 gsiv;
317 u8 reserved1[4];
318};
319
320/* Values for Type field above */
321
322#define ACPI_AEST_NODE_FAULT_HANDLING 0
323#define ACPI_AEST_NODE_ERROR_RECOVERY 1
324#define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */
325
326/*******************************************************************************
327 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface
328 *
329 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document"
330 * ARM DEN0093 v1.1
331 *
332 ******************************************************************************/
333struct acpi_table_agdi {
334 struct acpi_table_header header; /* Common ACPI table header */
335 u8 flags;
336 u8 reserved[3];
337 u32 sdei_event;
338 u32 gsiv;
339};
340
341/* Mask for Flags field above */
342
343#define ACPI_AGDI_SIGNALING_MODE (1)
344
345/*******************************************************************************
346 *
347 * APMT - ARM Performance Monitoring Unit Table
348 *
349 * Conforms to:
350 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document
351 * ARM DEN0117 v1.0 November 25, 2021
352 *
353 ******************************************************************************/
354
355struct acpi_table_apmt {
356 struct acpi_table_header header; /* Common ACPI table header */
357};
358
359#define ACPI_APMT_NODE_ID_LENGTH 4
360
361/*
362 * APMT subtables
363 */
364struct acpi_apmt_node {
365 u16 length;
366 u8 flags;
367 u8 type;
368 u32 id;
369 u64 inst_primary;
370 u32 inst_secondary;
371 u64 base_address0;
372 u64 base_address1;
373 u32 ovflw_irq;
374 u32 reserved;
375 u32 ovflw_irq_flags;
376 u32 proc_affinity;
377 u32 impl_id;
378};
379
380/* Masks for Flags field above */
381
382#define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0)
383#define ACPI_APMT_FLAGS_AFFINITY (1<<1)
384#define ACPI_APMT_FLAGS_ATOMIC (1<<2)
385
386/* Values for Flags dual page field above */
387
388#define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0)
389#define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0)
390
391/* Values for Flags processor affinity field above */
392#define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1)
393#define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1)
394
395/* Values for Flags 64-bit atomic field above */
396#define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2)
397#define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2)
398
399/* Values for Type field above */
400
401enum acpi_apmt_node_type {
402 ACPI_APMT_NODE_TYPE_MC = 0x00,
403 ACPI_APMT_NODE_TYPE_SMMU = 0x01,
404 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02,
405 ACPI_APMT_NODE_TYPE_ACPI = 0x03,
406 ACPI_APMT_NODE_TYPE_CACHE = 0x04,
407 ACPI_APMT_NODE_TYPE_COUNT
408};
409
410/* Masks for ovflw_irq_flags field above */
411
412#define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0)
413#define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1)
414
415/* Values for ovflw_irq_flags mode field above */
416
417#define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0)
418#define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0)
419
420/* Values for ovflw_irq_flags type field above */
421
422#define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1)
423
424/*******************************************************************************
425 *
426 * BDAT - BIOS Data ACPI Table
427 *
428 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5
429 * Nov 2020
430 *
431 ******************************************************************************/
432
433struct acpi_table_bdat {
434 struct acpi_table_header header;
435 struct acpi_generic_address gas;
436};
437
438/*******************************************************************************
439 *
440 * CCEL - CC-Event Log
441 * From: "Guest-Host-Communication Interface (GHCI) for Intel
442 * Trust Domain Extensions (Intel TDX)". Feb 2022
443 *
444 ******************************************************************************/
445
446struct acpi_table_ccel {
447 struct acpi_table_header header; /* Common ACPI table header */
448 u8 CCtype;
449 u8 Ccsub_type;
450 u16 reserved;
451 u64 log_area_minimum_length;
452 u64 log_area_start_address;
453};
454
455/*******************************************************************************
456 *
457 * ERDT - Enhanced Resource Director Technology (ERDT) table
458 *
459 * Conforms to "Intel Resource Director Technology Architecture Specification"
460 * Version 1.1, January 2025
461 *
462 ******************************************************************************/
463
464struct acpi_table_erdt {
465 struct acpi_table_header header; /* Common ACPI table header */
466 u32 max_clos; /* Maximum classes of service */
467 u8 reserved[24];
468 u8 erdt_substructures[];
469};
470
471/* Values for subtable type in struct acpi_subtbl_hdr_16 */
472
473enum acpi_erdt_type {
474 ACPI_ERDT_TYPE_RMDD = 0,
475 ACPI_ERDT_TYPE_CACD = 1,
476 ACPI_ERDT_TYPE_DACD = 2,
477 ACPI_ERDT_TYPE_CMRC = 3,
478 ACPI_ERDT_TYPE_MMRC = 4,
479 ACPI_ERDT_TYPE_MARC = 5,
480 ACPI_ERDT_TYPE_CARC = 6,
481 ACPI_ERDT_TYPE_CMRD = 7,
482 ACPI_ERDT_TYPE_IBRD = 8,
483 ACPI_ERDT_TYPE_IBAD = 9,
484 ACPI_ERDT_TYPE_CARD = 10,
485 ACPI_ERDT_TYPE_RESERVED = 11 /* 11 and above are reserved */
486};
487
488/*
489 * ERDT Subtables, correspond to Type in struct acpi_subtbl_hdr_16
490 */
491
492/* 0: RMDD - Resource Management Domain Description */
493
494struct acpi_erdt_rmdd {
495 struct acpi_subtbl_hdr_16 header;
496 u16 flags;
497 u16 IO_l3_slices; /* Number of slices in IO cache */
498 u8 IO_l3_sets; /* Number of sets in IO cache */
499 u8 IO_l3_ways; /* Number of ways in IO cache */
500 u64 reserved;
501 u16 domain_id; /* Unique domain ID */
502 u32 max_rmid; /* Maximun RMID supported */
503 u64 creg_base; /* Control Register Base Address */
504 u16 creg_size; /* Control Register Size (4K pages) */
505 u8 rmdd_structs[];
506};
507
508/* 1: CACD - CPU Agent Collection Description */
509
510struct acpi_erdt_cacd {
511 struct acpi_subtbl_hdr_16 header;
512 u16 reserved;
513 u16 domain_id; /* Unique domain ID */
514 u32 X2APICIDS[];
515};
516
517/* 2: DACD - Device Agent Collection Description */
518
519struct acpi_erdt_dacd {
520 struct acpi_subtbl_hdr_16 header;
521 u16 reserved;
522 u16 domain_id; /* Unique domain ID */
523 u8 dev_paths[];
524};
525
526struct acpi_erdt_dacd_dev_paths {
527 struct acpi_subtable_header header;
528 u16 segment;
529 u8 reserved;
530 u8 start_bus;
531 u8 path[];
532};
533
534/* 3: CMRC - Cache Monitoring Registers for CPU Agents */
535
536struct acpi_erdt_cmrc {
537 struct acpi_subtbl_hdr_16 header;
538 u32 reserved1;
539 u32 flags;
540 u8 index_fn;
541 u8 reserved2[11];
542 u64 cmt_reg_base;
543 u32 cmt_reg_size;
544 u16 clump_size;
545 u16 clump_stride;
546 u64 up_scale;
547};
548
549/* 4: MMRC - Memory-bandwidth Monitoring Registers for CPU Agents */
550
551struct acpi_erdt_mmrc {
552 struct acpi_subtbl_hdr_16 header;
553 u32 reserved1;
554 u32 flags;
555 u8 index_fn;
556 u8 reserved2[11];
557 u64 reg_base;
558 u32 reg_size;
559 u8 counter_width;
560 u64 up_scale;
561 u8 reserved3[7];
562 u32 corr_factor_list_len;
563 u32 corr_factor_list[];
564};
565
566/* 5: MARC - Memory-bandwidth Allocation Registers for CPU Agents */
567
568struct acpi_erdt_marc {
569 struct acpi_subtbl_hdr_16 header;
570 u16 reserved1;
571 u16 flags;
572 u8 index_fn;
573 u8 reserved2[7];
574 u64 reg_base_opt;
575 u64 reg_base_min;
576 u64 reg_base_max;
577 u32 mba_reg_size;
578 u32 mba_ctrl_range;
579};
580
581/* 6: CARC - Cache Allocation Registers for CPU Agents */
582
583struct acpi_erdt_carc {
584 struct acpi_subtbl_hdr_16 header;
585};
586
587/* 7: CMRD - Cache Monitoring Registers for Device Agents */
588
589struct acpi_erdt_cmrd {
590 struct acpi_subtbl_hdr_16 header;
591 u32 reserved1;
592 u32 flags;
593 u8 index_fn;
594 u8 reserved2[11];
595 u64 reg_base;
596 u32 reg_size;
597 u16 cmt_reg_off;
598 u16 cmt_clump_size;
599 u64 up_scale;
600};
601
602/* 8: IBRD - Cache Monitoring Registers for Device Agents */
603
604struct acpi_erdt_ibrd {
605 struct acpi_subtbl_hdr_16 header;
606 u32 reserved1;
607 u32 flags;
608 u8 index_fn;
609 u8 reserved2[11];
610 u64 reg_base;
611 u32 reg_size;
612 u16 total_bw_offset;
613 u16 Iomiss_bw_offset;
614 u16 total_bw_clump;
615 u16 Iomiss_bw_clump;
616 u8 reserved3[7];
617 u8 counter_width;
618 u64 up_scale;
619 u32 corr_factor_list_len;
620 u32 corr_factor_list[];
621};
622
623/* 9: IBAD - IO bandwidth Allocation Registers for device agents */
624
625struct acpi_erdt_ibad {
626 struct acpi_subtbl_hdr_16 header;
627};
628
629/* 10: CARD - IO bandwidth Allocation Registers for Device Agents */
630
631struct acpi_erdt_card {
632 struct acpi_subtbl_hdr_16 header;
633 u32 reserved1;
634 u32 flags;
635 u32 contention_mask;
636 u8 index_fn;
637 u8 reserved2[7];
638 u64 reg_base;
639 u32 reg_size;
640 u16 cat_reg_offset;
641 u16 cat_reg_block_size;
642};
643
644/*******************************************************************************
645 *
646 * IORT - IO Remapping Table
647 *
648 * Conforms to "IO Remapping Table System Software on ARM Platforms",
649 * Document number: ARM DEN 0049E.f, Apr 2024
650 *
651 ******************************************************************************/
652
653struct acpi_table_iort {
654 struct acpi_table_header header;
655 u32 node_count;
656 u32 node_offset;
657 u32 reserved;
658};
659
660/*
661 * IORT subtables
662 */
663struct acpi_iort_node {
664 u8 type;
665 u16 length;
666 u8 revision;
667 u32 identifier;
668 u32 mapping_count;
669 u32 mapping_offset;
670 char node_data[];
671};
672
673/* Values for subtable Type above */
674
675enum acpi_iort_node_type {
676 ACPI_IORT_NODE_ITS_GROUP = 0x00,
677 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
678 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
679 ACPI_IORT_NODE_SMMU = 0x03,
680 ACPI_IORT_NODE_SMMU_V3 = 0x04,
681 ACPI_IORT_NODE_PMCG = 0x05,
682 ACPI_IORT_NODE_RMR = 0x06,
683};
684
685struct acpi_iort_id_mapping {
686 u32 input_base; /* Lowest value in input range */
687 u32 id_count; /* Number of IDs */
688 u32 output_base; /* Lowest value in output range */
689 u32 output_reference; /* A reference to the output node */
690 u32 flags;
691};
692
693/* Masks for Flags field above for IORT subtable */
694
695#define ACPI_IORT_ID_SINGLE_MAPPING (1)
696
697struct acpi_iort_memory_access {
698 u32 cache_coherency;
699 u8 hints;
700 u16 reserved;
701 u8 memory_flags;
702};
703
704/* Values for cache_coherency field above */
705
706#define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
707#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
708
709/* Masks for Hints field above */
710
711#define ACPI_IORT_HT_TRANSIENT (1)
712#define ACPI_IORT_HT_WRITE (1<<1)
713#define ACPI_IORT_HT_READ (1<<2)
714#define ACPI_IORT_HT_OVERRIDE (1<<3)
715
716/* Masks for memory_flags field above */
717
718#define ACPI_IORT_MF_COHERENCY (1)
719#define ACPI_IORT_MF_ATTRIBUTES (1<<1)
720#define ACPI_IORT_MF_CANWBS (1<<2)
721
722/*
723 * IORT node specific subtables
724 */
725struct acpi_iort_its_group {
726 u32 its_count;
727 u32 identifiers[]; /* GIC ITS identifier array */
728};
729
730struct acpi_iort_named_component {
731 u32 node_flags;
732 u64 memory_properties; /* Memory access properties */
733 u8 memory_address_limit; /* Memory address size limit */
734 char device_name[]; /* Path of namespace object */
735};
736
737/* Masks for Flags field above */
738
739#define ACPI_IORT_NC_STALL_SUPPORTED (1)
740#define ACPI_IORT_NC_PASID_BITS (31<<1)
741
742struct acpi_iort_root_complex {
743 u64 memory_properties; /* Memory access properties */
744 u32 ats_attribute;
745 u32 pci_segment_number;
746 u8 memory_address_limit; /* Memory address size limit */
747 u16 pasid_capabilities; /* PASID Capabilities */
748 u8 reserved[]; /* Reserved, must be zero */
749};
750
751/* Masks for ats_attribute field above */
752
753#define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */
754#define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */
755#define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */
756
757/* Masks for pasid_capabilities field above */
758#define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */
759
760struct acpi_iort_smmu {
761 u64 base_address; /* SMMU base address */
762 u64 span; /* Length of memory range */
763 u32 model;
764 u32 flags;
765 u32 global_interrupt_offset;
766 u32 context_interrupt_count;
767 u32 context_interrupt_offset;
768 u32 pmu_interrupt_count;
769 u32 pmu_interrupt_offset;
770 u64 interrupts[]; /* Interrupt array */
771};
772
773/* Values for Model field above */
774
775#define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
776#define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
777#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
778#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
779#define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
780#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */
781
782/* Masks for Flags field above */
783
784#define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
785#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
786
787/* Global interrupt format */
788
789struct acpi_iort_smmu_gsi {
790 u32 nsg_irpt;
791 u32 nsg_irpt_flags;
792 u32 nsg_cfg_irpt;
793 u32 nsg_cfg_irpt_flags;
794};
795
796struct acpi_iort_smmu_v3 {
797 u64 base_address; /* SMMUv3 base address */
798 u32 flags;
799 u32 reserved;
800 u64 vatos_address;
801 u32 model;
802 u32 event_gsiv;
803 u32 pri_gsiv;
804 u32 gerr_gsiv;
805 u32 sync_gsiv;
806 u32 pxm;
807 u32 id_mapping_index;
808};
809
810/* Values for Model field above */
811
812#define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
813#define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */
814#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
815
816/* Masks for Flags field above */
817
818#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
819#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
820#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
821#define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4)
822
823struct acpi_iort_pmcg {
824 u64 page0_base_address;
825 u32 overflow_gsiv;
826 u32 node_reference;
827 u64 page1_base_address;
828};
829
830struct acpi_iort_rmr {
831 u32 flags;
832 u32 rmr_count;
833 u32 rmr_offset;
834};
835
836/* Masks for Flags field above */
837#define ACPI_IORT_RMR_REMAP_PERMITTED (1)
838#define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1)
839
840/*
841 * Macro to access the Access Attributes in flags field above:
842 * Access Attributes is encoded in bits 9:2
843 */
844#define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF)
845
846/* Values for above Access Attributes */
847
848#define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00
849#define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01
850#define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02
851#define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03
852#define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04
853#define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05
854
855struct acpi_iort_rmr_desc {
856 u64 base_address;
857 u64 length;
858 u32 reserved;
859};
860
861/*******************************************************************************
862 *
863 * IVRS - I/O Virtualization Reporting Structure
864 * Version 1
865 *
866 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
867 * Revision 1.26, February 2009.
868 *
869 ******************************************************************************/
870
871struct acpi_table_ivrs {
872 struct acpi_table_header header; /* Common ACPI table header */
873 u32 info; /* Common virtualization info */
874 u64 reserved;
875};
876
877/* Values for Info field above */
878
879#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
880#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
881#define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
882
883/* IVRS subtable header */
884
885struct acpi_ivrs_header {
886 u8 type; /* Subtable type */
887 u8 flags;
888 u16 length; /* Subtable length */
889 u16 device_id; /* ID of IOMMU */
890};
891
892/* Values for subtable Type above */
893
894enum acpi_ivrs_type {
895 ACPI_IVRS_TYPE_HARDWARE1 = 0x10,
896 ACPI_IVRS_TYPE_HARDWARE2 = 0x11,
897 ACPI_IVRS_TYPE_HARDWARE3 = 0x40,
898 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
899 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
900 ACPI_IVRS_TYPE_MEMORY3 = 0x22
901};
902
903/* Masks for Flags field above for IVHD subtable */
904
905#define ACPI_IVHD_TT_ENABLE (1)
906#define ACPI_IVHD_PASS_PW (1<<1)
907#define ACPI_IVHD_RES_PASS_PW (1<<2)
908#define ACPI_IVHD_ISOC (1<<3)
909#define ACPI_IVHD_IOTLB (1<<4)
910
911/* Masks for Flags field above for IVMD subtable */
912
913#define ACPI_IVMD_UNITY (1)
914#define ACPI_IVMD_READ (1<<1)
915#define ACPI_IVMD_WRITE (1<<2)
916#define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
917
918/*
919 * IVRS subtables, correspond to Type in struct acpi_ivrs_header
920 */
921
922/* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
923
924struct acpi_ivrs_hardware_10 {
925 struct acpi_ivrs_header header;
926 u16 capability_offset; /* Offset for IOMMU control fields */
927 u64 base_address; /* IOMMU control registers */
928 u16 pci_segment_group;
929 u16 info; /* MSI number and unit ID */
930 u32 feature_reporting;
931};
932
933/* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */
934
935struct acpi_ivrs_hardware_11 {
936 struct acpi_ivrs_header header;
937 u16 capability_offset; /* Offset for IOMMU control fields */
938 u64 base_address; /* IOMMU control registers */
939 u16 pci_segment_group;
940 u16 info; /* MSI number and unit ID */
941 u32 attributes;
942 u64 efr_register_image;
943 u64 reserved;
944};
945
946/* Masks for Info field above */
947
948#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
949#define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */
950
951/*
952 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
953 * Upper two bits of the Type field are the (encoded) length of the structure.
954 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
955 * are reserved for future use but not defined.
956 */
957struct acpi_ivrs_de_header {
958 u8 type;
959 u16 id;
960 u8 data_setting;
961};
962
963/* Length of device entry is in the top two bits of Type field above */
964
965#define ACPI_IVHD_ENTRY_LENGTH 0xC0
966
967/* Values for device entry Type field above */
968
969enum acpi_ivrs_device_entry_type {
970 /* 4-byte device entries, all use struct acpi_ivrs_device4 */
971
972 ACPI_IVRS_TYPE_PAD4 = 0,
973 ACPI_IVRS_TYPE_ALL = 1,
974 ACPI_IVRS_TYPE_SELECT = 2,
975 ACPI_IVRS_TYPE_START = 3,
976 ACPI_IVRS_TYPE_END = 4,
977
978 /* 8-byte device entries */
979
980 ACPI_IVRS_TYPE_PAD8 = 64,
981 ACPI_IVRS_TYPE_NOT_USED = 65,
982 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */
983 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */
984 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */
985 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */
986 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */
987
988 /* Variable-length device entries */
989
990 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */
991};
992
993/* Values for Data field above */
994
995#define ACPI_IVHD_INIT_PASS (1)
996#define ACPI_IVHD_EINT_PASS (1<<1)
997#define ACPI_IVHD_NMI_PASS (1<<2)
998#define ACPI_IVHD_SYSTEM_MGMT (3<<4)
999#define ACPI_IVHD_LINT0_PASS (1<<6)
1000#define ACPI_IVHD_LINT1_PASS (1<<7)
1001
1002/* Types 0-4: 4-byte device entry */
1003
1004struct acpi_ivrs_device4 {
1005 struct acpi_ivrs_de_header header;
1006};
1007
1008/* Types 66-67: 8-byte device entry */
1009
1010struct acpi_ivrs_device8a {
1011 struct acpi_ivrs_de_header header;
1012 u8 reserved1;
1013 u16 used_id;
1014 u8 reserved2;
1015};
1016
1017/* Types 70-71: 8-byte device entry */
1018
1019struct acpi_ivrs_device8b {
1020 struct acpi_ivrs_de_header header;
1021 u32 extended_data;
1022};
1023
1024/* Values for extended_data above */
1025
1026#define ACPI_IVHD_ATS_DISABLED (1<<31)
1027
1028/* Type 72: 8-byte device entry */
1029
1030struct acpi_ivrs_device8c {
1031 struct acpi_ivrs_de_header header;
1032 u8 handle;
1033 u16 used_id;
1034 u8 variety;
1035};
1036
1037/* Values for Variety field above */
1038
1039#define ACPI_IVHD_IOAPIC 1
1040#define ACPI_IVHD_HPET 2
1041
1042/* Type 240: variable-length device entry */
1043
1044struct acpi_ivrs_device_hid {
1045 struct acpi_ivrs_de_header header;
1046 u64 acpi_hid;
1047 u64 acpi_cid;
1048 u8 uid_type;
1049 u8 uid_length;
1050};
1051
1052/* Values for uid_type above */
1053
1054#define ACPI_IVRS_UID_NOT_PRESENT 0
1055#define ACPI_IVRS_UID_IS_INTEGER 1
1056#define ACPI_IVRS_UID_IS_STRING 2
1057
1058/* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
1059
1060struct acpi_ivrs_memory {
1061 struct acpi_ivrs_header header;
1062 u16 aux_data;
1063 u64 reserved;
1064 u64 start_address;
1065 u64 memory_length;
1066};
1067
1068/*******************************************************************************
1069 *
1070 * LPIT - Low Power Idle Table
1071 *
1072 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
1073 *
1074 ******************************************************************************/
1075
1076struct acpi_table_lpit {
1077 struct acpi_table_header header; /* Common ACPI table header */
1078};
1079
1080/* LPIT subtable header */
1081
1082struct acpi_lpit_header {
1083 u32 type; /* Subtable type */
1084 u32 length; /* Subtable length */
1085 u16 unique_id;
1086 u16 reserved;
1087 u32 flags;
1088};
1089
1090/* Values for subtable Type above */
1091
1092enum acpi_lpit_type {
1093 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
1094 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
1095};
1096
1097/* Masks for Flags field above */
1098
1099#define ACPI_LPIT_STATE_DISABLED (1)
1100#define ACPI_LPIT_NO_COUNTER (1<<1)
1101
1102/*
1103 * LPIT subtables, correspond to Type in struct acpi_lpit_header
1104 */
1105
1106/* 0x00: Native C-state instruction based LPI structure */
1107
1108struct acpi_lpit_native {
1109 struct acpi_lpit_header header;
1110 struct acpi_generic_address entry_trigger;
1111 u32 residency;
1112 u32 latency;
1113 struct acpi_generic_address residency_counter;
1114 u64 counter_frequency;
1115};
1116
1117/*******************************************************************************
1118 *
1119 * MADT - Multiple APIC Description Table
1120 * Version 3
1121 *
1122 ******************************************************************************/
1123
1124struct acpi_table_madt {
1125 struct acpi_table_header header; /* Common ACPI table header */
1126 u32 address; /* Physical address of local APIC */
1127 u32 flags;
1128};
1129
1130/* Masks for Flags field above */
1131
1132#define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
1133
1134/* Values for PCATCompat flag */
1135
1136#define ACPI_MADT_DUAL_PIC 1
1137#define ACPI_MADT_MULTIPLE_APIC 0
1138
1139/* Values for MADT subtable type in struct acpi_subtable_header */
1140
1141enum acpi_madt_type {
1142 ACPI_MADT_TYPE_LOCAL_APIC = 0,
1143 ACPI_MADT_TYPE_IO_APIC = 1,
1144 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
1145 ACPI_MADT_TYPE_NMI_SOURCE = 3,
1146 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
1147 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
1148 ACPI_MADT_TYPE_IO_SAPIC = 6,
1149 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
1150 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
1151 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
1152 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
1153 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
1154 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
1155 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
1156 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
1157 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
1158 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16,
1159 ACPI_MADT_TYPE_CORE_PIC = 17,
1160 ACPI_MADT_TYPE_LIO_PIC = 18,
1161 ACPI_MADT_TYPE_HT_PIC = 19,
1162 ACPI_MADT_TYPE_EIO_PIC = 20,
1163 ACPI_MADT_TYPE_MSI_PIC = 21,
1164 ACPI_MADT_TYPE_BIO_PIC = 22,
1165 ACPI_MADT_TYPE_LPC_PIC = 23,
1166 ACPI_MADT_TYPE_RINTC = 24,
1167 ACPI_MADT_TYPE_IMSIC = 25,
1168 ACPI_MADT_TYPE_APLIC = 26,
1169 ACPI_MADT_TYPE_PLIC = 27,
1170 ACPI_MADT_TYPE_RESERVED = 28, /* 28 to 0x7F are reserved */
1171 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */
1172};
1173
1174/*
1175 * MADT Subtables, correspond to Type in struct acpi_subtable_header
1176 */
1177
1178/* 0: Processor Local APIC */
1179
1180struct acpi_madt_local_apic {
1181 struct acpi_subtable_header header;
1182 u8 processor_id; /* ACPI processor id */
1183 u8 id; /* Processor's local APIC id */
1184 u32 lapic_flags;
1185};
1186
1187/* 1: IO APIC */
1188
1189struct acpi_madt_io_apic {
1190 struct acpi_subtable_header header;
1191 u8 id; /* I/O APIC ID */
1192 u8 reserved; /* reserved - must be zero */
1193 u32 address; /* APIC physical address */
1194 u32 global_irq_base; /* Global system interrupt where INTI lines start */
1195};
1196
1197/* 2: Interrupt Override */
1198
1199struct acpi_madt_interrupt_override {
1200 struct acpi_subtable_header header;
1201 u8 bus; /* 0 - ISA */
1202 u8 source_irq; /* Interrupt source (IRQ) */
1203 u32 global_irq; /* Global system interrupt */
1204 u16 inti_flags;
1205};
1206
1207/* 3: NMI Source */
1208
1209struct acpi_madt_nmi_source {
1210 struct acpi_subtable_header header;
1211 u16 inti_flags;
1212 u32 global_irq; /* Global system interrupt */
1213};
1214
1215/* 4: Local APIC NMI */
1216
1217struct acpi_madt_local_apic_nmi {
1218 struct acpi_subtable_header header;
1219 u8 processor_id; /* ACPI processor id */
1220 u16 inti_flags;
1221 u8 lint; /* LINTn to which NMI is connected */
1222};
1223
1224/* 5: Address Override */
1225
1226struct acpi_madt_local_apic_override {
1227 struct acpi_subtable_header header;
1228 u16 reserved; /* Reserved, must be zero */
1229 u64 address; /* APIC physical address */
1230};
1231
1232/* 6: I/O Sapic */
1233
1234struct acpi_madt_io_sapic {
1235 struct acpi_subtable_header header;
1236 u8 id; /* I/O SAPIC ID */
1237 u8 reserved; /* Reserved, must be zero */
1238 u32 global_irq_base; /* Global interrupt for SAPIC start */
1239 u64 address; /* SAPIC physical address */
1240};
1241
1242/* 7: Local Sapic */
1243
1244struct acpi_madt_local_sapic {
1245 struct acpi_subtable_header header;
1246 u8 processor_id; /* ACPI processor id */
1247 u8 id; /* SAPIC ID */
1248 u8 eid; /* SAPIC EID */
1249 u8 reserved[3]; /* Reserved, must be zero */
1250 u32 lapic_flags;
1251 u32 uid; /* Numeric UID - ACPI 3.0 */
1252 char uid_string[]; /* String UID - ACPI 3.0 */
1253};
1254
1255/* 8: Platform Interrupt Source */
1256
1257struct acpi_madt_interrupt_source {
1258 struct acpi_subtable_header header;
1259 u16 inti_flags;
1260 u8 type; /* 1=PMI, 2=INIT, 3=corrected */
1261 u8 id; /* Processor ID */
1262 u8 eid; /* Processor EID */
1263 u8 io_sapic_vector; /* Vector value for PMI interrupts */
1264 u32 global_irq; /* Global system interrupt */
1265 u32 flags; /* Interrupt Source Flags */
1266};
1267
1268/* Masks for Flags field above */
1269
1270#define ACPI_MADT_CPEI_OVERRIDE (1)
1271
1272/* 9: Processor Local X2APIC (ACPI 4.0) */
1273
1274struct acpi_madt_local_x2apic {
1275 struct acpi_subtable_header header;
1276 u16 reserved; /* reserved - must be zero */
1277 u32 local_apic_id; /* Processor x2APIC ID */
1278 u32 lapic_flags;
1279 u32 uid; /* ACPI processor UID */
1280};
1281
1282/* 10: Local X2APIC NMI (ACPI 4.0) */
1283
1284struct acpi_madt_local_x2apic_nmi {
1285 struct acpi_subtable_header header;
1286 u16 inti_flags;
1287 u32 uid; /* ACPI processor UID */
1288 u8 lint; /* LINTn to which NMI is connected */
1289 u8 reserved[3]; /* reserved - must be zero */
1290};
1291
1292/* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */
1293
1294struct acpi_madt_generic_interrupt {
1295 struct acpi_subtable_header header;
1296 u16 reserved; /* reserved - must be zero */
1297 u32 cpu_interface_number;
1298 u32 uid;
1299 u32 flags;
1300 u32 parking_version;
1301 u32 performance_interrupt;
1302 u64 parked_address;
1303 u64 base_address;
1304 u64 gicv_base_address;
1305 u64 gich_base_address;
1306 u32 vgic_interrupt;
1307 u64 gicr_base_address;
1308 u64 arm_mpidr;
1309 u8 efficiency_class;
1310 u8 reserved2[1];
1311 u16 spe_interrupt; /* ACPI 6.3 */
1312 u16 trbe_interrupt; /* ACPI 6.5 */
1313};
1314
1315/* Masks for Flags field above */
1316
1317/* ACPI_MADT_ENABLED (1) Processor is usable if set */
1318#define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
1319#define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
1320#define ACPI_MADT_GICC_ONLINE_CAPABLE (1<<3) /* 03: Processor is online capable */
1321#define ACPI_MADT_GICC_NON_COHERENT (1<<4) /* 04: GIC redistributor is not coherent */
1322
1323/* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
1324
1325struct acpi_madt_generic_distributor {
1326 struct acpi_subtable_header header;
1327 u16 reserved; /* reserved - must be zero */
1328 u32 gic_id;
1329 u64 base_address;
1330 u32 global_irq_base;
1331 u8 version;
1332 u8 reserved2[3]; /* reserved - must be zero */
1333};
1334
1335/* Values for Version field above */
1336
1337enum acpi_madt_gic_version {
1338 ACPI_MADT_GIC_VERSION_NONE = 0,
1339 ACPI_MADT_GIC_VERSION_V1 = 1,
1340 ACPI_MADT_GIC_VERSION_V2 = 2,
1341 ACPI_MADT_GIC_VERSION_V3 = 3,
1342 ACPI_MADT_GIC_VERSION_V4 = 4,
1343 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
1344};
1345
1346/* 13: Generic MSI Frame (ACPI 5.1) */
1347
1348struct acpi_madt_generic_msi_frame {
1349 struct acpi_subtable_header header;
1350 u16 reserved; /* reserved - must be zero */
1351 u32 msi_frame_id;
1352 u64 base_address;
1353 u32 flags;
1354 u16 spi_count;
1355 u16 spi_base;
1356};
1357
1358/* Masks for Flags field above */
1359
1360#define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
1361
1362/* 14: Generic Redistributor (ACPI 5.1) */
1363
1364struct acpi_madt_generic_redistributor {
1365 struct acpi_subtable_header header;
1366 u8 flags;
1367 u8 reserved; /* reserved - must be zero */
1368 u64 base_address;
1369 u32 length;
1370};
1371
1372#define ACPI_MADT_GICR_NON_COHERENT (1)
1373
1374/* 15: Generic Translator (ACPI 6.0) */
1375
1376struct acpi_madt_generic_translator {
1377 struct acpi_subtable_header header;
1378 u8 flags;
1379 u8 reserved; /* reserved - must be zero */
1380 u32 translation_id;
1381 u64 base_address;
1382 u32 reserved2;
1383};
1384
1385#define ACPI_MADT_ITS_NON_COHERENT (1)
1386
1387/* 16: Multiprocessor wakeup (ACPI 6.4) */
1388
1389struct acpi_madt_multiproc_wakeup {
1390 struct acpi_subtable_header header;
1391 u16 version;
1392 u32 reserved; /* reserved - must be zero */
1393 u64 mailbox_address;
1394 u64 reset_vector;
1395};
1396
1397/* Values for Version field above */
1398
1399enum acpi_madt_multiproc_wakeup_version {
1400 ACPI_MADT_MP_WAKEUP_VERSION_NONE = 0,
1401 ACPI_MADT_MP_WAKEUP_VERSION_V1 = 1,
1402 ACPI_MADT_MP_WAKEUP_VERSION_RESERVED = 2, /* 2 and greater are reserved */
1403};
1404
1405#define ACPI_MADT_MP_WAKEUP_SIZE_V0 16
1406#define ACPI_MADT_MP_WAKEUP_SIZE_V1 24
1407
1408#define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032
1409#define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048
1410
1411struct acpi_madt_multiproc_wakeup_mailbox {
1412 u16 command;
1413 u16 reserved; /* reserved - must be zero */
1414 u32 apic_id;
1415 u64 wakeup_vector;
1416 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */
1417 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */
1418};
1419
1420#define ACPI_MP_WAKE_COMMAND_WAKEUP 1
1421#define ACPI_MP_WAKE_COMMAND_TEST 2
1422
1423/* 17: CPU Core Interrupt Controller (ACPI 6.5) */
1424
1425struct acpi_madt_core_pic {
1426 struct acpi_subtable_header header;
1427 u8 version;
1428 u32 processor_id;
1429 u32 core_id;
1430 u32 flags;
1431};
1432
1433/* Values for Version field above */
1434
1435enum acpi_madt_core_pic_version {
1436 ACPI_MADT_CORE_PIC_VERSION_NONE = 0,
1437 ACPI_MADT_CORE_PIC_VERSION_V1 = 1,
1438 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1439};
1440
1441/* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */
1442
1443struct acpi_madt_lio_pic {
1444 struct acpi_subtable_header header;
1445 u8 version;
1446 u64 address;
1447 u16 size;
1448 u8 cascade[2];
1449 u32 cascade_map[2];
1450};
1451
1452/* Values for Version field above */
1453
1454enum acpi_madt_lio_pic_version {
1455 ACPI_MADT_LIO_PIC_VERSION_NONE = 0,
1456 ACPI_MADT_LIO_PIC_VERSION_V1 = 1,
1457 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1458};
1459
1460/* 19: HT Interrupt Controller (ACPI 6.5) */
1461
1462struct acpi_madt_ht_pic {
1463 struct acpi_subtable_header header;
1464 u8 version;
1465 u64 address;
1466 u16 size;
1467 u8 cascade[8];
1468};
1469
1470/* Values for Version field above */
1471
1472enum acpi_madt_ht_pic_version {
1473 ACPI_MADT_HT_PIC_VERSION_NONE = 0,
1474 ACPI_MADT_HT_PIC_VERSION_V1 = 1,
1475 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1476};
1477
1478/* 20: Extend I/O Interrupt Controller (ACPI 6.5) */
1479
1480struct acpi_madt_eio_pic {
1481 struct acpi_subtable_header header;
1482 u8 version;
1483 u8 cascade;
1484 u8 node;
1485 u64 node_map;
1486};
1487
1488/* Values for Version field above */
1489
1490enum acpi_madt_eio_pic_version {
1491 ACPI_MADT_EIO_PIC_VERSION_NONE = 0,
1492 ACPI_MADT_EIO_PIC_VERSION_V1 = 1,
1493 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1494};
1495
1496/* 21: MSI Interrupt Controller (ACPI 6.5) */
1497
1498struct acpi_madt_msi_pic {
1499 struct acpi_subtable_header header;
1500 u8 version;
1501 u64 msg_address;
1502 u32 start;
1503 u32 count;
1504};
1505
1506/* Values for Version field above */
1507
1508enum acpi_madt_msi_pic_version {
1509 ACPI_MADT_MSI_PIC_VERSION_NONE = 0,
1510 ACPI_MADT_MSI_PIC_VERSION_V1 = 1,
1511 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1512};
1513
1514/* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */
1515
1516struct acpi_madt_bio_pic {
1517 struct acpi_subtable_header header;
1518 u8 version;
1519 u64 address;
1520 u16 size;
1521 u16 id;
1522 u16 gsi_base;
1523};
1524
1525/* Values for Version field above */
1526
1527enum acpi_madt_bio_pic_version {
1528 ACPI_MADT_BIO_PIC_VERSION_NONE = 0,
1529 ACPI_MADT_BIO_PIC_VERSION_V1 = 1,
1530 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1531};
1532
1533/* 23: LPC Interrupt Controller (ACPI 6.5) */
1534
1535struct acpi_madt_lpc_pic {
1536 struct acpi_subtable_header header;
1537 u8 version;
1538 u64 address;
1539 u16 size;
1540 u8 cascade;
1541};
1542
1543/* Values for Version field above */
1544
1545enum acpi_madt_lpc_pic_version {
1546 ACPI_MADT_LPC_PIC_VERSION_NONE = 0,
1547 ACPI_MADT_LPC_PIC_VERSION_V1 = 1,
1548 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1549};
1550
1551/* 24: RISC-V INTC */
1552struct acpi_madt_rintc {
1553 struct acpi_subtable_header header;
1554 u8 version;
1555 u8 reserved;
1556 u32 flags;
1557 u64 hart_id;
1558 u32 uid; /* ACPI processor UID */
1559 u32 ext_intc_id; /* External INTC Id */
1560 u64 imsic_addr; /* IMSIC base address */
1561 u32 imsic_size; /* IMSIC size */
1562};
1563
1564/* Values for RISC-V INTC Version field above */
1565
1566enum acpi_madt_rintc_version {
1567 ACPI_MADT_RINTC_VERSION_NONE = 0,
1568 ACPI_MADT_RINTC_VERSION_V1 = 1,
1569 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1570};
1571
1572/* 25: RISC-V IMSIC */
1573struct acpi_madt_imsic {
1574 struct acpi_subtable_header header;
1575 u8 version;
1576 u8 reserved;
1577 u32 flags;
1578 u16 num_ids;
1579 u16 num_guest_ids;
1580 u8 guest_index_bits;
1581 u8 hart_index_bits;
1582 u8 group_index_bits;
1583 u8 group_index_shift;
1584};
1585
1586/* 26: RISC-V APLIC */
1587struct acpi_madt_aplic {
1588 struct acpi_subtable_header header;
1589 u8 version;
1590 u8 id;
1591 u32 flags;
1592 u8 hw_id[8];
1593 u16 num_idcs;
1594 u16 num_sources;
1595 u32 gsi_base;
1596 u64 base_addr;
1597 u32 size;
1598};
1599
1600/* 27: RISC-V PLIC */
1601struct acpi_madt_plic {
1602 struct acpi_subtable_header header;
1603 u8 version;
1604 u8 id;
1605 u8 hw_id[8];
1606 u16 num_irqs;
1607 u16 max_prio;
1608 u32 flags;
1609 u32 size;
1610 u64 base_addr;
1611 u32 gsi_base;
1612};
1613
1614/* 80: OEM data */
1615
1616struct acpi_madt_oem_data {
1617 ACPI_FLEX_ARRAY(u8, oem_data);
1618};
1619
1620/*
1621 * Common flags fields for MADT subtables
1622 */
1623
1624/* MADT Local APIC flags */
1625
1626#define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
1627#define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */
1628
1629/* MADT MPS INTI flags (inti_flags) */
1630
1631#define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
1632#define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
1633
1634/* Values for MPS INTI flags */
1635
1636#define ACPI_MADT_POLARITY_CONFORMS 0
1637#define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
1638#define ACPI_MADT_POLARITY_RESERVED 2
1639#define ACPI_MADT_POLARITY_ACTIVE_LOW 3
1640
1641#define ACPI_MADT_TRIGGER_CONFORMS (0)
1642#define ACPI_MADT_TRIGGER_EDGE (1<<2)
1643#define ACPI_MADT_TRIGGER_RESERVED (2<<2)
1644#define ACPI_MADT_TRIGGER_LEVEL (3<<2)
1645
1646/*******************************************************************************
1647 *
1648 * MCFG - PCI Memory Mapped Configuration table and subtable
1649 * Version 1
1650 *
1651 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
1652 *
1653 ******************************************************************************/
1654
1655struct acpi_table_mcfg {
1656 struct acpi_table_header header; /* Common ACPI table header */
1657 u8 reserved[8];
1658};
1659
1660/* Subtable */
1661
1662struct acpi_mcfg_allocation {
1663 u64 address; /* Base address, processor-relative */
1664 u16 pci_segment; /* PCI segment group number */
1665 u8 start_bus_number; /* Starting PCI Bus number */
1666 u8 end_bus_number; /* Final PCI Bus number */
1667 u32 reserved;
1668};
1669
1670/*******************************************************************************
1671 *
1672 * MCHI - Management Controller Host Interface Table
1673 * Version 1
1674 *
1675 * Conforms to "Management Component Transport Protocol (MCTP) Host
1676 * Interface Specification", Revision 1.0.0a, October 13, 2009
1677 *
1678 ******************************************************************************/
1679
1680struct acpi_table_mchi {
1681 struct acpi_table_header header; /* Common ACPI table header */
1682 u8 interface_type;
1683 u8 protocol;
1684 u64 protocol_data;
1685 u8 interrupt_type;
1686 u8 gpe;
1687 u8 pci_device_flag;
1688 u32 global_interrupt;
1689 struct acpi_generic_address control_register;
1690 u8 pci_segment;
1691 u8 pci_bus;
1692 u8 pci_device;
1693 u8 pci_function;
1694};
1695
1696/*******************************************************************************
1697 *
1698 * MPAM - Memory System Resource Partitioning and Monitoring
1699 *
1700 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0"
1701 * Document number: ARM DEN 0065, December, 2022.
1702 *
1703 ******************************************************************************/
1704
1705/* MPAM RIS locator types. Table 11, Location types */
1706enum acpi_mpam_locator_type {
1707 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0,
1708 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1,
1709 ACPI_MPAM_LOCATION_TYPE_SMMU = 2,
1710 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3,
1711 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4,
1712 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5,
1713 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF
1714};
1715
1716/* MPAM Functional dependency descriptor. Table 10 */
1717struct acpi_mpam_func_deps {
1718 u32 producer;
1719 u32 reserved;
1720};
1721
1722/* MPAM Processor cache locator descriptor. Table 13 */
1723struct acpi_mpam_resource_cache_locator {
1724 u64 cache_reference;
1725 u32 reserved;
1726};
1727
1728/* MPAM Memory locator descriptor. Table 14 */
1729struct acpi_mpam_resource_memory_locator {
1730 u64 proximity_domain;
1731 u32 reserved;
1732};
1733
1734/* MPAM SMMU locator descriptor. Table 15 */
1735struct acpi_mpam_resource_smmu_locator {
1736 u64 smmu_interface;
1737 u32 reserved;
1738};
1739
1740/* MPAM Memory-side cache locator descriptor. Table 16 */
1741struct acpi_mpam_resource_memcache_locator {
1742 u8 reserved[7];
1743 u8 level;
1744 u32 reference;
1745};
1746
1747/* MPAM ACPI device locator descriptor. Table 17 */
1748struct acpi_mpam_resource_acpi_locator {
1749 u64 acpi_hw_id;
1750 u32 acpi_unique_id;
1751};
1752
1753/* MPAM Interconnect locator descriptor. Table 18 */
1754struct acpi_mpam_resource_interconnect_locator {
1755 u64 inter_connect_desc_tbl_off;
1756 u32 reserved;
1757};
1758
1759/* MPAM Locator structure. Table 12 */
1760struct acpi_mpam_resource_generic_locator {
1761 u64 descriptor1;
1762 u32 descriptor2;
1763};
1764
1765union acpi_mpam_resource_locator {
1766 struct acpi_mpam_resource_cache_locator cache_locator;
1767 struct acpi_mpam_resource_memory_locator memory_locator;
1768 struct acpi_mpam_resource_smmu_locator smmu_locator;
1769 struct acpi_mpam_resource_memcache_locator mem_cache_locator;
1770 struct acpi_mpam_resource_acpi_locator acpi_locator;
1771 struct acpi_mpam_resource_interconnect_locator interconnect_ifc_locator;
1772 struct acpi_mpam_resource_generic_locator generic_locator;
1773};
1774
1775/* Memory System Component Resource Node Structure Table 9 */
1776struct acpi_mpam_resource_node {
1777 u32 identifier;
1778 u8 ris_index;
1779 u16 reserved1;
1780 u8 locator_type;
1781 union acpi_mpam_resource_locator locator;
1782 u32 num_functional_deps;
1783};
1784
1785/* Memory System Component (MSC) Node Structure. Table 4 */
1786struct acpi_mpam_msc_node {
1787 u16 length;
1788 u8 interface_type;
1789 u8 reserved;
1790 u32 identifier;
1791 u64 base_address;
1792 u32 mmio_size;
1793 u32 overflow_interrupt;
1794 u32 overflow_interrupt_flags;
1795 u32 reserved1;
1796 u32 overflow_interrupt_affinity;
1797 u32 error_interrupt;
1798 u32 error_interrupt_flags;
1799 u32 reserved2;
1800 u32 error_interrupt_affinity;
1801 u32 max_nrdy_usec;
1802 u64 hardware_id_linked_device;
1803 u32 instance_id_linked_device;
1804 u32 num_resource_nodes;
1805};
1806
1807struct acpi_table_mpam {
1808 struct acpi_table_header header; /* Common ACPI table header */
1809};
1810
1811/*******************************************************************************
1812 *
1813 * MPST - Memory Power State Table (ACPI 5.0)
1814 * Version 1
1815 *
1816 ******************************************************************************/
1817
1818#define ACPI_MPST_CHANNEL_INFO \
1819 u8 channel_id; \
1820 u8 reserved1[3]; \
1821 u16 power_node_count; \
1822 u16 reserved2;
1823
1824/* Main table */
1825
1826struct acpi_table_mpst {
1827 struct acpi_table_header header; /* Common ACPI table header */
1828 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1829};
1830
1831/* Memory Platform Communication Channel Info */
1832
1833struct acpi_mpst_channel {
1834 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1835};
1836
1837/* Memory Power Node Structure */
1838
1839struct acpi_mpst_power_node {
1840 u8 flags;
1841 u8 reserved1;
1842 u16 node_id;
1843 u32 length;
1844 u64 range_address;
1845 u64 range_length;
1846 u32 num_power_states;
1847 u32 num_physical_components;
1848};
1849
1850/* Values for Flags field above */
1851
1852#define ACPI_MPST_ENABLED 1
1853#define ACPI_MPST_POWER_MANAGED 2
1854#define ACPI_MPST_HOT_PLUG_CAPABLE 4
1855
1856/* Memory Power State Structure (follows POWER_NODE above) */
1857
1858struct acpi_mpst_power_state {
1859 u8 power_state;
1860 u8 info_index;
1861};
1862
1863/* Physical Component ID Structure (follows POWER_STATE above) */
1864
1865struct acpi_mpst_component {
1866 u16 component_id;
1867};
1868
1869/* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
1870
1871struct acpi_mpst_data_hdr {
1872 u16 characteristics_count;
1873 u16 reserved;
1874};
1875
1876struct acpi_mpst_power_data {
1877 u8 structure_id;
1878 u8 flags;
1879 u16 reserved1;
1880 u32 average_power;
1881 u32 power_saving;
1882 u64 exit_latency;
1883 u64 reserved2;
1884};
1885
1886/* Values for Flags field above */
1887
1888#define ACPI_MPST_PRESERVE 1
1889#define ACPI_MPST_AUTOENTRY 2
1890#define ACPI_MPST_AUTOEXIT 4
1891
1892/* Shared Memory Region (not part of an ACPI table) */
1893
1894struct acpi_mpst_shared {
1895 u32 signature;
1896 u16 pcc_command;
1897 u16 pcc_status;
1898 u32 command_register;
1899 u32 status_register;
1900 u32 power_state_id;
1901 u32 power_node_id;
1902 u64 energy_consumed;
1903 u64 average_power;
1904};
1905
1906/*******************************************************************************
1907 *
1908 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
1909 * Version 1
1910 *
1911 ******************************************************************************/
1912
1913struct acpi_table_msct {
1914 struct acpi_table_header header; /* Common ACPI table header */
1915 u32 proximity_offset; /* Location of proximity info struct(s) */
1916 u32 max_proximity_domains; /* Max number of proximity domains */
1917 u32 max_clock_domains; /* Max number of clock domains */
1918 u64 max_address; /* Max physical address in system */
1919};
1920
1921/* subtable - Maximum Proximity Domain Information. Version 1 */
1922
1923struct acpi_msct_proximity {
1924 u8 revision;
1925 u8 length;
1926 u32 range_start; /* Start of domain range */
1927 u32 range_end; /* End of domain range */
1928 u32 processor_capacity;
1929 u64 memory_capacity; /* In bytes */
1930};
1931
1932/*******************************************************************************
1933 *
1934 * MRRM - Memory Range and Region Mapping (MRRM) table
1935 * Conforms to "Intel Resource Director Technology Architecture Specification"
1936 * Version 1.1, January 2025
1937 *
1938 ******************************************************************************/
1939
1940struct acpi_table_mrrm {
1941 struct acpi_table_header header; /* Common ACPI table header */
1942 u8 max_mem_region; /* Max Memory Regions supported */
1943 u8 flags; /* Region assignment type */
1944 u8 reserved[26];
1945 u8 memory_range_entry[];
1946};
1947
1948/* Flags */
1949#define ACPI_MRRM_FLAGS_REGION_ASSIGNMENT_OS (1<<0)
1950
1951/*******************************************************************************
1952 *
1953 * Memory Range entry - Memory Range entry in MRRM table
1954 *
1955 ******************************************************************************/
1956
1957struct acpi_mrrm_mem_range_entry {
1958 struct acpi_subtbl_hdr_16 header;
1959 u32 reserved0; /* Reserved */
1960 u64 addr_base; /* Base addr of the mem range */
1961 u64 addr_len; /* Length of the mem range */
1962 u16 region_id_flags; /* Valid local or remote Region-ID */
1963 u8 local_region_id; /* Platform-assigned static local Region-ID */
1964 u8 remote_region_id; /* Platform-assigned static remote Region-ID */
1965 u32 reserved1; /* Reserved */
1966 /* Region-ID Programming Registers[] */
1967};
1968
1969/* Values for region_id_flags above */
1970#define ACPI_MRRM_VALID_REGION_ID_FLAGS_LOCAL (1<<0)
1971#define ACPI_MRRM_VALID_REGION_ID_FLAGS_REMOTE (1<<1)
1972
1973/*******************************************************************************
1974 *
1975 * MSDM - Microsoft Data Management table
1976 *
1977 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
1978 * November 29, 2011. Copyright 2011 Microsoft
1979 *
1980 ******************************************************************************/
1981
1982/* Basic MSDM table is only the common ACPI header */
1983
1984struct acpi_table_msdm {
1985 struct acpi_table_header header; /* Common ACPI table header */
1986};
1987
1988/*******************************************************************************
1989 *
1990 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
1991 * Version 1
1992 *
1993 ******************************************************************************/
1994
1995struct acpi_table_nfit {
1996 struct acpi_table_header header; /* Common ACPI table header */
1997 u32 reserved; /* Reserved, must be zero */
1998};
1999
2000/* Subtable header for NFIT */
2001
2002struct acpi_nfit_header {
2003 u16 type;
2004 u16 length;
2005};
2006
2007/* Values for subtable type in struct acpi_nfit_header */
2008
2009enum acpi_nfit_type {
2010 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
2011 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
2012 ACPI_NFIT_TYPE_INTERLEAVE = 2,
2013 ACPI_NFIT_TYPE_SMBIOS = 3,
2014 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
2015 ACPI_NFIT_TYPE_DATA_REGION = 5,
2016 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
2017 ACPI_NFIT_TYPE_CAPABILITIES = 7,
2018 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
2019};
2020
2021/*
2022 * NFIT Subtables
2023 */
2024
2025/* 0: System Physical Address Range Structure */
2026
2027struct acpi_nfit_system_address {
2028 struct acpi_nfit_header header;
2029 u16 range_index;
2030 u16 flags;
2031 u32 reserved; /* Reserved, must be zero */
2032 u32 proximity_domain;
2033 u8 range_guid[16];
2034 u64 address;
2035 u64 length;
2036 u64 memory_mapping;
2037 u64 location_cookie; /* ACPI 6.4 */
2038};
2039
2040/* Flags */
2041
2042#define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
2043#define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
2044#define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */
2045
2046/* Range Type GUIDs appear in the include/acuuid.h file */
2047
2048/* 1: Memory Device to System Address Range Map Structure */
2049
2050struct acpi_nfit_memory_map {
2051 struct acpi_nfit_header header;
2052 u32 device_handle;
2053 u16 physical_id;
2054 u16 region_id;
2055 u16 range_index;
2056 u16 region_index;
2057 u64 region_size;
2058 u64 region_offset;
2059 u64 address;
2060 u16 interleave_index;
2061 u16 interleave_ways;
2062 u16 flags;
2063 u16 reserved; /* Reserved, must be zero */
2064};
2065
2066/* Flags */
2067
2068#define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
2069#define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
2070#define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
2071#define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
2072#define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
2073#define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
2074#define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
2075
2076/* 2: Interleave Structure */
2077
2078struct acpi_nfit_interleave {
2079 struct acpi_nfit_header header;
2080 u16 interleave_index;
2081 u16 reserved; /* Reserved, must be zero */
2082 u32 line_count;
2083 u32 line_size;
2084 u32 line_offset[]; /* Variable length */
2085};
2086
2087/* 3: SMBIOS Management Information Structure */
2088
2089struct acpi_nfit_smbios {
2090 struct acpi_nfit_header header;
2091 u32 reserved; /* Reserved, must be zero */
2092 u8 data[]; /* Variable length */
2093};
2094
2095/* 4: NVDIMM Control Region Structure */
2096
2097struct acpi_nfit_control_region {
2098 struct acpi_nfit_header header;
2099 u16 region_index;
2100 u16 vendor_id;
2101 u16 device_id;
2102 u16 revision_id;
2103 u16 subsystem_vendor_id;
2104 u16 subsystem_device_id;
2105 u16 subsystem_revision_id;
2106 u8 valid_fields;
2107 u8 manufacturing_location;
2108 u16 manufacturing_date;
2109 u8 reserved[2]; /* Reserved, must be zero */
2110 u32 serial_number;
2111 u16 code;
2112 u16 windows;
2113 u64 window_size;
2114 u64 command_offset;
2115 u64 command_size;
2116 u64 status_offset;
2117 u64 status_size;
2118 u16 flags;
2119 u8 reserved1[6]; /* Reserved, must be zero */
2120};
2121
2122/* Flags */
2123
2124#define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
2125
2126/* valid_fields bits */
2127
2128#define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
2129
2130/* 5: NVDIMM Block Data Window Region Structure */
2131
2132struct acpi_nfit_data_region {
2133 struct acpi_nfit_header header;
2134 u16 region_index;
2135 u16 windows;
2136 u64 offset;
2137 u64 size;
2138 u64 capacity;
2139 u64 start_address;
2140};
2141
2142/* 6: Flush Hint Address Structure */
2143
2144struct acpi_nfit_flush_address {
2145 struct acpi_nfit_header header;
2146 u32 device_handle;
2147 u16 hint_count;
2148 u8 reserved[6]; /* Reserved, must be zero */
2149 u64 hint_address[]; /* Variable length */
2150};
2151
2152/* 7: Platform Capabilities Structure */
2153
2154struct acpi_nfit_capabilities {
2155 struct acpi_nfit_header header;
2156 u8 highest_capability;
2157 u8 reserved[3]; /* Reserved, must be zero */
2158 u32 capabilities;
2159 u32 reserved2;
2160};
2161
2162/* Capabilities Flags */
2163
2164#define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
2165#define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
2166#define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
2167
2168/*
2169 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
2170 */
2171struct nfit_device_handle {
2172 u32 handle;
2173};
2174
2175/* Device handle construction and extraction macros */
2176
2177#define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
2178#define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
2179#define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
2180#define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
2181#define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
2182
2183#define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
2184#define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
2185#define ACPI_NFIT_MEMORY_ID_OFFSET 8
2186#define ACPI_NFIT_SOCKET_ID_OFFSET 12
2187#define ACPI_NFIT_NODE_ID_OFFSET 16
2188
2189/* Macro to construct a NFIT/NVDIMM device handle */
2190
2191#define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
2192 ((dimm) | \
2193 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
2194 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
2195 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
2196 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
2197
2198/* Macros to extract individual fields from a NFIT/NVDIMM device handle */
2199
2200#define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
2201 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
2202
2203#define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
2204 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
2205
2206#define ACPI_NFIT_GET_MEMORY_ID(handle) \
2207 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
2208
2209#define ACPI_NFIT_GET_SOCKET_ID(handle) \
2210 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
2211
2212#define ACPI_NFIT_GET_NODE_ID(handle) \
2213 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
2214
2215/*******************************************************************************
2216 *
2217 * NHLT - Non HDAudio Link Table
2218 * Version 1
2219 *
2220 ******************************************************************************/
2221
2222struct acpi_table_nhlt {
2223 struct acpi_table_header header; /* Common ACPI table header */
2224 u8 endpoints_count;
2225 /*
2226 * struct acpi_nhlt_endpoint endpoints[];
2227 * struct acpi_nhlt_config oed_config;
2228 */
2229};
2230
2231struct acpi_nhlt_endpoint {
2232 u32 length;
2233 u8 link_type;
2234 u8 instance_id;
2235 u16 vendor_id;
2236 u16 device_id;
2237 u16 revision_id;
2238 u32 subsystem_id;
2239 u8 device_type;
2240 u8 direction;
2241 u8 virtual_bus_id;
2242 /*
2243 * struct acpi_nhlt_config device_config;
2244 * struct acpi_nhlt_formats_config formats_config;
2245 * struct acpi_nhlt_devices_info devices_info;
2246 */
2247};
2248
2249/*
2250 * Values for link_type field above
2251 *
2252 * Only types PDM and SSP are used
2253 */
2254#define ACPI_NHLT_LINKTYPE_HDA 0
2255#define ACPI_NHLT_LINKTYPE_DSP 1
2256#define ACPI_NHLT_LINKTYPE_PDM 2
2257#define ACPI_NHLT_LINKTYPE_SSP 3
2258#define ACPI_NHLT_LINKTYPE_SLIMBUS 4
2259#define ACPI_NHLT_LINKTYPE_SDW 5
2260#define ACPI_NHLT_LINKTYPE_UAOL 6
2261
2262/* Values for device_id field above */
2263
2264#define ACPI_NHLT_DEVICEID_DMIC 0xAE20
2265#define ACPI_NHLT_DEVICEID_BT 0xAE30
2266#define ACPI_NHLT_DEVICEID_I2S 0xAE34
2267
2268/* Values for device_type field above */
2269
2270/*
2271 * Device types unique to endpoint of link_type=PDM
2272 *
2273 * Type PDM used for all SKL+ platforms
2274 */
2275#define ACPI_NHLT_DEVICETYPE_PDM 0
2276#define ACPI_NHLT_DEVICETYPE_PDM_SKL 1
2277/* Device types unique to endpoint of link_type=SSP */
2278#define ACPI_NHLT_DEVICETYPE_BT 0
2279#define ACPI_NHLT_DEVICETYPE_FM 1
2280#define ACPI_NHLT_DEVICETYPE_MODEM 2
2281#define ACPI_NHLT_DEVICETYPE_CODEC 4
2282
2283/* Values for Direction field above */
2284
2285#define ACPI_NHLT_DIR_RENDER 0
2286#define ACPI_NHLT_DIR_CAPTURE 1
2287
2288struct acpi_nhlt_config {
2289 u32 capabilities_size;
2290 u8 capabilities[];
2291};
2292
2293struct acpi_nhlt_gendevice_config {
2294 u8 virtual_slot;
2295 u8 config_type;
2296};
2297
2298/* Values for config_type field above */
2299
2300#define ACPI_NHLT_CONFIGTYPE_GENERIC 0
2301#define ACPI_NHLT_CONFIGTYPE_MICARRAY 1
2302
2303struct acpi_nhlt_micdevice_config {
2304 u8 virtual_slot;
2305 u8 config_type;
2306 u8 array_type;
2307};
2308
2309/* Values for array_type field above */
2310
2311#define ACPI_NHLT_ARRAYTYPE_LINEAR2_SMALL 0xA
2312#define ACPI_NHLT_ARRAYTYPE_LINEAR2_BIG 0xB
2313#define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO1 0xC
2314#define ACPI_NHLT_ARRAYTYPE_PLANAR4_LSHAPED 0xD
2315#define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO2 0xE
2316#define ACPI_NHLT_ARRAYTYPE_VENDOR 0xF
2317
2318struct acpi_nhlt_vendor_mic_config {
2319 u8 type;
2320 u8 panel;
2321 u16 speaker_position_distance; /* mm */
2322 u16 horizontal_offset; /* mm */
2323 u16 vertical_offset; /* mm */
2324 u8 frequency_low_band; /* 5*Hz */
2325 u8 frequency_high_band; /* 500*Hz */
2326 u16 direction_angle; /* -180 - +180 */
2327 u16 elevation_angle; /* -180 - +180 */
2328 u16 work_vertical_angle_begin; /* -180 - +180 with 2 deg step */
2329 u16 work_vertical_angle_end; /* -180 - +180 with 2 deg step */
2330 u16 work_horizontal_angle_begin; /* -180 - +180 with 2 deg step */
2331 u16 work_horizontal_angle_end; /* -180 - +180 with 2 deg step */
2332};
2333
2334/* Values for Type field above */
2335
2336#define ACPI_NHLT_MICTYPE_OMNIDIRECTIONAL 0
2337#define ACPI_NHLT_MICTYPE_SUBCARDIOID 1
2338#define ACPI_NHLT_MICTYPE_CARDIOID 2
2339#define ACPI_NHLT_MICTYPE_SUPERCARDIOID 3
2340#define ACPI_NHLT_MICTYPE_HYPERCARDIOID 4
2341#define ACPI_NHLT_MICTYPE_8SHAPED 5
2342#define ACPI_NHLT_MICTYPE_RESERVED 6
2343#define ACPI_NHLT_MICTYPE_VENDORDEFINED 7
2344
2345/* Values for Panel field above */
2346
2347#define ACPI_NHLT_MICLOCATION_TOP 0
2348#define ACPI_NHLT_MICLOCATION_BOTTOM 1
2349#define ACPI_NHLT_MICLOCATION_LEFT 2
2350#define ACPI_NHLT_MICLOCATION_RIGHT 3
2351#define ACPI_NHLT_MICLOCATION_FRONT 4
2352#define ACPI_NHLT_MICLOCATION_REAR 5
2353
2354struct acpi_nhlt_vendor_micdevice_config {
2355 u8 virtual_slot;
2356 u8 config_type;
2357 u8 array_type;
2358 u8 mics_count;
2359 struct acpi_nhlt_vendor_mic_config mics[];
2360};
2361
2362union acpi_nhlt_device_config {
2363 u8 virtual_slot;
2364 struct acpi_nhlt_gendevice_config gen;
2365 struct acpi_nhlt_micdevice_config mic;
2366 struct acpi_nhlt_vendor_micdevice_config vendor_mic;
2367};
2368
2369/* Inherited from Microsoft's WAVEFORMATEXTENSIBLE. */
2370struct acpi_nhlt_wave_formatext {
2371 u16 format_tag;
2372 u16 channel_count;
2373 u32 samples_per_sec;
2374 u32 avg_bytes_per_sec;
2375 u16 block_align;
2376 u16 bits_per_sample;
2377 u16 extra_format_size;
2378 u16 valid_bits_per_sample;
2379 u32 channel_mask;
2380 u8 subformat[16];
2381};
2382
2383struct acpi_nhlt_format_config {
2384 struct acpi_nhlt_wave_formatext format;
2385 struct acpi_nhlt_config config;
2386};
2387
2388struct acpi_nhlt_formats_config {
2389 u8 formats_count;
2390 struct acpi_nhlt_format_config formats[];
2391};
2392
2393struct acpi_nhlt_device_info {
2394 u8 id[16];
2395 u8 instance_id;
2396 u8 port_id;
2397};
2398
2399struct acpi_nhlt_devices_info {
2400 u8 devices_count;
2401 struct acpi_nhlt_device_info devices[];
2402};
2403
2404/*******************************************************************************
2405 *
2406 * PCCT - Platform Communications Channel Table (ACPI 5.0)
2407 * Version 2 (ACPI 6.2)
2408 *
2409 ******************************************************************************/
2410
2411struct acpi_table_pcct {
2412 struct acpi_table_header header; /* Common ACPI table header */
2413 u32 flags;
2414 u64 reserved;
2415};
2416
2417/* Values for Flags field above */
2418
2419#define ACPI_PCCT_DOORBELL 1
2420
2421/* Values for subtable type in struct acpi_subtable_header */
2422
2423enum acpi_pcct_type {
2424 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
2425 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
2426 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
2427 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
2428 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
2429 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */
2430 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */
2431};
2432
2433/*
2434 * PCCT Subtables, correspond to Type in struct acpi_subtable_header
2435 */
2436
2437/* 0: Generic Communications Subspace */
2438
2439struct acpi_pcct_subspace {
2440 struct acpi_subtable_header header;
2441 u8 reserved[6];
2442 u64 base_address;
2443 u64 length;
2444 struct acpi_generic_address doorbell_register;
2445 u64 preserve_mask;
2446 u64 write_mask;
2447 u32 latency;
2448 u32 max_access_rate;
2449 u16 min_turnaround_time;
2450};
2451
2452/* 1: HW-reduced Communications Subspace (ACPI 5.1) */
2453
2454struct acpi_pcct_hw_reduced {
2455 struct acpi_subtable_header header;
2456 u32 platform_interrupt;
2457 u8 flags;
2458 u8 reserved;
2459 u64 base_address;
2460 u64 length;
2461 struct acpi_generic_address doorbell_register;
2462 u64 preserve_mask;
2463 u64 write_mask;
2464 u32 latency;
2465 u32 max_access_rate;
2466 u16 min_turnaround_time;
2467};
2468
2469/* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
2470
2471struct acpi_pcct_hw_reduced_type2 {
2472 struct acpi_subtable_header header;
2473 u32 platform_interrupt;
2474 u8 flags;
2475 u8 reserved;
2476 u64 base_address;
2477 u64 length;
2478 struct acpi_generic_address doorbell_register;
2479 u64 preserve_mask;
2480 u64 write_mask;
2481 u32 latency;
2482 u32 max_access_rate;
2483 u16 min_turnaround_time;
2484 struct acpi_generic_address platform_ack_register;
2485 u64 ack_preserve_mask;
2486 u64 ack_write_mask;
2487};
2488
2489/* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
2490
2491struct acpi_pcct_ext_pcc_master {
2492 struct acpi_subtable_header header;
2493 u32 platform_interrupt;
2494 u8 flags;
2495 u8 reserved1;
2496 u64 base_address;
2497 u32 length;
2498 struct acpi_generic_address doorbell_register;
2499 u64 preserve_mask;
2500 u64 write_mask;
2501 u32 latency;
2502 u32 max_access_rate;
2503 u32 min_turnaround_time;
2504 struct acpi_generic_address platform_ack_register;
2505 u64 ack_preserve_mask;
2506 u64 ack_set_mask;
2507 u64 reserved2;
2508 struct acpi_generic_address cmd_complete_register;
2509 u64 cmd_complete_mask;
2510 struct acpi_generic_address cmd_update_register;
2511 u64 cmd_update_preserve_mask;
2512 u64 cmd_update_set_mask;
2513 struct acpi_generic_address error_status_register;
2514 u64 error_status_mask;
2515};
2516
2517/* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
2518
2519struct acpi_pcct_ext_pcc_slave {
2520 struct acpi_subtable_header header;
2521 u32 platform_interrupt;
2522 u8 flags;
2523 u8 reserved1;
2524 u64 base_address;
2525 u32 length;
2526 struct acpi_generic_address doorbell_register;
2527 u64 preserve_mask;
2528 u64 write_mask;
2529 u32 latency;
2530 u32 max_access_rate;
2531 u32 min_turnaround_time;
2532 struct acpi_generic_address platform_ack_register;
2533 u64 ack_preserve_mask;
2534 u64 ack_set_mask;
2535 u64 reserved2;
2536 struct acpi_generic_address cmd_complete_register;
2537 u64 cmd_complete_mask;
2538 struct acpi_generic_address cmd_update_register;
2539 u64 cmd_update_preserve_mask;
2540 u64 cmd_update_set_mask;
2541 struct acpi_generic_address error_status_register;
2542 u64 error_status_mask;
2543};
2544
2545/* 5: HW Registers based Communications Subspace */
2546
2547struct acpi_pcct_hw_reg {
2548 struct acpi_subtable_header header;
2549 u16 version;
2550 u64 base_address;
2551 u64 length;
2552 struct acpi_generic_address doorbell_register;
2553 u64 doorbell_preserve;
2554 u64 doorbell_write;
2555 struct acpi_generic_address cmd_complete_register;
2556 u64 cmd_complete_mask;
2557 struct acpi_generic_address error_status_register;
2558 u64 error_status_mask;
2559 u32 nominal_latency;
2560 u32 min_turnaround_time;
2561};
2562
2563/* Values for doorbell flags above */
2564
2565#define ACPI_PCCT_INTERRUPT_POLARITY (1)
2566#define ACPI_PCCT_INTERRUPT_MODE (1<<1)
2567
2568/*
2569 * PCC memory structures (not part of the ACPI table)
2570 */
2571
2572/* Shared Memory Region */
2573
2574struct acpi_pcct_shared_memory {
2575 u32 signature;
2576 u16 command;
2577 u16 status;
2578};
2579
2580/* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
2581
2582struct acpi_pcct_ext_pcc_shared_memory {
2583 u32 signature;
2584 u32 flags;
2585 u32 length;
2586 u32 command;
2587};
2588
2589/*******************************************************************************
2590 *
2591 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
2592 * Version 0
2593 *
2594 ******************************************************************************/
2595
2596struct acpi_table_pdtt {
2597 struct acpi_table_header header; /* Common ACPI table header */
2598 u8 trigger_count;
2599 u8 reserved[3];
2600 u32 array_offset;
2601};
2602
2603/*
2604 * PDTT Communication Channel Identifier Structure.
2605 * The number of these structures is defined by trigger_count above,
2606 * starting at array_offset.
2607 */
2608struct acpi_pdtt_channel {
2609 u8 subchannel_id;
2610 u8 flags;
2611};
2612
2613/* Flags for above */
2614
2615#define ACPI_PDTT_RUNTIME_TRIGGER (1)
2616#define ACPI_PDTT_WAIT_COMPLETION (1<<1)
2617#define ACPI_PDTT_TRIGGER_ORDER (1<<2)
2618
2619/*******************************************************************************
2620 *
2621 * PHAT - Platform Health Assessment Table (ACPI 6.4)
2622 * Version 1
2623 *
2624 ******************************************************************************/
2625
2626struct acpi_table_phat {
2627 struct acpi_table_header header; /* Common ACPI table header */
2628};
2629
2630/* Common header for PHAT subtables that follow main table */
2631
2632struct acpi_phat_header {
2633 u16 type;
2634 u16 length;
2635 u8 revision;
2636};
2637
2638/* Values for Type field above */
2639
2640#define ACPI_PHAT_TYPE_FW_VERSION_DATA 0
2641#define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1
2642#define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */
2643
2644/*
2645 * PHAT subtables, correspond to Type in struct acpi_phat_header
2646 */
2647
2648/* 0: Firmware Version Data Record */
2649
2650struct acpi_phat_version_data {
2651 struct acpi_phat_header header;
2652 u8 reserved[3];
2653 u32 element_count;
2654};
2655
2656struct acpi_phat_version_element {
2657 u8 guid[16];
2658 u64 version_value;
2659 u32 producer_id;
2660};
2661
2662/* 1: Firmware Health Data Record */
2663
2664struct acpi_phat_health_data {
2665 struct acpi_phat_header header;
2666 u8 reserved[2];
2667 u8 health;
2668 u8 device_guid[16];
2669 u32 device_specific_offset; /* Zero if no Device-specific data */
2670};
2671
2672/* Values for Health field above */
2673
2674#define ACPI_PHAT_ERRORS_FOUND 0
2675#define ACPI_PHAT_NO_ERRORS 1
2676#define ACPI_PHAT_UNKNOWN_ERRORS 2
2677#define ACPI_PHAT_ADVISORY 3
2678
2679/*******************************************************************************
2680 *
2681 * PMTT - Platform Memory Topology Table (ACPI 5.0)
2682 * Version 1
2683 *
2684 ******************************************************************************/
2685
2686struct acpi_table_pmtt {
2687 struct acpi_table_header header; /* Common ACPI table header */
2688 u32 memory_device_count;
2689 /*
2690 * Immediately followed by:
2691 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2692 */
2693};
2694
2695/* Common header for PMTT subtables that follow main table */
2696
2697struct acpi_pmtt_header {
2698 u8 type;
2699 u8 reserved1;
2700 u16 length;
2701 u16 flags;
2702 u16 reserved2;
2703 u32 memory_device_count; /* Zero means no memory device structs follow */
2704 /*
2705 * Immediately followed by:
2706 * u8 type_specific_data[]
2707 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2708 */
2709};
2710
2711/* Values for Type field above */
2712
2713#define ACPI_PMTT_TYPE_SOCKET 0
2714#define ACPI_PMTT_TYPE_CONTROLLER 1
2715#define ACPI_PMTT_TYPE_DIMM 2
2716#define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */
2717#define ACPI_PMTT_TYPE_VENDOR 0xFF
2718
2719/* Values for Flags field above */
2720
2721#define ACPI_PMTT_TOP_LEVEL 0x0001
2722#define ACPI_PMTT_PHYSICAL 0x0002
2723#define ACPI_PMTT_MEMORY_TYPE 0x000C
2724
2725/*
2726 * PMTT subtables, correspond to Type in struct acpi_pmtt_header
2727 */
2728
2729/* 0: Socket Structure */
2730
2731struct acpi_pmtt_socket {
2732 struct acpi_pmtt_header header;
2733 u16 socket_id;
2734 u16 reserved;
2735};
2736 /*
2737 * Immediately followed by:
2738 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2739 */
2740
2741/* 1: Memory Controller subtable */
2742
2743struct acpi_pmtt_controller {
2744 struct acpi_pmtt_header header;
2745 u16 controller_id;
2746 u16 reserved;
2747};
2748 /*
2749 * Immediately followed by:
2750 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2751 */
2752
2753/* 2: Physical Component Identifier (DIMM) */
2754
2755struct acpi_pmtt_physical_component {
2756 struct acpi_pmtt_header header;
2757 u32 bios_handle;
2758};
2759
2760/* 0xFF: Vendor Specific Data */
2761
2762struct acpi_pmtt_vendor_specific {
2763 struct acpi_pmtt_header header;
2764 u8 type_uuid[16];
2765 u8 specific[];
2766 /*
2767 * Immediately followed by:
2768 * u8 vendor_specific_data[];
2769 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2770 */
2771};
2772
2773/*******************************************************************************
2774 *
2775 * PPTT - Processor Properties Topology Table (ACPI 6.2)
2776 * Version 1
2777 *
2778 ******************************************************************************/
2779
2780struct acpi_table_pptt {
2781 struct acpi_table_header header; /* Common ACPI table header */
2782};
2783
2784/* Values for Type field above */
2785
2786enum acpi_pptt_type {
2787 ACPI_PPTT_TYPE_PROCESSOR = 0,
2788 ACPI_PPTT_TYPE_CACHE = 1,
2789 ACPI_PPTT_TYPE_ID = 2,
2790 ACPI_PPTT_TYPE_RESERVED = 3
2791};
2792
2793/* 0: Processor Hierarchy Node Structure */
2794
2795struct acpi_pptt_processor {
2796 struct acpi_subtable_header header;
2797 u16 reserved;
2798 u32 flags;
2799 u32 parent;
2800 u32 acpi_processor_id;
2801 u32 number_of_priv_resources;
2802};
2803
2804/* Flags */
2805
2806#define ACPI_PPTT_PHYSICAL_PACKAGE (1)
2807#define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
2808#define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
2809#define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
2810#define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
2811
2812/* 1: Cache Type Structure */
2813
2814struct acpi_pptt_cache {
2815 struct acpi_subtable_header header;
2816 u16 reserved;
2817 u32 flags;
2818 u32 next_level_of_cache;
2819 u32 size;
2820 u32 number_of_sets;
2821 u8 associativity;
2822 u8 attributes;
2823 u16 line_size;
2824};
2825
2826/* 1: Cache Type Structure for PPTT version 3 */
2827
2828struct acpi_pptt_cache_v1 {
2829 u32 cache_id;
2830};
2831
2832/* Flags */
2833
2834#define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
2835#define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
2836#define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
2837#define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
2838#define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
2839#define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
2840#define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
2841#define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */
2842
2843/* Masks for Attributes */
2844
2845#define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
2846#define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
2847#define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
2848
2849/* Attributes describing cache */
2850#define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
2851#define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
2852#define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
2853#define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
2854
2855#define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
2856#define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
2857#define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
2858#define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
2859
2860#define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
2861#define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
2862
2863/* 2: ID Structure */
2864
2865struct acpi_pptt_id {
2866 struct acpi_subtable_header header;
2867 u16 reserved;
2868 u32 vendor_id;
2869 u64 level1_id;
2870 u64 level2_id;
2871 u16 major_rev;
2872 u16 minor_rev;
2873 u16 spin_rev;
2874};
2875
2876/*******************************************************************************
2877 *
2878 * PRMT - Platform Runtime Mechanism Table
2879 * Version 1
2880 *
2881 ******************************************************************************/
2882
2883struct acpi_table_prmt {
2884 struct acpi_table_header header; /* Common ACPI table header */
2885};
2886
2887struct acpi_table_prmt_header {
2888 u8 platform_guid[16];
2889 u32 module_info_offset;
2890 u32 module_info_count;
2891};
2892
2893struct acpi_prmt_module_header {
2894 u16 revision;
2895 u16 length;
2896};
2897
2898struct acpi_prmt_module_info {
2899 u16 revision;
2900 u16 length;
2901 u8 module_guid[16];
2902 u16 major_rev;
2903 u16 minor_rev;
2904 u16 handler_info_count;
2905 u32 handler_info_offset;
2906 u64 mmio_list_pointer;
2907};
2908
2909struct acpi_prmt_handler_info {
2910 u16 revision;
2911 u16 length;
2912 u8 handler_guid[16];
2913 u64 handler_address;
2914 u64 static_data_buffer_address;
2915 u64 acpi_param_buffer_address;
2916};
2917
2918/*******************************************************************************
2919 *
2920 * RASF - RAS Feature Table (ACPI 5.0)
2921 * Version 1
2922 *
2923 ******************************************************************************/
2924
2925struct acpi_table_rasf {
2926 struct acpi_table_header header; /* Common ACPI table header */
2927 u8 channel_id[12];
2928};
2929
2930/* RASF Platform Communication Channel Shared Memory Region */
2931
2932struct acpi_rasf_shared_memory {
2933 u32 signature;
2934 u16 command;
2935 u16 status;
2936 u16 version;
2937 u8 capabilities[16];
2938 u8 set_capabilities[16];
2939 u16 num_parameter_blocks;
2940 u32 set_capabilities_status;
2941};
2942
2943/* RASF Parameter Block Structure Header */
2944
2945struct acpi_rasf_parameter_block {
2946 u16 type;
2947 u16 version;
2948 u16 length;
2949};
2950
2951/* RASF Parameter Block Structure for PATROL_SCRUB */
2952
2953struct acpi_rasf_patrol_scrub_parameter {
2954 struct acpi_rasf_parameter_block header;
2955 u16 patrol_scrub_command;
2956 u64 requested_address_range[2];
2957 u64 actual_address_range[2];
2958 u16 flags;
2959 u8 requested_speed;
2960};
2961
2962/* Masks for Flags and Speed fields above */
2963
2964#define ACPI_RASF_SCRUBBER_RUNNING 1
2965#define ACPI_RASF_SPEED (7<<1)
2966#define ACPI_RASF_SPEED_SLOW (0<<1)
2967#define ACPI_RASF_SPEED_MEDIUM (4<<1)
2968#define ACPI_RASF_SPEED_FAST (7<<1)
2969
2970/* Channel Commands */
2971
2972enum acpi_rasf_commands {
2973 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
2974};
2975
2976/* Platform RAS Capabilities */
2977
2978enum acpi_rasf_capabiliities {
2979 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
2980 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
2981};
2982
2983/* Patrol Scrub Commands */
2984
2985enum acpi_rasf_patrol_scrub_commands {
2986 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
2987 ACPI_RASF_START_PATROL_SCRUBBER = 2,
2988 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
2989};
2990
2991/* Channel Command flags */
2992
2993#define ACPI_RASF_GENERATE_SCI (1<<15)
2994
2995/* Status values */
2996
2997enum acpi_rasf_status {
2998 ACPI_RASF_SUCCESS = 0,
2999 ACPI_RASF_NOT_VALID = 1,
3000 ACPI_RASF_NOT_SUPPORTED = 2,
3001 ACPI_RASF_BUSY = 3,
3002 ACPI_RASF_FAILED = 4,
3003 ACPI_RASF_ABORTED = 5,
3004 ACPI_RASF_INVALID_DATA = 6
3005};
3006
3007/* Status flags */
3008
3009#define ACPI_RASF_COMMAND_COMPLETE (1)
3010#define ACPI_RASF_SCI_DOORBELL (1<<1)
3011#define ACPI_RASF_ERROR (1<<2)
3012#define ACPI_RASF_STATUS (0x1F<<3)
3013
3014/*******************************************************************************
3015 *
3016 * RAS2 - RAS2 Feature Table (ACPI 6.5)
3017 * Version 1
3018 *
3019 *
3020 ******************************************************************************/
3021
3022struct acpi_table_ras2 {
3023 struct acpi_table_header header; /* Common ACPI table header */
3024 u16 reserved;
3025 u16 num_pcc_descs;
3026};
3027
3028/* RAS2 Platform Communication Channel Descriptor */
3029
3030struct acpi_ras2_pcc_desc {
3031 u8 channel_id;
3032 u16 reserved;
3033 u8 feature_type;
3034 u32 instance;
3035};
3036
3037/* RAS2 Platform Communication Channel Shared Memory Region */
3038
3039struct acpi_ras2_shmem {
3040 u32 signature;
3041 u16 command;
3042 u16 status;
3043 u16 version;
3044 u8 features[16];
3045 u8 set_caps[16];
3046 u16 num_param_blks;
3047 u32 set_caps_status;
3048};
3049
3050/* RAS2 Parameter Block Structure for PATROL_SCRUB */
3051
3052struct acpi_ras2_parameter_block {
3053 u16 type;
3054 u16 version;
3055 u16 length;
3056};
3057
3058/* RAS2 Parameter Block Structure for PATROL_SCRUB */
3059
3060struct acpi_ras2_patrol_scrub_param {
3061 struct acpi_ras2_parameter_block header;
3062 u16 command;
3063 u64 req_addr_range[2];
3064 u64 actl_addr_range[2];
3065 u32 flags;
3066 u32 scrub_params_out;
3067 u32 scrub_params_in;
3068};
3069
3070/* Masks for Flags field above */
3071
3072#define ACPI_RAS2_SCRUBBER_RUNNING 1
3073
3074/* RAS2 Parameter Block Structure for LA2PA_TRANSLATION */
3075
3076struct acpi_ras2_la2pa_translation_parameter {
3077 struct acpi_ras2_parameter_block header;
3078 u16 addr_translation_command;
3079 u64 sub_inst_id;
3080 u64 logical_address;
3081 u64 physical_address;
3082 u32 status;
3083};
3084
3085/* Channel Commands */
3086
3087enum acpi_ras2_commands {
3088 ACPI_RAS2_EXECUTE_RAS2_COMMAND = 1
3089};
3090
3091/* Platform RAS2 Features */
3092
3093enum acpi_ras2_features {
3094 ACPI_RAS2_PATROL_SCRUB_SUPPORTED = 0,
3095 ACPI_RAS2_LA2PA_TRANSLATION = 1
3096};
3097
3098/* RAS2 Patrol Scrub Commands */
3099
3100enum acpi_ras2_patrol_scrub_commands {
3101 ACPI_RAS2_GET_PATROL_PARAMETERS = 1,
3102 ACPI_RAS2_START_PATROL_SCRUBBER = 2,
3103 ACPI_RAS2_STOP_PATROL_SCRUBBER = 3
3104};
3105
3106/* RAS2 LA2PA Translation Commands */
3107
3108enum acpi_ras2_la2_pa_translation_commands {
3109 ACPI_RAS2_GET_LA2PA_TRANSLATION = 1,
3110};
3111
3112/* RAS2 LA2PA Translation Status values */
3113
3114enum acpi_ras2_la2_pa_translation_status {
3115 ACPI_RAS2_LA2PA_TRANSLATION_SUCCESS = 0,
3116 ACPI_RAS2_LA2PA_TRANSLATION_FAIL = 1,
3117};
3118
3119/* Channel Command flags */
3120
3121#define ACPI_RAS2_GENERATE_SCI (1<<15)
3122
3123/* Status values */
3124
3125enum acpi_ras2_status {
3126 ACPI_RAS2_SUCCESS = 0,
3127 ACPI_RAS2_NOT_VALID = 1,
3128 ACPI_RAS2_NOT_SUPPORTED = 2,
3129 ACPI_RAS2_BUSY = 3,
3130 ACPI_RAS2_FAILED = 4,
3131 ACPI_RAS2_ABORTED = 5,
3132 ACPI_RAS2_INVALID_DATA = 6
3133};
3134
3135/* Status flags */
3136
3137#define ACPI_RAS2_COMMAND_COMPLETE (1)
3138#define ACPI_RAS2_SCI_DOORBELL (1<<1)
3139#define ACPI_RAS2_ERROR (1<<2)
3140#define ACPI_RAS2_STATUS (0x1F<<3)
3141
3142/*******************************************************************************
3143 *
3144 * RGRT - Regulatory Graphics Resource Table
3145 * Version 1
3146 *
3147 * Conforms to "ACPI RGRT" available at:
3148 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/
3149 *
3150 ******************************************************************************/
3151
3152struct acpi_table_rgrt {
3153 struct acpi_table_header header; /* Common ACPI table header */
3154 u16 version;
3155 u8 image_type;
3156 u8 reserved;
3157 u8 image[];
3158};
3159
3160/* image_type values */
3161
3162enum acpi_rgrt_image_type {
3163 ACPI_RGRT_TYPE_RESERVED0 = 0,
3164 ACPI_RGRT_IMAGE_TYPE_PNG = 1,
3165 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
3166};
3167
3168/*******************************************************************************
3169 *
3170 * RHCT - RISC-V Hart Capabilities Table
3171 * Version 1
3172 *
3173 ******************************************************************************/
3174
3175struct acpi_table_rhct {
3176 struct acpi_table_header header; /* Common ACPI table header */
3177 u32 flags; /* RHCT flags */
3178 u64 time_base_freq;
3179 u32 node_count;
3180 u32 node_offset;
3181};
3182
3183/* RHCT Flags */
3184
3185#define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU (1)
3186/*
3187 * RHCT subtables
3188 */
3189struct acpi_rhct_node_header {
3190 u16 type;
3191 u16 length;
3192 u16 revision;
3193};
3194
3195/* Values for RHCT subtable Type above */
3196
3197enum acpi_rhct_node_type {
3198 ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000,
3199 ACPI_RHCT_NODE_TYPE_CMO = 0x0001,
3200 ACPI_RHCT_NODE_TYPE_MMU = 0x0002,
3201 ACPI_RHCT_NODE_TYPE_RESERVED = 0x0003,
3202 ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF,
3203};
3204
3205/*
3206 * RHCT node specific subtables
3207 */
3208
3209/* ISA string node structure */
3210struct acpi_rhct_isa_string {
3211 u16 isa_length;
3212 char isa[];
3213};
3214
3215struct acpi_rhct_cmo_node {
3216 u8 reserved; /* Must be zero */
3217 u8 cbom_size; /* CBOM size in powerof 2 */
3218 u8 cbop_size; /* CBOP size in powerof 2 */
3219 u8 cboz_size; /* CBOZ size in powerof 2 */
3220};
3221
3222struct acpi_rhct_mmu_node {
3223 u8 reserved; /* Must be zero */
3224 u8 mmu_type; /* Virtual Address Scheme */
3225};
3226
3227enum acpi_rhct_mmu_type {
3228 ACPI_RHCT_MMU_TYPE_SV39 = 0,
3229 ACPI_RHCT_MMU_TYPE_SV48 = 1,
3230 ACPI_RHCT_MMU_TYPE_SV57 = 2
3231};
3232
3233/* Hart Info node structure */
3234struct acpi_rhct_hart_info {
3235 u16 num_offsets;
3236 u32 uid; /* ACPI processor UID */
3237};
3238
3239/*******************************************************************************
3240 *
3241 * RIMT - RISC-V IO Remapping Table
3242 *
3243 * https://github.com/riscv-non-isa/riscv-acpi-rimt
3244 *
3245 ******************************************************************************/
3246
3247struct acpi_table_rimt {
3248 struct acpi_table_header header; /* Common ACPI table header */
3249 u32 num_nodes; /* Number of RIMT Nodes */
3250 u32 node_offset; /* Offset to RIMT Node Array */
3251 u32 reserved;
3252};
3253
3254struct acpi_rimt_node {
3255 u8 type;
3256 u8 revision;
3257 u16 length;
3258 u16 reserved;
3259 u16 id;
3260 char node_data[];
3261};
3262
3263enum acpi_rimt_node_type {
3264 ACPI_RIMT_NODE_TYPE_IOMMU = 0x0,
3265 ACPI_RIMT_NODE_TYPE_PCIE_ROOT_COMPLEX = 0x1,
3266 ACPI_RIMT_NODE_TYPE_PLAT_DEVICE = 0x2,
3267};
3268
3269struct acpi_rimt_iommu {
3270 u8 hardware_id[8]; /* Hardware ID */
3271 u64 base_address; /* Base Address */
3272 u32 flags; /* Flags */
3273 u32 proximity_domain; /* Proximity Domain */
3274 u16 pcie_segment_number; /* PCIe Segment number */
3275 u16 pcie_bdf; /* PCIe B/D/F */
3276 u16 num_interrupt_wires; /* Number of interrupt wires */
3277 u16 interrupt_wire_offset; /* Interrupt wire array offset */
3278 u64 interrupt_wire[]; /* Interrupt wire array */
3279};
3280
3281/* IOMMU Node Flags */
3282#define ACPI_RIMT_IOMMU_FLAGS_PCIE (1)
3283#define ACPI_RIMT_IOMMU_FLAGS_PXM_VALID (1 << 1)
3284
3285/* Interrupt Wire Structure */
3286struct acpi_rimt_iommu_wire_gsi {
3287 u32 irq_num; /* Interrupt Number */
3288 u32 flags; /* Flags */
3289};
3290
3291/* Interrupt Wire Flags */
3292#define ACPI_RIMT_GSI_LEVEL_TRIGGERRED (1)
3293#define ACPI_RIMT_GSI_ACTIVE_HIGH (1 << 1)
3294
3295struct acpi_rimt_id_mapping {
3296 u32 source_id_base; /* Source ID Base */
3297 u32 num_ids; /* Number of IDs */
3298 u32 dest_id_base; /* Destination Device ID Base */
3299 u32 dest_offset; /* Destination IOMMU Offset */
3300 u32 flags; /* Flags */
3301};
3302
3303struct acpi_rimt_pcie_rc {
3304 u32 flags; /* Flags */
3305 u16 reserved; /* Reserved */
3306 u16 pcie_segment_number; /* PCIe Segment number */
3307 u16 id_mapping_offset; /* ID mapping array offset */
3308 u16 num_id_mappings; /* Number of ID mappings */
3309};
3310
3311/* PCIe Root Complex Node Flags */
3312#define ACPI_RIMT_PCIE_ATS_SUPPORTED (1)
3313#define ACPI_RIMT_PCIE_PRI_SUPPORTED (1 << 1)
3314
3315struct acpi_rimt_platform_device {
3316 u16 id_mapping_offset; /* ID Mapping array offset */
3317 u16 num_id_mappings; /* Number of ID mappings */
3318 char device_name[]; /* Device Object Name */
3319};
3320
3321/*******************************************************************************
3322 *
3323 * SBST - Smart Battery Specification Table
3324 * Version 1
3325 *
3326 ******************************************************************************/
3327
3328struct acpi_table_sbst {
3329 struct acpi_table_header header; /* Common ACPI table header */
3330 u32 warning_level;
3331 u32 low_level;
3332 u32 critical_level;
3333};
3334
3335/*******************************************************************************
3336 *
3337 * SDEI - Software Delegated Exception Interface Descriptor Table
3338 *
3339 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
3340 * May 8th, 2017. Copyright 2017 ARM Ltd.
3341 *
3342 ******************************************************************************/
3343
3344struct acpi_table_sdei {
3345 struct acpi_table_header header; /* Common ACPI table header */
3346};
3347
3348/*******************************************************************************
3349 *
3350 * SDEV - Secure Devices Table (ACPI 6.2)
3351 * Version 1
3352 *
3353 ******************************************************************************/
3354
3355struct acpi_table_sdev {
3356 struct acpi_table_header header; /* Common ACPI table header */
3357};
3358
3359struct acpi_sdev_header {
3360 u8 type;
3361 u8 flags;
3362 u16 length;
3363};
3364
3365/* Values for subtable type above */
3366
3367enum acpi_sdev_type {
3368 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
3369 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
3370 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
3371};
3372
3373/* Values for flags above */
3374
3375#define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
3376#define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1)
3377
3378/*
3379 * SDEV subtables
3380 */
3381
3382/* 0: Namespace Device Based Secure Device Structure */
3383
3384struct acpi_sdev_namespace {
3385 struct acpi_sdev_header header;
3386 u16 device_id_offset;
3387 u16 device_id_length;
3388 u16 vendor_data_offset;
3389 u16 vendor_data_length;
3390};
3391
3392struct acpi_sdev_secure_component {
3393 u16 secure_component_offset;
3394 u16 secure_component_length;
3395};
3396
3397/*
3398 * SDEV sub-subtables ("Components") for above
3399 */
3400struct acpi_sdev_component {
3401 struct acpi_sdev_header header;
3402};
3403
3404/* Values for sub-subtable type above */
3405
3406enum acpi_sac_type {
3407 ACPI_SDEV_TYPE_ID_COMPONENT = 0,
3408 ACPI_SDEV_TYPE_MEM_COMPONENT = 1
3409};
3410
3411struct acpi_sdev_id_component {
3412 struct acpi_sdev_header header;
3413 u16 hardware_id_offset;
3414 u16 hardware_id_length;
3415 u16 subsystem_id_offset;
3416 u16 subsystem_id_length;
3417 u16 hardware_revision;
3418 u8 hardware_rev_present;
3419 u8 class_code_present;
3420 u8 pci_base_class;
3421 u8 pci_sub_class;
3422 u8 pci_programming_xface;
3423};
3424
3425struct acpi_sdev_mem_component {
3426 struct acpi_sdev_header header;
3427 u32 reserved;
3428 u64 memory_base_address;
3429 u64 memory_length;
3430};
3431
3432/* 1: PCIe Endpoint Device Based Device Structure */
3433
3434struct acpi_sdev_pcie {
3435 struct acpi_sdev_header header;
3436 u16 segment;
3437 u16 start_bus;
3438 u16 path_offset;
3439 u16 path_length;
3440 u16 vendor_data_offset;
3441 u16 vendor_data_length;
3442};
3443
3444/* 1a: PCIe Endpoint path entry */
3445
3446struct acpi_sdev_pcie_path {
3447 u8 device;
3448 u8 function;
3449};
3450
3451/*******************************************************************************
3452 *
3453 * SVKL - Storage Volume Key Location Table (ACPI 6.4)
3454 * From: "Guest-Host-Communication Interface (GHCI) for Intel
3455 * Trust Domain Extensions (Intel TDX)".
3456 * Version 1
3457 *
3458 ******************************************************************************/
3459
3460struct acpi_table_svkl {
3461 struct acpi_table_header header; /* Common ACPI table header */
3462 u32 count;
3463};
3464
3465struct acpi_svkl_key {
3466 u16 type;
3467 u16 format;
3468 u32 size;
3469 u64 address;
3470};
3471
3472enum acpi_svkl_type {
3473 ACPI_SVKL_TYPE_MAIN_STORAGE = 0,
3474 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */
3475};
3476
3477enum acpi_svkl_format {
3478 ACPI_SVKL_FORMAT_RAW_BINARY = 0,
3479 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */
3480};
3481
3482/*******************************************************************************
3483 * SWFT - SoundWire File Table
3484 *
3485 * Conforms to "Discovery and Configuration (DisCo) Specification for SoundWire"
3486 * Version 2.1, 2 October 2023
3487 *
3488 ******************************************************************************/
3489struct acpi_sw_file {
3490 u16 vendor_id;
3491 u32 file_id;
3492 u16 file_version;
3493 u32 file_length;
3494 u8 data[];
3495};
3496
3497struct acpi_table_swft {
3498 struct acpi_table_header header;
3499 struct acpi_sw_file files[];
3500};
3501
3502/*******************************************************************************
3503 *
3504 * TDEL - TD-Event Log
3505 * From: "Guest-Host-Communication Interface (GHCI) for Intel
3506 * Trust Domain Extensions (Intel TDX)".
3507 * September 2020
3508 *
3509 ******************************************************************************/
3510
3511struct acpi_table_tdel {
3512 struct acpi_table_header header; /* Common ACPI table header */
3513 u32 reserved;
3514 u64 log_area_minimum_length;
3515 u64 log_area_start_address;
3516};
3517
3518/* Reset to default packing */
3519
3520#pragma pack()
3521
3522#endif /* __ACTBL2_H__ */
3523