| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ | 
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| 2 | /* | 
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| 3 | * libnvdimm - Non-volatile-memory Devices Subsystem | 
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| 4 | * | 
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| 5 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | 
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| 6 | */ | 
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| 7 | #ifndef __LIBNVDIMM_H__ | 
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| 8 | #define __LIBNVDIMM_H__ | 
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| 9 |  | 
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| 10 | #include <linux/io.h> | 
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| 11 | #include <linux/sizes.h> | 
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| 12 | #include <linux/spinlock.h> | 
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| 13 | #include <linux/types.h> | 
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| 14 | #include <linux/uuid.h> | 
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| 15 |  | 
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| 16 | struct badrange_entry { | 
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| 17 | u64 start; | 
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| 18 | u64 length; | 
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| 19 | struct list_head list; | 
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| 20 | }; | 
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| 21 |  | 
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| 22 | struct badrange { | 
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| 23 | struct list_head list; | 
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| 24 | spinlock_t lock; | 
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| 25 | }; | 
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| 26 |  | 
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| 27 | enum { | 
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| 28 | /* unarmed memory devices may not persist writes */ | 
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| 29 | NDD_UNARMED = 1, | 
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| 30 | /* locked memory devices should not be accessed */ | 
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| 31 | NDD_LOCKED = 2, | 
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| 32 | /* memory under security wipes should not be accessed */ | 
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| 33 | NDD_SECURITY_OVERWRITE = 3, | 
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| 34 | /*  tracking whether or not there is a pending device reference */ | 
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| 35 | NDD_WORK_PENDING = 4, | 
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| 36 | /* dimm supports namespace labels */ | 
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| 37 | NDD_LABELING = 6, | 
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| 38 | /* | 
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| 39 | * dimm contents have changed requiring invalidation of CPU caches prior | 
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| 40 | * to activation of a region that includes this device | 
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| 41 | */ | 
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| 42 | NDD_INCOHERENT = 7, | 
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| 43 |  | 
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| 44 | /* dimm provider wants synchronous registration by __nvdimm_create() */ | 
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| 45 | NDD_REGISTER_SYNC = 8, | 
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| 46 |  | 
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| 47 | /* need to set a limit somewhere, but yes, this is likely overkill */ | 
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| 48 | ND_IOCTL_MAX_BUFLEN = SZ_4M, | 
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| 49 | ND_CMD_MAX_ELEM = 5, | 
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| 50 | ND_CMD_MAX_ENVELOPE = 256, | 
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| 51 | ND_MAX_MAPPINGS = 32, | 
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| 52 |  | 
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| 53 | /* region flag indicating to direct-map persistent memory by default */ | 
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| 54 | ND_REGION_PAGEMAP = 0, | 
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| 55 | /* | 
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| 56 | * Platform ensures entire CPU store data path is flushed to pmem on | 
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| 57 | * system power loss. | 
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| 58 | */ | 
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| 59 | ND_REGION_PERSIST_CACHE = 1, | 
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| 60 | /* | 
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| 61 | * Platform provides mechanisms to automatically flush outstanding | 
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| 62 | * write data from memory controler to pmem on system power loss. | 
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| 63 | * (ADR) | 
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| 64 | */ | 
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| 65 | ND_REGION_PERSIST_MEMCTRL = 2, | 
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| 66 |  | 
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| 67 | /* Platform provides asynchronous flush mechanism */ | 
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| 68 | ND_REGION_ASYNC = 3, | 
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| 69 |  | 
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| 70 | /* Region was created by CXL subsystem */ | 
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| 71 | ND_REGION_CXL = 4, | 
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| 72 |  | 
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| 73 | /* mark newly adjusted resources as requiring a label update */ | 
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| 74 | DPA_RESOURCE_ADJUSTED = 1 << 0, | 
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| 75 | }; | 
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| 76 |  | 
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| 77 | struct nvdimm; | 
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| 78 | struct nvdimm_bus_descriptor; | 
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| 79 | typedef int (*ndctl_fn)(struct nvdimm_bus_descriptor *nd_desc, | 
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| 80 | struct nvdimm *nvdimm, unsigned int cmd, void *buf, | 
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| 81 | unsigned int buf_len, int *cmd_rc); | 
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| 82 |  | 
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| 83 | struct attribute_group; | 
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| 84 | struct device_node; | 
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| 85 | struct module; | 
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| 86 | struct nvdimm_bus_descriptor { | 
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| 87 | const struct attribute_group **attr_groups; | 
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| 88 | unsigned long cmd_mask; | 
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| 89 | unsigned long dimm_family_mask; | 
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| 90 | unsigned long bus_family_mask; | 
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| 91 | struct module *module; | 
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| 92 | char *provider_name; | 
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| 93 | struct device_node *of_node; | 
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| 94 | ndctl_fn ndctl; | 
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| 95 | int (*flush_probe)(struct nvdimm_bus_descriptor *nd_desc); | 
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| 96 | int (*clear_to_send)(struct nvdimm_bus_descriptor *nd_desc, | 
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| 97 | struct nvdimm *nvdimm, unsigned int cmd, void *data); | 
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| 98 | const struct nvdimm_bus_fw_ops *fw_ops; | 
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| 99 | }; | 
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| 100 |  | 
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| 101 | struct nd_cmd_desc { | 
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| 102 | int in_num; | 
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| 103 | int out_num; | 
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| 104 | u32 in_sizes[ND_CMD_MAX_ELEM]; | 
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| 105 | int out_sizes[ND_CMD_MAX_ELEM]; | 
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| 106 | }; | 
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| 107 |  | 
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| 108 | struct nd_interleave_set { | 
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| 109 | /* v1.1 definition of the interleave-set-cookie algorithm */ | 
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| 110 | u64 cookie1; | 
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| 111 | /* v1.2 definition of the interleave-set-cookie algorithm */ | 
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| 112 | u64 cookie2; | 
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| 113 | /* compatibility with initial buggy Linux implementation */ | 
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| 114 | u64 altcookie; | 
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| 115 |  | 
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| 116 | guid_t type_guid; | 
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| 117 | }; | 
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| 118 |  | 
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| 119 | struct nd_mapping_desc { | 
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| 120 | struct nvdimm *nvdimm; | 
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| 121 | u64 start; | 
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| 122 | u64 size; | 
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| 123 | int position; | 
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| 124 | }; | 
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| 125 |  | 
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| 126 | struct bio; | 
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| 127 | struct resource; | 
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| 128 | struct nd_region; | 
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| 129 | struct nd_region_desc { | 
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| 130 | struct resource *res; | 
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| 131 | struct nd_mapping_desc *mapping; | 
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| 132 | u16 num_mappings; | 
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| 133 | const struct attribute_group **attr_groups; | 
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| 134 | struct nd_interleave_set *nd_set; | 
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| 135 | void *provider_data; | 
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| 136 | int num_lanes; | 
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| 137 | int numa_node; | 
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| 138 | int target_node; | 
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| 139 | unsigned long flags; | 
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| 140 | int memregion; | 
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| 141 | struct device_node *of_node; | 
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| 142 | int (*flush)(struct nd_region *nd_region, struct bio *bio); | 
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| 143 | }; | 
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| 144 |  | 
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| 145 | struct device; | 
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| 146 | void *devm_nvdimm_memremap(struct device *dev, resource_size_t offset, | 
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| 147 | size_t size, unsigned long flags); | 
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| 148 | static inline void __iomem *devm_nvdimm_ioremap(struct device *dev, | 
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| 149 | resource_size_t offset, size_t size) | 
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| 150 | { | 
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| 151 | return (void __iomem *) devm_nvdimm_memremap(dev, offset, size, flags: 0); | 
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| 152 | } | 
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| 153 |  | 
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| 154 | /* | 
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| 155 | * Note that separate bits for locked + unlocked are defined so that | 
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| 156 | * 'flags == 0' corresponds to an error / not-supported state. | 
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| 157 | */ | 
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| 158 | enum nvdimm_security_bits { | 
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| 159 | NVDIMM_SECURITY_DISABLED, | 
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| 160 | NVDIMM_SECURITY_UNLOCKED, | 
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| 161 | NVDIMM_SECURITY_LOCKED, | 
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| 162 | NVDIMM_SECURITY_FROZEN, | 
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| 163 | NVDIMM_SECURITY_OVERWRITE, | 
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| 164 | }; | 
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| 165 |  | 
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| 166 | #define NVDIMM_PASSPHRASE_LEN		32 | 
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| 167 | #define NVDIMM_KEY_DESC_LEN		22 | 
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| 168 |  | 
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| 169 | struct nvdimm_key_data { | 
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| 170 | u8 data[NVDIMM_PASSPHRASE_LEN]; | 
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| 171 | }; | 
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| 172 |  | 
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| 173 | enum nvdimm_passphrase_type { | 
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| 174 | NVDIMM_USER, | 
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| 175 | NVDIMM_MASTER, | 
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| 176 | }; | 
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| 177 |  | 
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| 178 | struct nvdimm_security_ops { | 
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| 179 | unsigned long (*get_flags)(struct nvdimm *nvdimm, | 
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| 180 | enum nvdimm_passphrase_type pass_type); | 
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| 181 | int (*freeze)(struct nvdimm *nvdimm); | 
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| 182 | int (*change_key)(struct nvdimm *nvdimm, | 
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| 183 | const struct nvdimm_key_data *old_data, | 
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| 184 | const struct nvdimm_key_data *new_data, | 
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| 185 | enum nvdimm_passphrase_type pass_type); | 
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| 186 | int (*unlock)(struct nvdimm *nvdimm, | 
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| 187 | const struct nvdimm_key_data *key_data); | 
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| 188 | int (*disable)(struct nvdimm *nvdimm, | 
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| 189 | const struct nvdimm_key_data *key_data); | 
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| 190 | int (*erase)(struct nvdimm *nvdimm, | 
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| 191 | const struct nvdimm_key_data *key_data, | 
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| 192 | enum nvdimm_passphrase_type pass_type); | 
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| 193 | int (*overwrite)(struct nvdimm *nvdimm, | 
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| 194 | const struct nvdimm_key_data *key_data); | 
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| 195 | int (*query_overwrite)(struct nvdimm *nvdimm); | 
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| 196 | int (*disable_master)(struct nvdimm *nvdimm, | 
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| 197 | const struct nvdimm_key_data *key_data); | 
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| 198 | }; | 
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| 199 |  | 
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| 200 | enum nvdimm_fwa_state { | 
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| 201 | NVDIMM_FWA_INVALID, | 
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| 202 | NVDIMM_FWA_IDLE, | 
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| 203 | NVDIMM_FWA_ARMED, | 
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| 204 | NVDIMM_FWA_BUSY, | 
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| 205 | NVDIMM_FWA_ARM_OVERFLOW, | 
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| 206 | }; | 
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| 207 |  | 
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| 208 | enum nvdimm_fwa_trigger { | 
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| 209 | NVDIMM_FWA_ARM, | 
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| 210 | NVDIMM_FWA_DISARM, | 
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| 211 | }; | 
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| 212 |  | 
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| 213 | enum nvdimm_fwa_capability { | 
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| 214 | NVDIMM_FWA_CAP_INVALID, | 
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| 215 | NVDIMM_FWA_CAP_NONE, | 
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| 216 | NVDIMM_FWA_CAP_QUIESCE, | 
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| 217 | NVDIMM_FWA_CAP_LIVE, | 
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| 218 | }; | 
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| 219 |  | 
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| 220 | enum nvdimm_fwa_result { | 
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| 221 | NVDIMM_FWA_RESULT_INVALID, | 
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| 222 | NVDIMM_FWA_RESULT_NONE, | 
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| 223 | NVDIMM_FWA_RESULT_SUCCESS, | 
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| 224 | NVDIMM_FWA_RESULT_NOTSTAGED, | 
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| 225 | NVDIMM_FWA_RESULT_NEEDRESET, | 
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| 226 | NVDIMM_FWA_RESULT_FAIL, | 
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| 227 | }; | 
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| 228 |  | 
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| 229 | struct nvdimm_bus_fw_ops { | 
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| 230 | enum nvdimm_fwa_state (*activate_state) | 
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| 231 | (struct nvdimm_bus_descriptor *nd_desc); | 
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| 232 | enum nvdimm_fwa_capability (*capability) | 
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| 233 | (struct nvdimm_bus_descriptor *nd_desc); | 
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| 234 | int (*activate)(struct nvdimm_bus_descriptor *nd_desc); | 
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| 235 | }; | 
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| 236 |  | 
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| 237 | struct nvdimm_fw_ops { | 
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| 238 | enum nvdimm_fwa_state (*activate_state)(struct nvdimm *nvdimm); | 
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| 239 | enum nvdimm_fwa_result (*activate_result)(struct nvdimm *nvdimm); | 
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| 240 | int (*arm)(struct nvdimm *nvdimm, enum nvdimm_fwa_trigger arg); | 
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| 241 | }; | 
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| 242 |  | 
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| 243 | struct kobject; | 
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| 244 | struct nvdimm_bus; | 
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| 245 |  | 
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| 246 | void badrange_init(struct badrange *badrange); | 
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| 247 | int badrange_add(struct badrange *badrange, u64 addr, u64 length); | 
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| 248 | void badrange_forget(struct badrange *badrange, phys_addr_t start, | 
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| 249 | unsigned int len); | 
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| 250 | int nvdimm_bus_add_badrange(struct nvdimm_bus *nvdimm_bus, u64 addr, | 
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| 251 | u64 length); | 
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| 252 | struct nvdimm_bus *nvdimm_bus_register(struct device *parent, | 
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| 253 | struct nvdimm_bus_descriptor *nfit_desc); | 
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| 254 | void nvdimm_bus_unregister(struct nvdimm_bus *nvdimm_bus); | 
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| 255 | struct nvdimm_bus *to_nvdimm_bus(struct device *dev); | 
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| 256 | struct nvdimm_bus *nvdimm_to_bus(struct nvdimm *nvdimm); | 
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| 257 | struct nvdimm *to_nvdimm(struct device *dev); | 
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| 258 | struct nd_region *to_nd_region(struct device *dev); | 
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| 259 | struct device *nd_region_dev(struct nd_region *nd_region); | 
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| 260 | struct nvdimm_bus_descriptor *to_nd_desc(struct nvdimm_bus *nvdimm_bus); | 
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| 261 | struct device *to_nvdimm_bus_dev(struct nvdimm_bus *nvdimm_bus); | 
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| 262 | const char *nvdimm_name(struct nvdimm *nvdimm); | 
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| 263 | struct kobject *nvdimm_kobj(struct nvdimm *nvdimm); | 
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| 264 | unsigned long nvdimm_cmd_mask(struct nvdimm *nvdimm); | 
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| 265 | void *nvdimm_provider_data(struct nvdimm *nvdimm); | 
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| 266 | struct nvdimm *__nvdimm_create(struct nvdimm_bus *nvdimm_bus, | 
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| 267 | void *provider_data, const struct attribute_group **groups, | 
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| 268 | unsigned long flags, unsigned long cmd_mask, int num_flush, | 
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| 269 | struct resource *flush_wpq, const char *dimm_id, | 
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| 270 | const struct nvdimm_security_ops *sec_ops, | 
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| 271 | const struct nvdimm_fw_ops *fw_ops); | 
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| 272 | static inline struct nvdimm *nvdimm_create(struct nvdimm_bus *nvdimm_bus, | 
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| 273 | void *provider_data, const struct attribute_group **groups, | 
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| 274 | unsigned long flags, unsigned long cmd_mask, int num_flush, | 
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| 275 | struct resource *flush_wpq) | 
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| 276 | { | 
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| 277 | return __nvdimm_create(nvdimm_bus, provider_data, groups, flags, | 
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| 278 | cmd_mask, num_flush, flush_wpq, NULL, NULL, NULL); | 
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| 279 | } | 
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| 280 | void nvdimm_delete(struct nvdimm *nvdimm); | 
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| 281 | void nvdimm_region_delete(struct nd_region *nd_region); | 
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| 282 |  | 
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| 283 | const struct nd_cmd_desc *nd_cmd_dimm_desc(int cmd); | 
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| 284 | const struct nd_cmd_desc *nd_cmd_bus_desc(int cmd); | 
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| 285 | u32 nd_cmd_in_size(struct nvdimm *nvdimm, int cmd, | 
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| 286 | const struct nd_cmd_desc *desc, int idx, void *buf); | 
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| 287 | u32 nd_cmd_out_size(struct nvdimm *nvdimm, int cmd, | 
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| 288 | const struct nd_cmd_desc *desc, int idx, const u32 *in_field, | 
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| 289 | const u32 *out_field, unsigned long remainder); | 
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| 290 | int nvdimm_bus_check_dimm_count(struct nvdimm_bus *nvdimm_bus, int dimm_count); | 
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| 291 | struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus, | 
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| 292 | struct nd_region_desc *ndr_desc); | 
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| 293 | struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus, | 
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| 294 | struct nd_region_desc *ndr_desc); | 
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| 295 | struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus, | 
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| 296 | struct nd_region_desc *ndr_desc); | 
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| 297 | void *nd_region_provider_data(struct nd_region *nd_region); | 
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| 298 | unsigned int nd_region_acquire_lane(struct nd_region *nd_region); | 
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| 299 | void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane); | 
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| 300 | u64 nd_fletcher64(void *addr, size_t len, bool le); | 
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| 301 | int nvdimm_flush(struct nd_region *nd_region, struct bio *bio); | 
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| 302 | int generic_nvdimm_flush(struct nd_region *nd_region); | 
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| 303 | int nvdimm_has_flush(struct nd_region *nd_region); | 
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| 304 | int nvdimm_has_cache(struct nd_region *nd_region); | 
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| 305 | int nvdimm_in_overwrite(struct nvdimm *nvdimm); | 
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| 306 | bool is_nvdimm_sync(struct nd_region *nd_region); | 
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| 307 |  | 
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| 308 | static inline int nvdimm_ctl(struct nvdimm *nvdimm, unsigned int cmd, void *buf, | 
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| 309 | unsigned int buf_len, int *cmd_rc) | 
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| 310 | { | 
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| 311 | struct nvdimm_bus *nvdimm_bus = nvdimm_to_bus(nvdimm); | 
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| 312 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | 
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| 313 |  | 
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| 314 | return nd_desc->ndctl(nd_desc, nvdimm, cmd, buf, buf_len, cmd_rc); | 
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| 315 | } | 
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| 316 |  | 
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| 317 | #ifdef CONFIG_ARCH_HAS_PMEM_API | 
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| 318 | #define ARCH_MEMREMAP_PMEM MEMREMAP_WB | 
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| 319 | void arch_wb_cache_pmem(void *addr, size_t size); | 
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| 320 | void arch_invalidate_pmem(void *addr, size_t size); | 
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| 321 | #else | 
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| 322 | #define ARCH_MEMREMAP_PMEM MEMREMAP_WT | 
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| 323 | static inline void arch_wb_cache_pmem(void *addr, size_t size) | 
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| 324 | { | 
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| 325 | } | 
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| 326 | static inline void arch_invalidate_pmem(void *addr, size_t size) | 
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| 327 | { | 
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| 328 | } | 
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| 329 | #endif | 
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| 330 |  | 
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| 331 | #endif /* __LIBNVDIMM_H__ */ | 
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| 332 |  | 
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