1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Framework and drivers for configuring and reading different PHYs
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 */
10
11#ifndef __PHY_H
12#define __PHY_H
13
14#include <linux/compiler.h>
15#include <linux/spinlock.h>
16#include <linux/ethtool.h>
17#include <linux/leds.h>
18#include <linux/linkmode.h>
19#include <linux/netlink.h>
20#include <linux/mdio.h>
21#include <linux/mii.h>
22#include <linux/mii_timestamper.h>
23#include <linux/module.h>
24#include <linux/timer.h>
25#include <linux/workqueue.h>
26#include <linux/mod_devicetable.h>
27#include <linux/u64_stats_sync.h>
28#include <linux/irqreturn.h>
29#include <linux/iopoll.h>
30#include <linux/refcount.h>
31
32#include <linux/atomic.h>
33#include <net/eee.h>
34
35extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
36extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
37extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init;
38extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
39extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
40extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
41extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init;
42extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap2_features) __ro_after_init;
43
44#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
45#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
46#define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features)
47#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
48#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
49#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
50#define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features)
51#define PHY_EEE_CAP2_FEATURES ((unsigned long *)&phy_eee_cap2_features)
52
53extern const int phy_basic_ports_array[3];
54
55/*
56 * Set phydev->irq to PHY_POLL if interrupts are not supported,
57 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if
58 * the attached MAC driver handles the interrupt
59 */
60#define PHY_POLL -1
61#define PHY_MAC_INTERRUPT -2
62
63#define PHY_IS_INTERNAL 0x00000001
64#define PHY_RST_AFTER_CLK_EN 0x00000002
65#define PHY_POLL_CABLE_TEST 0x00000004
66#define PHY_ALWAYS_CALL_SUSPEND 0x00000008
67#define MDIO_DEVICE_IS_PHY 0x80000000
68
69/**
70 * enum phy_interface_t - Interface Mode definitions
71 *
72 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
73 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
74 * @PHY_INTERFACE_MODE_MII: Media-independent interface
75 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface
76 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
77 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
78 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
79 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
80 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role
81 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
82 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
83 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
84 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal TX delay
85 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI
86 * @PHY_INTERFACE_MODE_SMII: Serial MII
87 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
88 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
89 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
90 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII
91 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
92 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
93 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX
94 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
95 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
96 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR
97 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
98 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface
99 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR
100 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR
101 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII
102 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
103 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII
104 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN
105 * @PHY_INTERFACE_MODE_10G_QXGMII: 10G-QXGMII - 4 ports over 10G USXGMII
106 * @PHY_INTERFACE_MODE_50GBASER: 50GBase-R - with Clause 134 FEC
107 * @PHY_INTERFACE_MODE_LAUI: 50 Gigabit Attachment Unit Interface
108 * @PHY_INTERFACE_MODE_100GBASEP: 100GBase-P - with Clause 134 FEC
109 * @PHY_INTERFACE_MODE_MIILITE: MII-Lite - MII without RXER TXER CRS COL
110 * @PHY_INTERFACE_MODE_MAX: Book keeping
111 *
112 * Describes the interface between the MAC and PHY.
113 */
114typedef enum {
115 PHY_INTERFACE_MODE_NA,
116 PHY_INTERFACE_MODE_INTERNAL,
117 PHY_INTERFACE_MODE_MII,
118 PHY_INTERFACE_MODE_GMII,
119 PHY_INTERFACE_MODE_SGMII,
120 PHY_INTERFACE_MODE_TBI,
121 PHY_INTERFACE_MODE_REVMII,
122 PHY_INTERFACE_MODE_RMII,
123 PHY_INTERFACE_MODE_REVRMII,
124 PHY_INTERFACE_MODE_RGMII,
125 PHY_INTERFACE_MODE_RGMII_ID,
126 PHY_INTERFACE_MODE_RGMII_RXID,
127 PHY_INTERFACE_MODE_RGMII_TXID,
128 PHY_INTERFACE_MODE_RTBI,
129 PHY_INTERFACE_MODE_SMII,
130 PHY_INTERFACE_MODE_XGMII,
131 PHY_INTERFACE_MODE_XLGMII,
132 PHY_INTERFACE_MODE_MOCA,
133 PHY_INTERFACE_MODE_PSGMII,
134 PHY_INTERFACE_MODE_QSGMII,
135 PHY_INTERFACE_MODE_TRGMII,
136 PHY_INTERFACE_MODE_100BASEX,
137 PHY_INTERFACE_MODE_1000BASEX,
138 PHY_INTERFACE_MODE_2500BASEX,
139 PHY_INTERFACE_MODE_5GBASER,
140 PHY_INTERFACE_MODE_RXAUI,
141 PHY_INTERFACE_MODE_XAUI,
142 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
143 PHY_INTERFACE_MODE_10GBASER,
144 PHY_INTERFACE_MODE_25GBASER,
145 PHY_INTERFACE_MODE_USXGMII,
146 /* 10GBASE-KR - with Clause 73 AN */
147 PHY_INTERFACE_MODE_10GKR,
148 PHY_INTERFACE_MODE_QUSGMII,
149 PHY_INTERFACE_MODE_1000BASEKX,
150 PHY_INTERFACE_MODE_10G_QXGMII,
151 PHY_INTERFACE_MODE_50GBASER,
152 PHY_INTERFACE_MODE_LAUI,
153 PHY_INTERFACE_MODE_100GBASEP,
154 PHY_INTERFACE_MODE_MIILITE,
155 PHY_INTERFACE_MODE_MAX,
156} phy_interface_t;
157
158/* PHY interface mode bitmap handling */
159#define DECLARE_PHY_INTERFACE_MASK(name) \
160 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX)
161
162static inline void phy_interface_zero(unsigned long *intf)
163{
164 bitmap_zero(dst: intf, nbits: PHY_INTERFACE_MODE_MAX);
165}
166
167static inline bool phy_interface_empty(const unsigned long *intf)
168{
169 return bitmap_empty(src: intf, nbits: PHY_INTERFACE_MODE_MAX);
170}
171
172static inline void phy_interface_copy(unsigned long *d, const unsigned long *s)
173{
174 bitmap_copy(dst: d, src: s, nbits: PHY_INTERFACE_MODE_MAX);
175}
176
177static inline unsigned int phy_interface_weight(const unsigned long *intf)
178{
179 return bitmap_weight(src: intf, nbits: PHY_INTERFACE_MODE_MAX);
180}
181
182static inline void phy_interface_and(unsigned long *dst, const unsigned long *a,
183 const unsigned long *b)
184{
185 bitmap_and(dst, src1: a, src2: b, nbits: PHY_INTERFACE_MODE_MAX);
186}
187
188static inline void phy_interface_or(unsigned long *dst, const unsigned long *a,
189 const unsigned long *b)
190{
191 bitmap_or(dst, src1: a, src2: b, nbits: PHY_INTERFACE_MODE_MAX);
192}
193
194static inline void phy_interface_set_rgmii(unsigned long *intf)
195{
196 __set_bit(PHY_INTERFACE_MODE_RGMII, intf);
197 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf);
198 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf);
199 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf);
200}
201
202/**
203 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
204 * @interface: enum phy_interface_t value
205 *
206 * Description: maps enum &phy_interface_t defined in this file
207 * into the device tree binding of 'phy-mode', so that Ethernet
208 * device driver can get PHY interface from device tree.
209 */
210static inline const char *phy_modes(phy_interface_t interface)
211{
212 switch (interface) {
213 case PHY_INTERFACE_MODE_NA:
214 return "";
215 case PHY_INTERFACE_MODE_INTERNAL:
216 return "internal";
217 case PHY_INTERFACE_MODE_MII:
218 return "mii";
219 case PHY_INTERFACE_MODE_GMII:
220 return "gmii";
221 case PHY_INTERFACE_MODE_SGMII:
222 return "sgmii";
223 case PHY_INTERFACE_MODE_TBI:
224 return "tbi";
225 case PHY_INTERFACE_MODE_REVMII:
226 return "rev-mii";
227 case PHY_INTERFACE_MODE_RMII:
228 return "rmii";
229 case PHY_INTERFACE_MODE_REVRMII:
230 return "rev-rmii";
231 case PHY_INTERFACE_MODE_RGMII:
232 return "rgmii";
233 case PHY_INTERFACE_MODE_RGMII_ID:
234 return "rgmii-id";
235 case PHY_INTERFACE_MODE_RGMII_RXID:
236 return "rgmii-rxid";
237 case PHY_INTERFACE_MODE_RGMII_TXID:
238 return "rgmii-txid";
239 case PHY_INTERFACE_MODE_RTBI:
240 return "rtbi";
241 case PHY_INTERFACE_MODE_SMII:
242 return "smii";
243 case PHY_INTERFACE_MODE_XGMII:
244 return "xgmii";
245 case PHY_INTERFACE_MODE_XLGMII:
246 return "xlgmii";
247 case PHY_INTERFACE_MODE_MOCA:
248 return "moca";
249 case PHY_INTERFACE_MODE_PSGMII:
250 return "psgmii";
251 case PHY_INTERFACE_MODE_QSGMII:
252 return "qsgmii";
253 case PHY_INTERFACE_MODE_TRGMII:
254 return "trgmii";
255 case PHY_INTERFACE_MODE_1000BASEX:
256 return "1000base-x";
257 case PHY_INTERFACE_MODE_1000BASEKX:
258 return "1000base-kx";
259 case PHY_INTERFACE_MODE_2500BASEX:
260 return "2500base-x";
261 case PHY_INTERFACE_MODE_5GBASER:
262 return "5gbase-r";
263 case PHY_INTERFACE_MODE_RXAUI:
264 return "rxaui";
265 case PHY_INTERFACE_MODE_XAUI:
266 return "xaui";
267 case PHY_INTERFACE_MODE_10GBASER:
268 return "10gbase-r";
269 case PHY_INTERFACE_MODE_25GBASER:
270 return "25gbase-r";
271 case PHY_INTERFACE_MODE_USXGMII:
272 return "usxgmii";
273 case PHY_INTERFACE_MODE_10GKR:
274 return "10gbase-kr";
275 case PHY_INTERFACE_MODE_100BASEX:
276 return "100base-x";
277 case PHY_INTERFACE_MODE_QUSGMII:
278 return "qusgmii";
279 case PHY_INTERFACE_MODE_10G_QXGMII:
280 return "10g-qxgmii";
281 case PHY_INTERFACE_MODE_50GBASER:
282 return "50gbase-r";
283 case PHY_INTERFACE_MODE_LAUI:
284 return "laui";
285 case PHY_INTERFACE_MODE_100GBASEP:
286 return "100gbase-p";
287 case PHY_INTERFACE_MODE_MIILITE:
288 return "mii-lite";
289 default:
290 return "unknown";
291 }
292}
293
294/**
295 * rgmii_clock - map link speed to the clock rate
296 * @speed: link speed value
297 *
298 * Description: maps RGMII supported link speeds into the clock rates.
299 * This can also be used for MII, GMII, and RMII interface modes as the
300 * clock rates are identical, but the caller must be aware that errors
301 * for unsupported clock rates will not be signalled.
302 *
303 * Returns: clock rate or negative errno
304 */
305static inline long rgmii_clock(int speed)
306{
307 switch (speed) {
308 case SPEED_10:
309 return 2500000;
310 case SPEED_100:
311 return 25000000;
312 case SPEED_1000:
313 return 125000000;
314 default:
315 return -EINVAL;
316 }
317}
318
319#define PHY_MAX_ADDR 32
320
321/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
322#define PHY_ID_FMT "%s:%02x"
323#define PHY_ID_SIZE (MII_BUS_ID_SIZE + 3)
324
325#define MII_BUS_ID_SIZE 61
326
327struct device;
328struct kernel_hwtstamp_config;
329struct phylink;
330struct sfp_bus;
331struct sfp_upstream_ops;
332struct sk_buff;
333
334/**
335 * struct mdio_bus_stats - Statistics counters for MDIO busses
336 * @transfers: Total number of transfers, i.e. @writes + @reads
337 * @errors: Number of MDIO transfers that returned an error
338 * @writes: Number of write transfers
339 * @reads: Number of read transfers
340 * @syncp: Synchronisation for incrementing statistics
341 */
342struct mdio_bus_stats {
343 u64_stats_t transfers;
344 u64_stats_t errors;
345 u64_stats_t writes;
346 u64_stats_t reads;
347 /* Must be last, add new statistics above */
348 struct u64_stats_sync syncp;
349};
350
351/**
352 * struct mii_bus - Represents an MDIO bus
353 *
354 * @owner: Who owns this device
355 * @name: User friendly name for this MDIO device, or driver name
356 * @id: Unique identifier for this bus, typical from bus hierarchy
357 * @priv: Driver private data
358 *
359 * The Bus class for PHYs. Devices which provide access to
360 * PHYs should register using this structure
361 */
362struct mii_bus {
363 struct module *owner;
364 const char *name;
365 char id[MII_BUS_ID_SIZE];
366 void *priv;
367 /** @read: Perform a read transfer on the bus */
368 int (*read)(struct mii_bus *bus, int addr, int regnum);
369 /** @write: Perform a write transfer on the bus */
370 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
371 /** @read_c45: Perform a C45 read transfer on the bus */
372 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum);
373 /** @write_c45: Perform a C45 write transfer on the bus */
374 int (*write_c45)(struct mii_bus *bus, int addr, int devnum,
375 int regnum, u16 val);
376 /** @reset: Perform a reset of the bus */
377 int (*reset)(struct mii_bus *bus);
378
379 /** @stats: Statistic counters per device on the bus */
380 struct mdio_bus_stats stats[PHY_MAX_ADDR];
381
382 /**
383 * @mdio_lock: A lock to ensure that only one thing can read/write
384 * the MDIO bus at a time
385 */
386 struct mutex mdio_lock;
387
388 /** @parent: Parent device of this bus */
389 struct device *parent;
390 /** @state: State of bus structure */
391 enum {
392 MDIOBUS_ALLOCATED = 1,
393 MDIOBUS_REGISTERED,
394 MDIOBUS_UNREGISTERED,
395 MDIOBUS_RELEASED,
396 } state;
397
398 /** @dev: Kernel device representation */
399 struct device dev;
400
401 /** @mdio_map: list of all MDIO devices on bus */
402 struct mdio_device *mdio_map[PHY_MAX_ADDR];
403
404 /** @phy_mask: PHY addresses to be ignored when probing */
405 u32 phy_mask;
406
407 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */
408 u32 phy_ignore_ta_mask;
409
410 /**
411 * @irq: An array of interrupts, each PHY's interrupt at the index
412 * matching its address
413 */
414 int irq[PHY_MAX_ADDR];
415
416 /** @reset_delay_us: GPIO reset pulse width in microseconds */
417 int reset_delay_us;
418 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */
419 int reset_post_delay_us;
420 /** @reset_gpiod: Reset GPIO descriptor pointer */
421 struct gpio_desc *reset_gpiod;
422
423 /** @shared_lock: protect access to the shared element */
424 struct mutex shared_lock;
425
426#if IS_ENABLED(CONFIG_PHY_PACKAGE)
427 /** @shared: shared state across different PHYs */
428 struct phy_package_shared *shared[PHY_MAX_ADDR];
429#endif
430};
431#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
432
433struct mii_bus *mdiobus_alloc_size(size_t size);
434
435/**
436 * mdiobus_alloc - Allocate an MDIO bus structure
437 *
438 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready
439 * for the driver to register the bus.
440 */
441static inline struct mii_bus *mdiobus_alloc(void)
442{
443 return mdiobus_alloc_size(size: 0);
444}
445
446int __mdiobus_register(struct mii_bus *bus, struct module *owner);
447int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus,
448 struct module *owner);
449#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
450#define devm_mdiobus_register(dev, bus) \
451 __devm_mdiobus_register(dev, bus, THIS_MODULE)
452
453void mdiobus_unregister(struct mii_bus *bus);
454void mdiobus_free(struct mii_bus *bus);
455struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
456static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
457{
458 return devm_mdiobus_alloc_size(dev, sizeof_priv: 0);
459}
460
461struct mii_bus *mdio_find_bus(const char *mdio_name);
462struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr);
463
464#define PHY_INTERRUPT_DISABLED false
465#define PHY_INTERRUPT_ENABLED true
466
467/**
468 * enum phy_state - PHY state machine states:
469 *
470 * @PHY_DOWN: PHY device and driver are not ready for anything. probe
471 * should be called if and only if the PHY is in this state,
472 * given that the PHY device exists.
473 * - PHY driver probe function will set the state to @PHY_READY
474 *
475 * @PHY_READY: PHY is ready to send and receive packets, but the
476 * controller is not. By default, PHYs which do not implement
477 * probe will be set to this state by phy_probe().
478 * - start will set the state to UP
479 *
480 * @PHY_UP: The PHY and attached device are ready to do work.
481 * Interrupts should be started here.
482 * - timer moves to @PHY_NOLINK or @PHY_RUNNING
483 *
484 * @PHY_NOLINK: PHY is up, but not currently plugged in.
485 * - irq or timer will set @PHY_RUNNING if link comes back
486 * - phy_stop moves to @PHY_HALTED
487 *
488 * @PHY_RUNNING: PHY is currently up, running, and possibly sending
489 * and/or receiving packets
490 * - irq or timer will set @PHY_NOLINK if link goes down
491 * - phy_stop moves to @PHY_HALTED
492 *
493 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending
494 * is not expected to work, carrier will be indicated as down. PHY will be
495 * poll once per second, or on interrupt for it current state.
496 * Once complete, move to UP to restart the PHY.
497 * - phy_stop aborts the running test and moves to @PHY_HALTED
498 *
499 * @PHY_HALTED: PHY is up, but no polling or interrupts are done.
500 * - phy_start moves to @PHY_UP
501 *
502 * @PHY_ERROR: PHY is up, but is in an error state.
503 * - phy_stop moves to @PHY_HALTED
504 */
505enum phy_state {
506 PHY_DOWN = 0,
507 PHY_READY,
508 PHY_HALTED,
509 PHY_ERROR,
510 PHY_UP,
511 PHY_RUNNING,
512 PHY_NOLINK,
513 PHY_CABLETEST,
514};
515
516#define MDIO_MMD_NUM 32
517
518/**
519 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
520 * @devices_in_package: IEEE 802.3 devices in package register value.
521 * @mmds_present: bit vector of MMDs present.
522 * @device_ids: The device identifier for each present device.
523 */
524struct phy_c45_device_ids {
525 u32 devices_in_package;
526 u32 mmds_present;
527 u32 device_ids[MDIO_MMD_NUM];
528};
529
530struct macsec_context;
531struct macsec_ops;
532
533/**
534 * struct phy_device - An instance of a PHY
535 *
536 * @mdio: MDIO bus this PHY is on
537 * @drv: Pointer to the driver for this PHY instance
538 * @devlink: Create a link between phy dev and mac dev, if the external phy
539 * used by current mac interface is managed by another mac interface.
540 * @phyindex: Unique id across the phy's parent tree of phys to address the PHY
541 * from userspace, similar to ifindex. A zero index means the PHY
542 * wasn't assigned an id yet.
543 * @phy_id: UID for this device found during discovery
544 * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
545 * @is_c45: Set to true if this PHY uses clause 45 addressing.
546 * @is_internal: Set to true if this PHY is internal to a MAC.
547 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc.
548 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps
549 * @has_fixups: Set to true if this PHY has fixups/quirks.
550 * @suspended: Set to true if this PHY has been suspended successfully.
551 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus.
552 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
553 * @loopback_enabled: Set true if this PHY has been loopbacked successfully.
554 * @downshifted_rate: Set true if link speed has been downshifted.
555 * @is_on_sfp_module: Set true if PHY is located on an SFP module.
556 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY
557 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN
558 * enabled.
559 * @is_genphy_driven: PHY is driven by one of the generic PHY drivers
560 * @state: State of the PHY for management purposes
561 * @dev_flags: Device-specific flags used by the PHY driver.
562 *
563 * - Bits [15:0] are free to use by the PHY driver to communicate
564 * driver specific behavior.
565 * - Bits [23:16] are currently reserved for future use.
566 * - Bits [31:24] are reserved for defining generic
567 * PHY driver behavior.
568 * @irq: IRQ number of the PHY's interrupt (-1 if none)
569 * @phylink: Pointer to phylink instance for this PHY
570 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached
571 * @sfp_bus: SFP bus attached to this PHY's fiber port
572 * @attached_dev: The attached enet driver's device instance ptr
573 * @adjust_link: Callback for the enet controller to respond to changes: in the
574 * link state.
575 * @phy_link_change: Callback for phylink for notification of link change
576 * @macsec_ops: MACsec offloading ops.
577 *
578 * @speed: Current link speed
579 * @duplex: Current duplex
580 * @port: Current port
581 * @pause: Current pause
582 * @asym_pause: Current asymmetric pause
583 * @supported: Combined MAC/PHY supported linkmodes
584 * @advertising: Currently advertised linkmodes
585 * @adv_old: Saved advertised while power saving for WoL
586 * @supported_eee: supported PHY EEE linkmodes
587 * @advertising_eee: Currently advertised EEE linkmodes
588 * @enable_tx_lpi: When True, MAC should transmit LPI to PHY
589 * @eee_active: phylib private state, indicating that EEE has been negotiated
590 * @eee_cfg: User configuration of EEE
591 * @lp_advertising: Current link partner advertised linkmodes
592 * @host_interfaces: PHY interface modes supported by host
593 * @eee_disabled_modes: Energy efficient ethernet modes not to be advertised
594 * @autoneg: Flag autoneg being used
595 * @rate_matching: Current rate matching mode
596 * @link: Current link state
597 * @autoneg_complete: Flag auto negotiation of the link has completed
598 * @mdix: Current crossover
599 * @mdix_ctrl: User setting of crossover
600 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register
601 * @interrupts: Flag interrupts have been enabled
602 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt
603 * handling shall be postponed until PHY has resumed
604 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended,
605 * requiring a rerun of the interrupt handler after resume
606 * @default_timestamp: Flag indicating whether we are using the phy
607 * timestamp as the default one
608 * @interface: enum phy_interface_t value
609 * @possible_interfaces: bitmap if interface modes that the attached PHY
610 * will switch between depending on media speed.
611 * @skb: Netlink message for cable diagnostics
612 * @nest: Netlink nest used for cable diagnostics
613 * @ehdr: nNtlink header for cable diagnostics
614 * @phy_led_triggers: Array of LED triggers
615 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers
616 * @led_link_trigger: LED trigger for link up/down
617 * @last_triggered: last LED trigger for link speed
618 * @leds: list of PHY LED structures
619 * @master_slave_set: User requested master/slave configuration
620 * @master_slave_get: Current master/slave advertisement
621 * @master_slave_state: Current master/slave configuration
622 * @mii_ts: Pointer to time stamper callbacks
623 * @psec: Pointer to Power Sourcing Equipment control struct
624 * @lock: Mutex for serialization access to PHY
625 * @state_queue: Work queue for state machine
626 * @link_down_events: Number of times link was lost
627 * @shared: Pointer to private data shared by phys in one package
628 * @priv: Pointer to driver private data
629 *
630 * interrupts currently only supports enabled or disabled,
631 * but could be changed in the future to support enabling
632 * and disabling specific interrupts
633 *
634 * Contains some infrastructure for polling and interrupt
635 * handling, as well as handling shifts in PHY hardware state
636 */
637struct phy_device {
638 struct mdio_device mdio;
639
640 /* Information about the PHY type */
641 /* And management functions */
642 const struct phy_driver *drv;
643
644 struct device_link *devlink;
645
646 u32 phyindex;
647 u32 phy_id;
648
649 struct phy_c45_device_ids c45_ids;
650 unsigned is_c45:1;
651 unsigned is_internal:1;
652 unsigned is_pseudo_fixed_link:1;
653 unsigned is_gigabit_capable:1;
654 unsigned has_fixups:1;
655 unsigned suspended:1;
656 unsigned suspended_by_mdio_bus:1;
657 unsigned sysfs_links:1;
658 unsigned loopback_enabled:1;
659 unsigned downshifted_rate:1;
660 unsigned is_on_sfp_module:1;
661 unsigned mac_managed_pm:1;
662 unsigned wol_enabled:1;
663 unsigned is_genphy_driven:1;
664
665 unsigned autoneg:1;
666 /* The most recently read link state */
667 unsigned link:1;
668 unsigned autoneg_complete:1;
669
670 /* Interrupts are enabled */
671 unsigned interrupts:1;
672 unsigned irq_suspended:1;
673 unsigned irq_rerun:1;
674
675 unsigned default_timestamp:1;
676
677 int rate_matching;
678
679 enum phy_state state;
680
681 u32 dev_flags;
682
683 phy_interface_t interface;
684 DECLARE_PHY_INTERFACE_MASK(possible_interfaces);
685
686 /*
687 * forced speed & duplex (no autoneg)
688 * partner speed & duplex & pause (autoneg)
689 */
690 int speed;
691 int duplex;
692 int port;
693 int pause;
694 int asym_pause;
695 u8 master_slave_get;
696 u8 master_slave_set;
697 u8 master_slave_state;
698
699 /* Union of PHY and Attached devices' supported link modes */
700 /* See ethtool.h for more info */
701 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
702 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
703 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
704 /* used with phy_speed_down */
705 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
706 /* used for eee validation and configuration*/
707 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee);
708 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee);
709 /* Energy efficient ethernet modes which should be prohibited */
710 __ETHTOOL_DECLARE_LINK_MODE_MASK(eee_disabled_modes);
711 bool enable_tx_lpi;
712 bool eee_active;
713 struct eee_config eee_cfg;
714
715 /* Host supported PHY interface types. Should be ignored if empty. */
716 DECLARE_PHY_INTERFACE_MASK(host_interfaces);
717
718#ifdef CONFIG_LED_TRIGGER_PHY
719 struct phy_led_trigger *phy_led_triggers;
720 unsigned int phy_num_led_triggers;
721 struct phy_led_trigger *last_triggered;
722
723 struct phy_led_trigger *led_link_trigger;
724#endif
725 struct list_head leds;
726
727 /*
728 * Interrupt number for this PHY
729 * -1 means no interrupt
730 */
731 int irq;
732
733 /* private data pointer */
734 /* For use by PHYs to maintain extra state */
735 void *priv;
736
737#if IS_ENABLED(CONFIG_PHY_PACKAGE)
738 /* shared data pointer */
739 /* For use by PHYs inside the same package that need a shared state. */
740 struct phy_package_shared *shared;
741#endif
742
743 /* Reporting cable test results */
744 struct sk_buff *skb;
745 void *ehdr;
746 struct nlattr *nest;
747
748 /* Interrupt and Polling infrastructure */
749 struct delayed_work state_queue;
750
751 struct mutex lock;
752
753 /* This may be modified under the rtnl lock */
754 bool sfp_bus_attached;
755 struct sfp_bus *sfp_bus;
756 struct phylink *phylink;
757 struct net_device *attached_dev;
758 struct mii_timestamper *mii_ts;
759 struct pse_control *psec;
760
761 u8 mdix;
762 u8 mdix_ctrl;
763
764 int pma_extable;
765
766 unsigned int link_down_events;
767
768 void (*phy_link_change)(struct phy_device *phydev, bool up);
769 void (*adjust_link)(struct net_device *dev);
770
771#if IS_ENABLED(CONFIG_MACSEC)
772 /* MACsec management functions */
773 const struct macsec_ops *macsec_ops;
774#endif
775};
776
777/* Generic phy_device::dev_flags */
778#define PHY_F_NO_IRQ 0x80000000
779#define PHY_F_RXC_ALWAYS_ON 0x40000000
780
781#define to_phy_device(__dev) container_of_const(to_mdio_device(__dev), struct phy_device, mdio)
782
783/**
784 * struct phy_tdr_config - Configuration of a TDR raw test
785 *
786 * @first: Distance for first data collection point
787 * @last: Distance for last data collection point
788 * @step: Step between data collection points
789 * @pair: Bitmap of cable pairs to collect data for
790 *
791 * A structure containing possible configuration parameters
792 * for a TDR cable test. The driver does not need to implement
793 * all the parameters, but should report what is actually used.
794 * All distances are in centimeters.
795 */
796struct phy_tdr_config {
797 u32 first;
798 u32 last;
799 u32 step;
800 s8 pair;
801};
802#define PHY_PAIR_ALL -1
803
804/**
805 * enum link_inband_signalling - in-band signalling modes that are supported
806 *
807 * @LINK_INBAND_DISABLE: in-band signalling can be disabled
808 * @LINK_INBAND_ENABLE: in-band signalling can be enabled without bypass
809 * @LINK_INBAND_BYPASS: in-band signalling can be enabled with bypass
810 *
811 * The possible and required bits can only be used if the valid bit is set.
812 * If possible is clear, that means inband signalling can not be used.
813 * Required is only valid when possible is set, and means that inband
814 * signalling must be used.
815 */
816enum link_inband_signalling {
817 LINK_INBAND_DISABLE = BIT(0),
818 LINK_INBAND_ENABLE = BIT(1),
819 LINK_INBAND_BYPASS = BIT(2),
820};
821
822/**
823 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision
824 * Avoidance) Reconciliation Sublayer.
825 *
826 * @version: read-only PLCA register map version. -1 = not available. Ignored
827 * when setting the configuration. Format is the same as reported by the PLCA
828 * IDVER register (31.CA00). -1 = not available.
829 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't
830 * set. 0 = disabled, anything else = enabled.
831 * @node_id: the PLCA local node identifier. -1 = not available / don't set.
832 * Allowed values [0 .. 254]. 255 = node disabled.
833 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only
834 * meaningful for the coordinator (node_id = 0). -1 = not available / don't
835 * set. Allowed values [1 .. 255].
836 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the
837 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for
838 * more details. The to_timer shall be set equal over all nodes.
839 * -1 = not available / don't set. Allowed values [0 .. 255].
840 * @burst_cnt: controls how many additional frames a node is allowed to send in
841 * single transmit opportunity (TO). The default value of 0 means that the
842 * node is allowed exactly one frame per TO. A value of 1 allows two frames
843 * per TO, and so on. -1 = not available / don't set.
844 * Allowed values [0 .. 255].
845 * @burst_tmr: controls how many bit times to wait for the MAC to send a new
846 * frame before interrupting the burst. This value should be set to a value
847 * greater than the MAC inter-packet gap (which is typically 96 bits).
848 * -1 = not available / don't set. Allowed values [0 .. 255].
849 *
850 * A structure containing configuration parameters for setting/getting the PLCA
851 * RS configuration. The driver does not need to implement all the parameters,
852 * but should report what is actually used.
853 */
854struct phy_plca_cfg {
855 int version;
856 int enabled;
857 int node_id;
858 int node_cnt;
859 int to_tmr;
860 int burst_cnt;
861 int burst_tmr;
862};
863
864/**
865 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision
866 * Avoidance) Reconciliation Sublayer.
867 *
868 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS
869 * register(31.CA03), indicating BEACON activity.
870 *
871 * A structure containing status information of the PLCA RS configuration.
872 * The driver does not need to implement all the parameters, but should report
873 * what is actually used.
874 */
875struct phy_plca_status {
876 bool pst;
877};
878
879/* Modes for PHY LED configuration */
880enum phy_led_modes {
881 PHY_LED_ACTIVE_HIGH = 0,
882 PHY_LED_ACTIVE_LOW = 1,
883 PHY_LED_INACTIVE_HIGH_IMPEDANCE = 2,
884
885 /* keep it last */
886 __PHY_LED_MODES_NUM,
887};
888
889/**
890 * struct phy_led: An LED driven by the PHY
891 *
892 * @list: List of LEDs
893 * @phydev: PHY this LED is attached to
894 * @led_cdev: Standard LED class structure
895 * @index: Number of the LED
896 */
897struct phy_led {
898 struct list_head list;
899 struct phy_device *phydev;
900 struct led_classdev led_cdev;
901 u8 index;
902};
903
904#define to_phy_led(d) container_of(d, struct phy_led, led_cdev)
905
906/**
907 * struct phy_driver - Driver structure for a particular PHY type
908 *
909 * @mdiodrv: Data common to all MDIO devices
910 * @phy_id: The result of reading the UID registers of this PHY
911 * type, and ANDing them with the phy_id_mask. This driver
912 * only works for PHYs with IDs which match this field
913 * @name: The friendly name of this PHY type
914 * @phy_id_mask: Defines the important bits of the phy_id
915 * @features: A mandatory list of features (speed, duplex, etc)
916 * supported by this PHY
917 * @flags: A bitfield defining certain other features this PHY
918 * supports (like interrupts)
919 * @driver_data: Static driver data
920 *
921 * All functions are optional. If config_aneg or read_status
922 * are not implemented, the phy core uses the genphy versions.
923 * Note that none of these functions should be called from
924 * interrupt time. The goal is for the bus read/write functions
925 * to be able to block when the bus transaction is happening,
926 * and be freed up by an interrupt (The MPC85xx has this ability,
927 * though it is not currently supported in the driver).
928 */
929struct phy_driver {
930 struct mdio_driver_common mdiodrv;
931 u32 phy_id;
932 char *name;
933 u32 phy_id_mask;
934 const unsigned long * const features;
935 u32 flags;
936 const void *driver_data;
937
938 /**
939 * @soft_reset: Called to issue a PHY software reset
940 */
941 int (*soft_reset)(struct phy_device *phydev);
942
943 /**
944 * @config_init: Called to initialize the PHY,
945 * including after a reset
946 */
947 int (*config_init)(struct phy_device *phydev);
948
949 /**
950 * @probe: Called during discovery. Used to set
951 * up device-specific structures, if any
952 */
953 int (*probe)(struct phy_device *phydev);
954
955 /**
956 * @get_features: Probe the hardware to determine what
957 * abilities it has. Should only set phydev->supported.
958 */
959 int (*get_features)(struct phy_device *phydev);
960
961 /**
962 * @inband_caps: query whether in-band is supported for the given PHY
963 * interface mode. Returns a bitmask of bits defined by enum
964 * link_inband_signalling.
965 */
966 unsigned int (*inband_caps)(struct phy_device *phydev,
967 phy_interface_t interface);
968
969 /**
970 * @config_inband: configure in-band mode for the PHY
971 */
972 int (*config_inband)(struct phy_device *phydev, unsigned int modes);
973
974 /**
975 * @get_rate_matching: Get the supported type of rate matching for a
976 * particular phy interface. This is used by phy consumers to determine
977 * whether to advertise lower-speed modes for that interface. It is
978 * assumed that if a rate matching mode is supported on an interface,
979 * then that interface's rate can be adapted to all slower link speeds
980 * supported by the phy. If the interface is not supported, this should
981 * return %RATE_MATCH_NONE.
982 */
983 int (*get_rate_matching)(struct phy_device *phydev,
984 phy_interface_t iface);
985
986 /* PHY Power Management */
987 /** @suspend: Suspend the hardware, saving state if needed */
988 int (*suspend)(struct phy_device *phydev);
989 /** @resume: Resume the hardware, restoring state if needed */
990 int (*resume)(struct phy_device *phydev);
991
992 /**
993 * @config_aneg: Configures the advertisement and resets
994 * autonegotiation if phydev->autoneg is on,
995 * forces the speed to the current settings in phydev
996 * if phydev->autoneg is off
997 */
998 int (*config_aneg)(struct phy_device *phydev);
999
1000 /** @aneg_done: Determines the auto negotiation result */
1001 int (*aneg_done)(struct phy_device *phydev);
1002
1003 /** @read_status: Determines the negotiated speed and duplex */
1004 int (*read_status)(struct phy_device *phydev);
1005
1006 /**
1007 * @config_intr: Enables or disables interrupts.
1008 * It should also clear any pending interrupts prior to enabling the
1009 * IRQs and after disabling them.
1010 */
1011 int (*config_intr)(struct phy_device *phydev);
1012
1013 /** @handle_interrupt: Override default interrupt handling */
1014 irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
1015
1016 /** @remove: Clears up any memory if needed */
1017 void (*remove)(struct phy_device *phydev);
1018
1019 /**
1020 * @match_phy_device: Returns true if this is a suitable
1021 * driver for the given phydev. If NULL, matching is based on
1022 * phy_id and phy_id_mask.
1023 */
1024 int (*match_phy_device)(struct phy_device *phydev,
1025 const struct phy_driver *phydrv);
1026
1027 /**
1028 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY
1029 * register changes to enable Wake on LAN, so set_wol is
1030 * provided to be called in the ethernet driver's set_wol
1031 * function.
1032 */
1033 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
1034
1035 /**
1036 * @get_wol: See set_wol, but for checking whether Wake on LAN
1037 * is enabled.
1038 */
1039 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
1040
1041 /**
1042 * @link_change_notify: Called to inform a PHY device driver
1043 * when the core is about to change the link state. This
1044 * callback is supposed to be used as fixup hook for drivers
1045 * that need to take action when the link state
1046 * changes. Drivers are by no means allowed to mess with the
1047 * PHY device structure in their implementations.
1048 */
1049 void (*link_change_notify)(struct phy_device *dev);
1050
1051 /**
1052 * @read_mmd: PHY specific driver override for reading a MMD
1053 * register. This function is optional for PHY specific
1054 * drivers. When not provided, the default MMD read function
1055 * will be used by phy_read_mmd(), which will use either a
1056 * direct read for Clause 45 PHYs or an indirect read for
1057 * Clause 22 PHYs. devnum is the MMD device number within the
1058 * PHY device, regnum is the register within the selected MMD
1059 * device.
1060 */
1061 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
1062
1063 /**
1064 * @write_mmd: PHY specific driver override for writing a MMD
1065 * register. This function is optional for PHY specific
1066 * drivers. When not provided, the default MMD write function
1067 * will be used by phy_write_mmd(), which will use either a
1068 * direct write for Clause 45 PHYs, or an indirect write for
1069 * Clause 22 PHYs. devnum is the MMD device number within the
1070 * PHY device, regnum is the register within the selected MMD
1071 * device. val is the value to be written.
1072 */
1073 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
1074 u16 val);
1075
1076 /** @read_page: Return the current PHY register page number */
1077 int (*read_page)(struct phy_device *dev);
1078 /** @write_page: Set the current PHY register page number */
1079 int (*write_page)(struct phy_device *dev, int page);
1080
1081 /**
1082 * @module_info: Get the size and type of the eeprom contained
1083 * within a plug-in module
1084 */
1085 int (*module_info)(struct phy_device *dev,
1086 struct ethtool_modinfo *modinfo);
1087
1088 /**
1089 * @module_eeprom: Get the eeprom information from the plug-in
1090 * module
1091 */
1092 int (*module_eeprom)(struct phy_device *dev,
1093 struct ethtool_eeprom *ee, u8 *data);
1094
1095 /** @cable_test_start: Start a cable test */
1096 int (*cable_test_start)(struct phy_device *dev);
1097
1098 /** @cable_test_tdr_start: Start a raw TDR cable test */
1099 int (*cable_test_tdr_start)(struct phy_device *dev,
1100 const struct phy_tdr_config *config);
1101
1102 /**
1103 * @cable_test_get_status: Once per second, or on interrupt,
1104 * request the status of the test.
1105 */
1106 int (*cable_test_get_status)(struct phy_device *dev, bool *finished);
1107
1108 /* Get statistics from the PHY using ethtool */
1109 /**
1110 * @get_phy_stats: Retrieve PHY statistics.
1111 * @dev: The PHY device for which the statistics are retrieved.
1112 * @eth_stats: structure where Ethernet PHY stats will be stored.
1113 * @stats: structure where additional PHY-specific stats will be stored.
1114 *
1115 * Retrieves the supported PHY statistics and populates the provided
1116 * structures. The input structures are pre-initialized with
1117 * `ETHTOOL_STAT_NOT_SET`, and the driver must only modify members
1118 * corresponding to supported statistics. Unmodified members will remain
1119 * set to `ETHTOOL_STAT_NOT_SET` and will not be returned to userspace.
1120 */
1121 void (*get_phy_stats)(struct phy_device *dev,
1122 struct ethtool_eth_phy_stats *eth_stats,
1123 struct ethtool_phy_stats *stats);
1124
1125 /**
1126 * @get_link_stats: Retrieve link statistics.
1127 * @dev: The PHY device for which the statistics are retrieved.
1128 * @link_stats: structure where link-specific stats will be stored.
1129 *
1130 * Retrieves link-related statistics for the given PHY device. The input
1131 * structure is pre-initialized with `ETHTOOL_STAT_NOT_SET`, and the
1132 * driver must only modify members corresponding to supported
1133 * statistics. Unmodified members will remain set to
1134 * `ETHTOOL_STAT_NOT_SET` and will not be returned to userspace.
1135 */
1136 void (*get_link_stats)(struct phy_device *dev,
1137 struct ethtool_link_ext_stats *link_stats);
1138
1139 /**
1140 * @update_stats: Trigger periodic statistics updates.
1141 * @dev: The PHY device for which statistics updates are triggered.
1142 *
1143 * Periodically gathers statistics from the PHY device to update locally
1144 * maintained 64-bit counters. This is necessary for PHYs that implement
1145 * reduced-width counters (e.g., 16-bit or 32-bit) which can overflow
1146 * more frequently compared to 64-bit counters. By invoking this
1147 * callback, drivers can fetch the current counter values, handle
1148 * overflow detection, and accumulate the results into local 64-bit
1149 * counters for accurate reporting through the `get_phy_stats` and
1150 * `get_link_stats` interfaces.
1151 *
1152 * Return: 0 on success or a negative error code on failure.
1153 */
1154 int (*update_stats)(struct phy_device *dev);
1155
1156 /** @get_sset_count: Number of statistic counters */
1157 int (*get_sset_count)(struct phy_device *dev);
1158 /** @get_strings: Names of the statistic counters */
1159 void (*get_strings)(struct phy_device *dev, u8 *data);
1160 /** @get_stats: Return the statistic counter values */
1161 void (*get_stats)(struct phy_device *dev,
1162 struct ethtool_stats *stats, u64 *data);
1163
1164 /* Get and Set PHY tunables */
1165 /** @get_tunable: Return the value of a tunable */
1166 int (*get_tunable)(struct phy_device *dev,
1167 struct ethtool_tunable *tuna, void *data);
1168 /** @set_tunable: Set the value of a tunable */
1169 int (*set_tunable)(struct phy_device *dev,
1170 struct ethtool_tunable *tuna,
1171 const void *data);
1172 /**
1173 * @set_loopback: Set the loopback mode of the PHY
1174 * enable selects if the loopback mode is enabled or disabled. If the
1175 * loopback mode is enabled, then the speed of the loopback mode can be
1176 * requested with the speed argument. If the speed argument is zero,
1177 * then any speed can be selected. If the speed argument is > 0, then
1178 * this speed shall be selected for the loopback mode or EOPNOTSUPP
1179 * shall be returned if speed selection is not supported.
1180 */
1181 int (*set_loopback)(struct phy_device *dev, bool enable, int speed);
1182 /** @get_sqi: Get the signal quality indication */
1183 int (*get_sqi)(struct phy_device *dev);
1184 /** @get_sqi_max: Get the maximum signal quality indication */
1185 int (*get_sqi_max)(struct phy_device *dev);
1186
1187 /* PLCA RS interface */
1188 /** @get_plca_cfg: Return the current PLCA configuration */
1189 int (*get_plca_cfg)(struct phy_device *dev,
1190 struct phy_plca_cfg *plca_cfg);
1191 /** @set_plca_cfg: Set the PLCA configuration */
1192 int (*set_plca_cfg)(struct phy_device *dev,
1193 const struct phy_plca_cfg *plca_cfg);
1194 /** @get_plca_status: Return the current PLCA status info */
1195 int (*get_plca_status)(struct phy_device *dev,
1196 struct phy_plca_status *plca_st);
1197
1198 /**
1199 * @led_brightness_set: Set a PHY LED brightness. Index
1200 * indicates which of the PHYs led should be set. Value
1201 * follows the standard LED class meaning, e.g. LED_OFF,
1202 * LED_HALF, LED_FULL.
1203 */
1204 int (*led_brightness_set)(struct phy_device *dev,
1205 u8 index, enum led_brightness value);
1206
1207 /**
1208 * @led_blink_set: Set a PHY LED blinking. Index indicates
1209 * which of the PHYs led should be configured to blink. Delays
1210 * are in milliseconds and if both are zero then a sensible
1211 * default should be chosen. The call should adjust the
1212 * timings in that case and if it can't match the values
1213 * specified exactly.
1214 */
1215 int (*led_blink_set)(struct phy_device *dev, u8 index,
1216 unsigned long *delay_on,
1217 unsigned long *delay_off);
1218 /**
1219 * @led_hw_is_supported: Can the HW support the given rules.
1220 * @dev: PHY device which has the LED
1221 * @index: Which LED of the PHY device
1222 * @rules The core is interested in these rules
1223 *
1224 * Return 0 if yes, -EOPNOTSUPP if not, or an error code.
1225 */
1226 int (*led_hw_is_supported)(struct phy_device *dev, u8 index,
1227 unsigned long rules);
1228 /**
1229 * @led_hw_control_set: Set the HW to control the LED
1230 * @dev: PHY device which has the LED
1231 * @index: Which LED of the PHY device
1232 * @rules The rules used to control the LED
1233 *
1234 * Returns 0, or a an error code.
1235 */
1236 int (*led_hw_control_set)(struct phy_device *dev, u8 index,
1237 unsigned long rules);
1238 /**
1239 * @led_hw_control_get: Get how the HW is controlling the LED
1240 * @dev: PHY device which has the LED
1241 * @index: Which LED of the PHY device
1242 * @rules Pointer to the rules used to control the LED
1243 *
1244 * Set *@rules to how the HW is currently blinking. Returns 0
1245 * on success, or a error code if the current blinking cannot
1246 * be represented in rules, or some other error happens.
1247 */
1248 int (*led_hw_control_get)(struct phy_device *dev, u8 index,
1249 unsigned long *rules);
1250
1251 /**
1252 * @led_polarity_set: Set the LED polarity modes
1253 * @dev: PHY device which has the LED
1254 * @index: Which LED of the PHY device
1255 * @modes: bitmap of LED polarity modes
1256 *
1257 * Configure LED with all the required polarity modes in @modes
1258 * to make it correctly turn ON or OFF.
1259 *
1260 * Returns 0, or an error code.
1261 */
1262 int (*led_polarity_set)(struct phy_device *dev, int index,
1263 unsigned long modes);
1264
1265 /**
1266 * @get_next_update_time: Get the time until the next update event
1267 * @dev: PHY device
1268 *
1269 * Callback to determine the time (in jiffies) until the next
1270 * update event for the PHY state machine. Allows PHY drivers to
1271 * dynamically adjust polling intervals based on link state or other
1272 * conditions.
1273 *
1274 * Returns the time in jiffies until the next update event.
1275 */
1276 unsigned int (*get_next_update_time)(struct phy_device *dev);
1277};
1278#define to_phy_driver(d) container_of_const(to_mdio_common_driver(d), \
1279 struct phy_driver, mdiodrv)
1280
1281#define PHY_ID_MATCH_EXTACT_MASK GENMASK(31, 0)
1282#define PHY_ID_MATCH_MODEL_MASK GENMASK(31, 4)
1283#define PHY_ID_MATCH_VENDOR_MASK GENMASK(31, 10)
1284
1285#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = PHY_ID_MATCH_EXTACT_MASK
1286#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = PHY_ID_MATCH_MODEL_MASK
1287#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = PHY_ID_MATCH_VENDOR_MASK
1288
1289/**
1290 * phy_id_compare - compare @id1 with @id2 taking account of @mask
1291 * @id1: first PHY ID
1292 * @id2: second PHY ID
1293 * @mask: the PHY ID mask, set bits are significant in matching
1294 *
1295 * Return true if the bits from @id1 and @id2 specified by @mask match.
1296 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask).
1297 */
1298static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask)
1299{
1300 return !((id1 ^ id2) & mask);
1301}
1302
1303/**
1304 * phy_id_compare_vendor - compare @id with @vendor mask
1305 * @id: PHY ID
1306 * @vendor_mask: PHY Vendor mask
1307 *
1308 * Return: true if the bits from @id match @vendor using the
1309 * generic PHY Vendor mask.
1310 */
1311static inline bool phy_id_compare_vendor(u32 id, u32 vendor_mask)
1312{
1313 return phy_id_compare(id1: id, id2: vendor_mask, PHY_ID_MATCH_VENDOR_MASK);
1314}
1315
1316/**
1317 * phy_id_compare_model - compare @id with @model mask
1318 * @id: PHY ID
1319 * @model_mask: PHY Model mask
1320 *
1321 * Return: true if the bits from @id match @model using the
1322 * generic PHY Model mask.
1323 */
1324static inline bool phy_id_compare_model(u32 id, u32 model_mask)
1325{
1326 return phy_id_compare(id1: id, id2: model_mask, PHY_ID_MATCH_MODEL_MASK);
1327}
1328
1329/**
1330 * phydev_id_compare - compare @id with the PHY's Clause 22 ID
1331 * @phydev: the PHY device
1332 * @id: the PHY ID to be matched
1333 *
1334 * Compare the @phydev clause 22 ID with the provided @id and return true or
1335 * false depending whether it matches, using the bound driver mask. The
1336 * @phydev must be bound to a driver.
1337 */
1338static inline bool phydev_id_compare(struct phy_device *phydev, u32 id)
1339{
1340 return phy_id_compare(id1: id, id2: phydev->phy_id, mask: phydev->drv->phy_id_mask);
1341}
1342
1343const char *phy_speed_to_str(int speed);
1344const char *phy_duplex_to_str(unsigned int duplex);
1345const char *phy_rate_matching_to_str(int rate_matching);
1346
1347int phy_interface_num_ports(phy_interface_t interface);
1348
1349/**
1350 * phy_is_started - Convenience function to check whether PHY is started
1351 * @phydev: The phy_device struct
1352 */
1353static inline bool phy_is_started(struct phy_device *phydev)
1354{
1355 return phydev->state >= PHY_UP;
1356}
1357
1358/**
1359 * phy_driver_is_genphy - Convenience function to check whether PHY is driven
1360 * by one of the generic PHY drivers
1361 * @phydev: The phy_device struct
1362 * Return: true if PHY is driven by one of the genphy drivers
1363 */
1364static inline bool phy_driver_is_genphy(struct phy_device *phydev)
1365{
1366 return phydev->is_genphy_driven;
1367}
1368
1369/**
1370 * phy_disable_eee_mode - Don't advertise an EEE mode.
1371 * @phydev: The phy_device struct
1372 * @link_mode: The EEE mode to be disabled
1373 */
1374static inline void phy_disable_eee_mode(struct phy_device *phydev, u32 link_mode)
1375{
1376 WARN_ON(phy_is_started(phydev));
1377
1378 linkmode_set_bit(link_mode, phydev->eee_disabled_modes);
1379 linkmode_clear_bit(link_mode, phydev->advertising_eee);
1380}
1381
1382void phy_resolve_aneg_pause(struct phy_device *phydev);
1383void phy_resolve_aneg_linkmode(struct phy_device *phydev);
1384
1385/**
1386 * phy_read - Convenience function for reading a given PHY register
1387 * @phydev: the phy_device struct
1388 * @regnum: register number to read
1389 *
1390 * NOTE: MUST NOT be called from interrupt context,
1391 * because the bus read/write functions may wait for an interrupt
1392 * to conclude the operation.
1393 */
1394static inline int phy_read(struct phy_device *phydev, u32 regnum)
1395{
1396 return mdiobus_read(bus: phydev->mdio.bus, addr: phydev->mdio.addr, regnum);
1397}
1398
1399#define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
1400 timeout_us, sleep_before_read) \
1401({ \
1402 int __ret, __val; \
1403 __ret = read_poll_timeout(__val = phy_read, val, \
1404 __val < 0 || (cond), \
1405 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
1406 if (__val < 0) \
1407 __ret = __val; \
1408 if (__ret) \
1409 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1410 __ret; \
1411})
1412
1413/**
1414 * __phy_read - convenience function for reading a given PHY register
1415 * @phydev: the phy_device struct
1416 * @regnum: register number to read
1417 *
1418 * The caller must have taken the MDIO bus lock.
1419 */
1420static inline int __phy_read(struct phy_device *phydev, u32 regnum)
1421{
1422 return __mdiobus_read(bus: phydev->mdio.bus, addr: phydev->mdio.addr, regnum);
1423}
1424
1425/**
1426 * phy_write - Convenience function for writing a given PHY register
1427 * @phydev: the phy_device struct
1428 * @regnum: register number to write
1429 * @val: value to write to @regnum
1430 *
1431 * NOTE: MUST NOT be called from interrupt context,
1432 * because the bus read/write functions may wait for an interrupt
1433 * to conclude the operation.
1434 */
1435static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1436{
1437 return mdiobus_write(bus: phydev->mdio.bus, addr: phydev->mdio.addr, regnum, val);
1438}
1439
1440/**
1441 * __phy_write - Convenience function for writing a given PHY register
1442 * @phydev: the phy_device struct
1443 * @regnum: register number to write
1444 * @val: value to write to @regnum
1445 *
1446 * The caller must have taken the MDIO bus lock.
1447 */
1448static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1449{
1450 return __mdiobus_write(bus: phydev->mdio.bus, addr: phydev->mdio.addr, regnum,
1451 val);
1452}
1453
1454/**
1455 * __phy_modify_changed() - Convenience function for modifying a PHY register
1456 * @phydev: a pointer to a &struct phy_device
1457 * @regnum: register number
1458 * @mask: bit mask of bits to clear
1459 * @set: bit mask of bits to set
1460 *
1461 * Unlocked helper function which allows a PHY register to be modified as
1462 * new register value = (old register value & ~mask) | set
1463 *
1464 * Returns negative errno, 0 if there was no change, and 1 in case of change
1465 */
1466static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum,
1467 u16 mask, u16 set)
1468{
1469 return __mdiobus_modify_changed(bus: phydev->mdio.bus, addr: phydev->mdio.addr,
1470 regnum, mask, set);
1471}
1472
1473/*
1474 * phy_read_mmd - Convenience function for reading a register
1475 * from an MMD on a given PHY.
1476 */
1477int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1478
1479/**
1480 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
1481 * condition is met or a timeout occurs
1482 *
1483 * @phydev: The phy_device struct
1484 * @devaddr: The MMD to read from
1485 * @regnum: The register on the MMD to read
1486 * @val: Variable to read the register into
1487 * @cond: Break condition (usually involving @val)
1488 * @sleep_us: Maximum time to sleep between reads in us (0 tight-loops). Please
1489 * read usleep_range() function description for details and
1490 * limitations.
1491 * @timeout_us: Timeout in us, 0 means never timeout
1492 * @sleep_before_read: if it is true, sleep @sleep_us before read.
1493 *
1494 * Returns: 0 on success and -ETIMEDOUT upon a timeout. In either
1495 * case, the last read value at @args is stored in @val. Must not
1496 * be called from atomic context if sleep_us or timeout_us are used.
1497 */
1498#define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
1499 sleep_us, timeout_us, sleep_before_read) \
1500({ \
1501 int __ret, __val; \
1502 __ret = read_poll_timeout(__val = phy_read_mmd, val, \
1503 __val < 0 || (cond), \
1504 sleep_us, timeout_us, sleep_before_read, \
1505 phydev, devaddr, regnum); \
1506 if (__val < 0) \
1507 __ret = __val; \
1508 if (__ret) \
1509 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1510 __ret; \
1511})
1512
1513/*
1514 * __phy_read_mmd - Convenience function for reading a register
1515 * from an MMD on a given PHY.
1516 */
1517int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1518
1519/*
1520 * phy_write_mmd - Convenience function for writing a register
1521 * on an MMD on a given PHY.
1522 */
1523int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1524
1525/*
1526 * __phy_write_mmd - Convenience function for writing a register
1527 * on an MMD on a given PHY.
1528 */
1529int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1530
1531int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1532 u16 set);
1533int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1534 u16 set);
1535int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1536int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1537
1538int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1539 u16 mask, u16 set);
1540int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1541 u16 mask, u16 set);
1542int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1543 u16 mask, u16 set);
1544int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1545 u16 mask, u16 set);
1546
1547/**
1548 * __phy_set_bits - Convenience function for setting bits in a PHY register
1549 * @phydev: the phy_device struct
1550 * @regnum: register number to write
1551 * @val: bits to set
1552 *
1553 * The caller must have taken the MDIO bus lock.
1554 */
1555static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1556{
1557 return __phy_modify(phydev, regnum, mask: 0, set: val);
1558}
1559
1560/**
1561 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
1562 * @phydev: the phy_device struct
1563 * @regnum: register number to write
1564 * @val: bits to clear
1565 *
1566 * The caller must have taken the MDIO bus lock.
1567 */
1568static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
1569 u16 val)
1570{
1571 return __phy_modify(phydev, regnum, mask: val, set: 0);
1572}
1573
1574/**
1575 * phy_set_bits - Convenience function for setting bits in a PHY register
1576 * @phydev: the phy_device struct
1577 * @regnum: register number to write
1578 * @val: bits to set
1579 */
1580static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1581{
1582 return phy_modify(phydev, regnum, mask: 0, set: val);
1583}
1584
1585/**
1586 * phy_clear_bits - Convenience function for clearing bits in a PHY register
1587 * @phydev: the phy_device struct
1588 * @regnum: register number to write
1589 * @val: bits to clear
1590 */
1591static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
1592{
1593 return phy_modify(phydev, regnum, mask: val, set: 0);
1594}
1595
1596/**
1597 * __phy_set_bits_mmd - Convenience function for setting bits in a register
1598 * on MMD
1599 * @phydev: the phy_device struct
1600 * @devad: the MMD containing register to modify
1601 * @regnum: register number to modify
1602 * @val: bits to set
1603 *
1604 * The caller must have taken the MDIO bus lock.
1605 */
1606static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
1607 u32 regnum, u16 val)
1608{
1609 return __phy_modify_mmd(phydev, devad, regnum, mask: 0, set: val);
1610}
1611
1612/**
1613 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
1614 * on MMD
1615 * @phydev: the phy_device struct
1616 * @devad: the MMD containing register to modify
1617 * @regnum: register number to modify
1618 * @val: bits to clear
1619 *
1620 * The caller must have taken the MDIO bus lock.
1621 */
1622static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1623 u32 regnum, u16 val)
1624{
1625 return __phy_modify_mmd(phydev, devad, regnum, mask: val, set: 0);
1626}
1627
1628/**
1629 * phy_set_bits_mmd - Convenience function for setting bits in a register
1630 * on MMD
1631 * @phydev: the phy_device struct
1632 * @devad: the MMD containing register to modify
1633 * @regnum: register number to modify
1634 * @val: bits to set
1635 */
1636static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
1637 u32 regnum, u16 val)
1638{
1639 return phy_modify_mmd(phydev, devad, regnum, mask: 0, set: val);
1640}
1641
1642/**
1643 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
1644 * on MMD
1645 * @phydev: the phy_device struct
1646 * @devad: the MMD containing register to modify
1647 * @regnum: register number to modify
1648 * @val: bits to clear
1649 */
1650static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1651 u32 regnum, u16 val)
1652{
1653 return phy_modify_mmd(phydev, devad, regnum, mask: val, set: 0);
1654}
1655
1656/**
1657 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
1658 * @phydev: the phy_device struct
1659 *
1660 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
1661 * PHY_MAC_INTERRUPT
1662 */
1663static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
1664{
1665 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT;
1666}
1667
1668/**
1669 * phy_polling_mode - Convenience function for testing whether polling is
1670 * used to detect PHY status changes
1671 * @phydev: the phy_device struct
1672 */
1673static inline bool phy_polling_mode(struct phy_device *phydev)
1674{
1675 if (phydev->state == PHY_CABLETEST)
1676 if (phydev->drv->flags & PHY_POLL_CABLE_TEST)
1677 return true;
1678
1679 if (phydev->drv->update_stats)
1680 return true;
1681
1682 return phydev->irq == PHY_POLL;
1683}
1684
1685/**
1686 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
1687 * @phydev: the phy_device struct
1688 */
1689static inline bool phy_has_hwtstamp(struct phy_device *phydev)
1690{
1691 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
1692}
1693
1694/**
1695 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
1696 * @phydev: the phy_device struct
1697 */
1698static inline bool phy_has_rxtstamp(struct phy_device *phydev)
1699{
1700 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
1701}
1702
1703/**
1704 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
1705 * PTP hardware clock capabilities.
1706 * @phydev: the phy_device struct
1707 */
1708static inline bool phy_has_tsinfo(struct phy_device *phydev)
1709{
1710 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
1711}
1712
1713/**
1714 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
1715 * @phydev: the phy_device struct
1716 */
1717static inline bool phy_has_txtstamp(struct phy_device *phydev)
1718{
1719 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
1720}
1721
1722static inline int phy_hwtstamp(struct phy_device *phydev,
1723 struct kernel_hwtstamp_config *cfg,
1724 struct netlink_ext_ack *extack)
1725{
1726 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack);
1727}
1728
1729static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
1730 int type)
1731{
1732 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
1733}
1734
1735static inline int phy_ts_info(struct phy_device *phydev,
1736 struct kernel_ethtool_ts_info *tsinfo)
1737{
1738 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
1739}
1740
1741static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
1742 int type)
1743{
1744 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
1745}
1746
1747/**
1748 * phy_is_default_hwtstamp - Is the PHY hwtstamp the default timestamp
1749 * @phydev: Pointer to phy_device
1750 *
1751 * This is used to get default timestamping device taking into account
1752 * the new API choice, which is selecting the timestamping from MAC by
1753 * default if the phydev does not have default_timestamp flag enabled.
1754 *
1755 * Return: True if phy is the default hw timestamp, false otherwise.
1756 */
1757static inline bool phy_is_default_hwtstamp(struct phy_device *phydev)
1758{
1759 return phy_has_hwtstamp(phydev) && phydev->default_timestamp;
1760}
1761
1762/**
1763 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module
1764 * @phydev: the phy_device struct
1765 */
1766static inline bool phy_on_sfp(struct phy_device *phydev)
1767{
1768 return phydev->is_on_sfp_module;
1769}
1770
1771/**
1772 * phy_interface_mode_is_rgmii - Convenience function for testing if a
1773 * PHY interface mode is RGMII (all variants)
1774 * @mode: the &phy_interface_t enum
1775 */
1776static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
1777{
1778 return mode >= PHY_INTERFACE_MODE_RGMII &&
1779 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
1780};
1781
1782/**
1783 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z
1784 * negotiation
1785 * @mode: one of &enum phy_interface_t
1786 *
1787 * Returns true if the PHY interface mode uses the 16-bit negotiation
1788 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1789 */
1790static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
1791{
1792 return mode == PHY_INTERFACE_MODE_1000BASEX ||
1793 mode == PHY_INTERFACE_MODE_2500BASEX;
1794}
1795
1796/**
1797 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1798 * is RGMII (all variants)
1799 * @phydev: the phy_device struct
1800 */
1801static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
1802{
1803 return phy_interface_mode_is_rgmii(mode: phydev->interface);
1804};
1805
1806/**
1807 * phy_is_pseudo_fixed_link - Convenience function for testing if this
1808 * PHY is the CPU port facing side of an Ethernet switch, or similar.
1809 * @phydev: the phy_device struct
1810 */
1811static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
1812{
1813 return phydev->is_pseudo_fixed_link;
1814}
1815
1816int phy_save_page(struct phy_device *phydev);
1817int phy_select_page(struct phy_device *phydev, int page);
1818int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
1819int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
1820int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
1821int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1822 u16 mask, u16 set);
1823int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1824 u16 mask, u16 set);
1825
1826struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
1827 bool is_c45,
1828 struct phy_c45_device_ids *c45_ids);
1829int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id);
1830struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode);
1831struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode);
1832struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode);
1833struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1834int phy_device_register(struct phy_device *phy);
1835void phy_device_free(struct phy_device *phydev);
1836void phy_device_remove(struct phy_device *phydev);
1837int phy_get_c45_ids(struct phy_device *phydev);
1838int phy_init_hw(struct phy_device *phydev);
1839int phy_suspend(struct phy_device *phydev);
1840int phy_resume(struct phy_device *phydev);
1841int __phy_resume(struct phy_device *phydev);
1842int phy_loopback(struct phy_device *phydev, bool enable, int speed);
1843int phy_sfp_connect_phy(void *upstream, struct phy_device *phy);
1844void phy_sfp_disconnect_phy(void *upstream, struct phy_device *phy);
1845void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
1846void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
1847int phy_sfp_probe(struct phy_device *phydev,
1848 const struct sfp_upstream_ops *ops);
1849struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1850 phy_interface_t interface);
1851struct phy_device *phy_find_first(struct mii_bus *bus);
1852int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1853 u32 flags, phy_interface_t interface);
1854int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1855 void (*handler)(struct net_device *),
1856 phy_interface_t interface);
1857struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1858 void (*handler)(struct net_device *),
1859 phy_interface_t interface);
1860void phy_disconnect(struct phy_device *phydev);
1861void phy_detach(struct phy_device *phydev);
1862void phy_start(struct phy_device *phydev);
1863void phy_stop(struct phy_device *phydev);
1864int phy_config_aneg(struct phy_device *phydev);
1865int _phy_start_aneg(struct phy_device *phydev);
1866int phy_start_aneg(struct phy_device *phydev);
1867int phy_aneg_done(struct phy_device *phydev);
1868unsigned int phy_inband_caps(struct phy_device *phydev,
1869 phy_interface_t interface);
1870int phy_config_inband(struct phy_device *phydev, unsigned int modes);
1871int phy_speed_down(struct phy_device *phydev, bool sync);
1872int phy_speed_up(struct phy_device *phydev);
1873bool phy_check_valid(int speed, int duplex, unsigned long *features);
1874
1875int phy_restart_aneg(struct phy_device *phydev);
1876int phy_reset_after_clk_enable(struct phy_device *phydev);
1877
1878#if IS_ENABLED(CONFIG_PHYLIB)
1879int phy_start_cable_test(struct phy_device *phydev,
1880 struct netlink_ext_ack *extack);
1881int phy_start_cable_test_tdr(struct phy_device *phydev,
1882 struct netlink_ext_ack *extack,
1883 const struct phy_tdr_config *config);
1884#else
1885static inline
1886int phy_start_cable_test(struct phy_device *phydev,
1887 struct netlink_ext_ack *extack)
1888{
1889 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1890 return -EOPNOTSUPP;
1891}
1892static inline
1893int phy_start_cable_test_tdr(struct phy_device *phydev,
1894 struct netlink_ext_ack *extack,
1895 const struct phy_tdr_config *config)
1896{
1897 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1898 return -EOPNOTSUPP;
1899}
1900#endif
1901
1902static inline void phy_device_reset(struct phy_device *phydev, int value)
1903{
1904 mdio_device_reset(mdiodev: &phydev->mdio, value);
1905}
1906
1907#define phydev_err(_phydev, format, args...) \
1908 dev_err(&_phydev->mdio.dev, format, ##args)
1909
1910#define phydev_err_probe(_phydev, err, format, args...) \
1911 dev_err_probe(&_phydev->mdio.dev, err, format, ##args)
1912
1913#define phydev_info(_phydev, format, args...) \
1914 dev_info(&_phydev->mdio.dev, format, ##args)
1915
1916#define phydev_warn(_phydev, format, args...) \
1917 dev_warn(&_phydev->mdio.dev, format, ##args)
1918
1919#define phydev_dbg(_phydev, format, args...) \
1920 dev_dbg(&_phydev->mdio.dev, format, ##args)
1921
1922static inline const char *phydev_name(const struct phy_device *phydev)
1923{
1924 return dev_name(dev: &phydev->mdio.dev);
1925}
1926
1927static inline void phy_lock_mdio_bus(struct phy_device *phydev)
1928{
1929 mutex_lock(lock: &phydev->mdio.bus->mdio_lock);
1930}
1931
1932static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
1933{
1934 mutex_unlock(lock: &phydev->mdio.bus->mdio_lock);
1935}
1936
1937void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1938 __printf(2, 3);
1939char *phy_attached_info_irq(struct phy_device *phydev)
1940 __malloc;
1941void phy_attached_info(struct phy_device *phydev);
1942
1943int genphy_match_phy_device(struct phy_device *phydev,
1944 const struct phy_driver *phydrv);
1945
1946/* Clause 22 PHY */
1947int genphy_read_abilities(struct phy_device *phydev);
1948int genphy_setup_forced(struct phy_device *phydev);
1949int genphy_restart_aneg(struct phy_device *phydev);
1950int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1951int __genphy_config_aneg(struct phy_device *phydev, bool changed);
1952int genphy_aneg_done(struct phy_device *phydev);
1953int genphy_update_link(struct phy_device *phydev);
1954int genphy_read_lpa(struct phy_device *phydev);
1955int genphy_read_status_fixed(struct phy_device *phydev);
1956int genphy_read_status(struct phy_device *phydev);
1957int genphy_read_master_slave(struct phy_device *phydev);
1958int genphy_suspend(struct phy_device *phydev);
1959int genphy_resume(struct phy_device *phydev);
1960int genphy_loopback(struct phy_device *phydev, bool enable, int speed);
1961int genphy_soft_reset(struct phy_device *phydev);
1962irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev);
1963
1964static inline int genphy_config_aneg(struct phy_device *phydev)
1965{
1966 return __genphy_config_aneg(phydev, changed: false);
1967}
1968
1969static inline int genphy_no_config_intr(struct phy_device *phydev)
1970{
1971 return 0;
1972}
1973int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1974 u16 regnum);
1975int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1976 u16 regnum, u16 val);
1977
1978/* Clause 37 */
1979int genphy_c37_config_aneg(struct phy_device *phydev);
1980int genphy_c37_read_status(struct phy_device *phydev, bool *changed);
1981
1982/* Clause 45 PHY */
1983int genphy_c45_restart_aneg(struct phy_device *phydev);
1984int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1985int genphy_c45_aneg_done(struct phy_device *phydev);
1986int genphy_c45_read_link(struct phy_device *phydev);
1987int genphy_c45_read_lpa(struct phy_device *phydev);
1988int genphy_c45_read_pma(struct phy_device *phydev);
1989int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1990int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev);
1991int genphy_c45_an_config_aneg(struct phy_device *phydev);
1992int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1993int genphy_c45_read_mdix(struct phy_device *phydev);
1994int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1995int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev);
1996int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev);
1997int genphy_c45_read_eee_abilities(struct phy_device *phydev);
1998int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev);
1999int genphy_c45_read_status(struct phy_device *phydev);
2000int genphy_c45_baset1_read_status(struct phy_device *phydev);
2001int genphy_c45_config_aneg(struct phy_device *phydev);
2002int genphy_c45_loopback(struct phy_device *phydev, bool enable, int speed);
2003int genphy_c45_pma_resume(struct phy_device *phydev);
2004int genphy_c45_pma_suspend(struct phy_device *phydev);
2005int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable);
2006int genphy_c45_plca_get_cfg(struct phy_device *phydev,
2007 struct phy_plca_cfg *plca_cfg);
2008int genphy_c45_plca_set_cfg(struct phy_device *phydev,
2009 const struct phy_plca_cfg *plca_cfg);
2010int genphy_c45_plca_get_status(struct phy_device *phydev,
2011 struct phy_plca_status *plca_st);
2012int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *lp);
2013int genphy_c45_ethtool_get_eee(struct phy_device *phydev,
2014 struct ethtool_keee *data);
2015int genphy_c45_ethtool_set_eee(struct phy_device *phydev,
2016 struct ethtool_keee *data);
2017int genphy_c45_an_config_eee_aneg(struct phy_device *phydev);
2018
2019/* The gen10g_* functions are the old Clause 45 stub */
2020int gen10g_config_aneg(struct phy_device *phydev);
2021
2022static inline int phy_read_status(struct phy_device *phydev)
2023{
2024 if (!phydev->drv)
2025 return -EIO;
2026
2027 if (phydev->drv->read_status)
2028 return phydev->drv->read_status(phydev);
2029 else
2030 return genphy_read_status(phydev);
2031}
2032
2033void phy_drivers_unregister(struct phy_driver *drv, int n);
2034int phy_drivers_register(struct phy_driver *new_driver, int n,
2035 struct module *owner);
2036void phy_error(struct phy_device *phydev);
2037void phy_state_machine(struct work_struct *work);
2038void phy_trigger_machine(struct phy_device *phydev);
2039void phy_mac_interrupt(struct phy_device *phydev);
2040void phy_start_machine(struct phy_device *phydev);
2041void phy_stop_machine(struct phy_device *phydev);
2042void phy_ethtool_ksettings_get(struct phy_device *phydev,
2043 struct ethtool_link_ksettings *cmd);
2044int phy_ethtool_ksettings_set(struct phy_device *phydev,
2045 const struct ethtool_link_ksettings *cmd);
2046int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
2047int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
2048int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
2049int phy_disable_interrupts(struct phy_device *phydev);
2050void phy_request_interrupt(struct phy_device *phydev);
2051void phy_free_interrupt(struct phy_device *phydev);
2052void phy_print_status(struct phy_device *phydev);
2053int phy_get_rate_matching(struct phy_device *phydev,
2054 phy_interface_t iface);
2055void phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
2056void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
2057void phy_advertise_supported(struct phy_device *phydev);
2058void phy_advertise_eee_all(struct phy_device *phydev);
2059void phy_support_sym_pause(struct phy_device *phydev);
2060void phy_support_asym_pause(struct phy_device *phydev);
2061void phy_support_eee(struct phy_device *phydev);
2062void phy_disable_eee(struct phy_device *phydev);
2063void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
2064 bool autoneg);
2065void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
2066bool phy_validate_pause(struct phy_device *phydev,
2067 struct ethtool_pauseparam *pp);
2068void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
2069
2070s32 phy_get_internal_delay(struct phy_device *phydev, const int *delay_values,
2071 int size, bool is_rx);
2072
2073int phy_get_tx_amplitude_gain(struct phy_device *phydev, struct device *dev,
2074 enum ethtool_link_mode_bit_indices linkmode,
2075 u32 *val);
2076
2077int phy_get_mac_termination(struct phy_device *phydev, struct device *dev,
2078 u32 *val);
2079
2080void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
2081 bool *tx_pause, bool *rx_pause);
2082
2083int phy_register_fixup_for_id(const char *bus_id,
2084 int (*run)(struct phy_device *));
2085int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
2086 int (*run)(struct phy_device *));
2087
2088int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
2089int phy_unregister_fixup_for_id(const char *bus_id);
2090int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
2091
2092int phy_eee_tx_clock_stop_capable(struct phy_device *phydev);
2093int phy_eee_rx_clock_stop(struct phy_device *phydev, bool clk_stop_enable);
2094int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
2095int phy_get_eee_err(struct phy_device *phydev);
2096int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data);
2097int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data);
2098int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
2099void phy_ethtool_get_wol(struct phy_device *phydev,
2100 struct ethtool_wolinfo *wol);
2101int phy_ethtool_get_link_ksettings(struct net_device *ndev,
2102 struct ethtool_link_ksettings *cmd);
2103int phy_ethtool_set_link_ksettings(struct net_device *ndev,
2104 const struct ethtool_link_ksettings *cmd);
2105int phy_ethtool_nway_reset(struct net_device *ndev);
2106
2107int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data);
2108int phy_ethtool_get_sset_count(struct phy_device *phydev);
2109int phy_ethtool_get_stats(struct phy_device *phydev,
2110 struct ethtool_stats *stats, u64 *data);
2111
2112void __phy_ethtool_get_phy_stats(struct phy_device *phydev,
2113 struct ethtool_eth_phy_stats *phy_stats,
2114 struct ethtool_phy_stats *phydev_stats);
2115void __phy_ethtool_get_link_ext_stats(struct phy_device *phydev,
2116 struct ethtool_link_ext_stats *link_stats);
2117
2118int phy_ethtool_get_plca_cfg(struct phy_device *phydev,
2119 struct phy_plca_cfg *plca_cfg);
2120int phy_ethtool_set_plca_cfg(struct phy_device *phydev,
2121 const struct phy_plca_cfg *plca_cfg,
2122 struct netlink_ext_ack *extack);
2123int phy_ethtool_get_plca_status(struct phy_device *phydev,
2124 struct phy_plca_status *plca_st);
2125
2126int __phy_hwtstamp_get(struct phy_device *phydev,
2127 struct kernel_hwtstamp_config *config);
2128int __phy_hwtstamp_set(struct phy_device *phydev,
2129 struct kernel_hwtstamp_config *config,
2130 struct netlink_ext_ack *extack);
2131
2132extern const struct bus_type mdio_bus_type;
2133extern const struct class mdio_bus_class;
2134
2135/**
2136 * phy_module_driver() - Helper macro for registering PHY drivers
2137 * @__phy_drivers: array of PHY drivers to register
2138 * @__count: Numbers of members in array
2139 *
2140 * Helper macro for PHY drivers which do not do anything special in module
2141 * init/exit. Each module may only use this macro once, and calling it
2142 * replaces module_init() and module_exit().
2143 */
2144#define phy_module_driver(__phy_drivers, __count) \
2145static int __init phy_module_init(void) \
2146{ \
2147 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
2148} \
2149module_init(phy_module_init); \
2150static void __exit phy_module_exit(void) \
2151{ \
2152 phy_drivers_unregister(__phy_drivers, __count); \
2153} \
2154module_exit(phy_module_exit)
2155
2156#define module_phy_driver(__phy_drivers) \
2157 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
2158
2159#endif /* __PHY_H */
2160