| 1 | /* | 
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| 2 | * include/linux/serial.h | 
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| 3 | * | 
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| 4 | * Copyright (C) 1992 by Theodore Ts'o. | 
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| 5 | * | 
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| 6 | * Redistribution of this file is permitted under the terms of the GNU | 
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| 7 | * Public License (GPL) | 
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| 8 | */ | 
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| 9 | #ifndef _LINUX_SERIAL_H | 
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| 10 | #define _LINUX_SERIAL_H | 
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| 11 |  | 
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| 12 | #include <uapi/linux/serial.h> | 
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| 13 | #include <uapi/linux/serial_reg.h> | 
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| 14 |  | 
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| 15 | #define UART_IER_ALL_INTR	(UART_IER_MSI | \ | 
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| 16 | UART_IER_RLSI | \ | 
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| 17 | UART_IER_THRI | \ | 
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| 18 | UART_IER_RDI) | 
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| 19 |  | 
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| 20 | /* Helper for dealing with UART_LCR_WLEN* defines */ | 
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| 21 | #define UART_LCR_WLEN(x)	((x) - 5) | 
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| 22 |  | 
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| 23 | /* FIFO and shifting register empty */ | 
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| 24 | #define UART_LSR_BOTH_EMPTY	(UART_LSR_TEMT | UART_LSR_THRE) | 
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| 25 |  | 
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| 26 | static inline bool uart_lsr_tx_empty(u16 lsr) | 
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| 27 | { | 
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| 28 | return (lsr & UART_LSR_BOTH_EMPTY) == UART_LSR_BOTH_EMPTY; | 
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| 29 | } | 
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| 30 |  | 
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| 31 | #define UART_MSR_STATUS_BITS	(UART_MSR_DCD | \ | 
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| 32 | UART_MSR_RI | \ | 
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| 33 | UART_MSR_DSR | \ | 
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| 34 | UART_MSR_CTS) | 
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| 35 |  | 
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| 36 | /* | 
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| 37 | * Counters of the input lines (CTS, DSR, RI, CD) interrupts | 
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| 38 | */ | 
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| 39 |  | 
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| 40 | struct async_icount { | 
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| 41 | __u32	cts, dsr, rng, dcd, tx, rx; | 
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| 42 | __u32	frame, parity, overrun, brk; | 
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| 43 | __u32	buf_overrun; | 
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| 44 | }; | 
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| 45 |  | 
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| 46 | #include <linux/compiler.h> | 
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| 47 |  | 
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| 48 | #endif /* _LINUX_SERIAL_H */ | 
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| 49 |  | 
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