| 1 | // SPDX-License-Identifier: GPL-2.0 | 
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| 2 | /* | 
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| 3 | * FPU signal frame handling routines. | 
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| 4 | */ | 
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| 5 |  | 
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| 6 | #include <linux/compat.h> | 
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| 7 | #include <linux/cpu.h> | 
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| 8 | #include <linux/pagemap.h> | 
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| 9 |  | 
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| 10 | #include <asm/fpu/signal.h> | 
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| 11 | #include <asm/fpu/regset.h> | 
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| 12 | #include <asm/fpu/xstate.h> | 
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| 13 |  | 
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| 14 | #include <asm/sigframe.h> | 
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| 15 | #include <asm/trapnr.h> | 
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| 16 | #include <asm/trace/fpu.h> | 
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| 17 |  | 
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| 18 | #include "context.h" | 
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| 19 | #include "internal.h" | 
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| 20 | #include "legacy.h" | 
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| 21 | #include "xstate.h" | 
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| 22 |  | 
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| 23 | /* | 
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| 24 | * Check for the presence of extended state information in the | 
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| 25 | * user fpstate pointer in the sigcontext. | 
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| 26 | */ | 
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| 27 | static inline bool check_xstate_in_sigframe(struct fxregs_state __user *fxbuf, | 
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| 28 | struct _fpx_sw_bytes *fx_sw) | 
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| 29 | { | 
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| 30 | void __user *fpstate = fxbuf; | 
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| 31 | unsigned int magic2; | 
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| 32 |  | 
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| 33 | if (__copy_from_user(to: fx_sw, from: &fxbuf->sw_reserved[0], n: sizeof(*fx_sw))) | 
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| 34 | return false; | 
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| 35 |  | 
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| 36 | /* Check for the first magic field */ | 
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| 37 | if (fx_sw->magic1 != FP_XSTATE_MAGIC1) | 
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| 38 | goto setfx; | 
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| 39 |  | 
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| 40 | /* | 
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| 41 | * Check for the presence of second magic word at the end of memory | 
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| 42 | * layout. This detects the case where the user just copied the legacy | 
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| 43 | * fpstate layout with out copying the extended state information | 
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| 44 | * in the memory layout. | 
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| 45 | */ | 
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| 46 | if (__get_user(magic2, (__u32 __user *)(fpstate + x86_task_fpu(current)->fpstate->user_size))) | 
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| 47 | return false; | 
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| 48 |  | 
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| 49 | if (likely(magic2 == FP_XSTATE_MAGIC2)) | 
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| 50 | return true; | 
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| 51 | setfx: | 
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| 52 | trace_x86_fpu_xstate_check_failed(fpu: x86_task_fpu(current)); | 
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| 53 |  | 
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| 54 | /* Set the parameters for fx only state */ | 
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| 55 | fx_sw->magic1 = 0; | 
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| 56 | fx_sw->xstate_size = sizeof(struct fxregs_state); | 
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| 57 | fx_sw->xfeatures = XFEATURE_MASK_FPSSE; | 
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| 58 | return true; | 
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| 59 | } | 
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| 60 |  | 
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| 61 | /* | 
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| 62 | * Signal frame handlers. | 
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| 63 | */ | 
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| 64 | static inline bool (struct task_struct *tsk, void __user *buf) | 
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| 65 | { | 
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| 66 | if (use_fxsr()) { | 
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| 67 | struct xregs_state *xsave = &x86_task_fpu(task: tsk)->fpstate->regs.xsave; | 
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| 68 | struct user_i387_ia32_struct env; | 
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| 69 | struct _fpstate_32 __user *fp = buf; | 
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| 70 |  | 
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| 71 | fpregs_lock(); | 
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| 72 | if (!test_thread_flag(TIF_NEED_FPU_LOAD)) | 
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| 73 | fxsave(fx: &x86_task_fpu(task: tsk)->fpstate->regs.fxsave); | 
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| 74 | fpregs_unlock(); | 
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| 75 |  | 
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| 76 | convert_from_fxsr(env: &env, tsk); | 
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| 77 |  | 
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| 78 | if (__copy_to_user(to: buf, from: &env, n: sizeof(env)) || | 
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| 79 | __put_user(xsave->i387.swd, &fp->status) || | 
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| 80 | __put_user(X86_FXSR_MAGIC, &fp->magic)) | 
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| 81 | return false; | 
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| 82 | } else { | 
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| 83 | struct fregs_state __user *fp = buf; | 
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| 84 | u32 swd; | 
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| 85 |  | 
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| 86 | if (__get_user(swd, &fp->swd) || __put_user(swd, &fp->status)) | 
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| 87 | return false; | 
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| 88 | } | 
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| 89 |  | 
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| 90 | return true; | 
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| 91 | } | 
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| 92 |  | 
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| 93 | /* | 
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| 94 | * Prepare the SW reserved portion of the fxsave memory layout, indicating | 
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| 95 | * the presence of the extended state information in the memory layout | 
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| 96 | * pointed to by the fpstate pointer in the sigcontext. | 
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| 97 | * This is saved when ever the FP and extended state context is | 
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| 98 | * saved on the user stack during the signal handler delivery to the user. | 
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| 99 | */ | 
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| 100 | static inline void save_sw_bytes(struct _fpx_sw_bytes *sw_bytes, bool ia32_frame, | 
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| 101 | struct fpstate *fpstate) | 
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| 102 | { | 
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| 103 | sw_bytes->magic1 = FP_XSTATE_MAGIC1; | 
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| 104 | sw_bytes->extended_size = fpstate->user_size + FP_XSTATE_MAGIC2_SIZE; | 
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| 105 | sw_bytes->xfeatures = fpstate->user_xfeatures; | 
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| 106 | sw_bytes->xstate_size = fpstate->user_size; | 
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| 107 |  | 
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| 108 | if (ia32_frame) | 
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| 109 | sw_bytes->extended_size += sizeof(struct fregs_state); | 
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| 110 | } | 
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| 111 |  | 
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| 112 | static inline bool save_xstate_epilog(void __user *buf, int ia32_frame, | 
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| 113 | struct fpstate *fpstate) | 
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| 114 | { | 
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| 115 | struct xregs_state __user *x = buf; | 
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| 116 | struct _fpx_sw_bytes sw_bytes = {}; | 
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| 117 | int err; | 
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| 118 |  | 
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| 119 | /* Setup the bytes not touched by the [f]xsave and reserved for SW. */ | 
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| 120 | save_sw_bytes(sw_bytes: &sw_bytes, ia32_frame, fpstate); | 
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| 121 | err = __copy_to_user(to: &x->i387.sw_reserved, from: &sw_bytes, n: sizeof(sw_bytes)); | 
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| 122 |  | 
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| 123 | if (!use_xsave()) | 
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| 124 | return !err; | 
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| 125 |  | 
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| 126 | err |= __put_user(FP_XSTATE_MAGIC2, | 
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| 127 | (__u32 __user *)(buf + fpstate->user_size)); | 
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| 128 |  | 
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| 129 | /* | 
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| 130 | * For legacy compatible, we always set FP/SSE bits in the bit | 
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| 131 | * vector while saving the state to the user context. This will | 
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| 132 | * enable us capturing any changes(during sigreturn) to | 
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| 133 | * the FP/SSE bits by the legacy applications which don't touch | 
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| 134 | * xfeatures in the xsave header. | 
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| 135 | * | 
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| 136 | * xsave aware apps can change the xfeatures in the xsave | 
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| 137 | * header as well as change any contents in the memory layout. | 
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| 138 | * xrestore as part of sigreturn will capture all the changes. | 
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| 139 | */ | 
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| 140 | err |= set_xfeature_in_sigframe(xbuf: x, XFEATURE_MASK_FPSSE); | 
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| 141 |  | 
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| 142 | return !err; | 
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| 143 | } | 
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| 144 |  | 
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| 145 | static inline int copy_fpregs_to_sigframe(struct xregs_state __user *buf, u32 pkru) | 
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| 146 | { | 
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| 147 | if (use_xsave()) | 
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| 148 | return xsave_to_user_sigframe(buf, pkru); | 
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| 149 |  | 
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| 150 | if (use_fxsr()) | 
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| 151 | return fxsave_to_user_sigframe(fx: (struct fxregs_state __user *) buf); | 
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| 152 | else | 
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| 153 | return fnsave_to_user_sigframe(fx: (struct fregs_state __user *) buf); | 
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| 154 | } | 
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| 155 |  | 
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| 156 | /* | 
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| 157 | * Save the fpu, extended register state to the user signal frame. | 
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| 158 | * | 
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| 159 | * 'buf_fx' is the 64-byte aligned pointer at which the [f|fx|x]save | 
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| 160 | *  state is copied. | 
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| 161 | *  'buf' points to the 'buf_fx' or to the fsave header followed by 'buf_fx'. | 
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| 162 | * | 
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| 163 | *	buf == buf_fx for 64-bit frames and 32-bit fsave frame. | 
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| 164 | *	buf != buf_fx for 32-bit frames with fxstate. | 
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| 165 | * | 
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| 166 | * Save it directly to the user frame with disabled page fault handler. If | 
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| 167 | * that faults, try to clear the frame which handles the page fault. | 
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| 168 | * | 
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| 169 | * If this is a 32-bit frame with fxstate, put a fsave header before | 
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| 170 | * the aligned state at 'buf_fx'. | 
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| 171 | * | 
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| 172 | * For [f]xsave state, update the SW reserved fields in the [f]xsave frame | 
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| 173 | * indicating the absence/presence of the extended state to the user. | 
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| 174 | */ | 
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| 175 | bool copy_fpstate_to_sigframe(void __user *buf, void __user *buf_fx, int size, u32 pkru) | 
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| 176 | { | 
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| 177 | struct task_struct *tsk = current; | 
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| 178 | struct fpstate *fpstate = x86_task_fpu(task: tsk)->fpstate; | 
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| 179 | bool ia32_fxstate = (buf != buf_fx); | 
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| 180 | int ret; | 
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| 181 |  | 
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| 182 | ia32_fxstate &= (IS_ENABLED(CONFIG_X86_32) || | 
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| 183 | IS_ENABLED(CONFIG_IA32_EMULATION)); | 
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| 184 |  | 
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| 185 | if (!static_cpu_has(X86_FEATURE_FPU)) { | 
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| 186 | struct user_i387_ia32_struct fp; | 
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| 187 |  | 
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| 188 | fpregs_soft_get(current, NULL, (struct membuf){.p = &fp, | 
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| 189 | .left = sizeof(fp)}); | 
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| 190 | return !copy_to_user(to: buf, from: &fp, n: sizeof(fp)); | 
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| 191 | } | 
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| 192 |  | 
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| 193 | if (!access_ok(buf, size)) | 
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| 194 | return false; | 
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| 195 |  | 
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| 196 | if (use_xsave()) { | 
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| 197 | struct xregs_state __user *xbuf = buf_fx; | 
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| 198 |  | 
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| 199 | /* | 
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| 200 | * Clear the xsave header first, so that reserved fields are | 
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| 201 | * initialized to zero. | 
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| 202 | */ | 
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| 203 | if (__clear_user(addr: &xbuf->header, size: sizeof(xbuf->header))) | 
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| 204 | return false; | 
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| 205 | } | 
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| 206 | retry: | 
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| 207 | /* | 
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| 208 | * Load the FPU registers if they are not valid for the current task. | 
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| 209 | * With a valid FPU state we can attempt to save the state directly to | 
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| 210 | * userland's stack frame which will likely succeed. If it does not, | 
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| 211 | * resolve the fault in the user memory and try again. | 
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| 212 | */ | 
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| 213 | fpregs_lock(); | 
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| 214 | if (test_thread_flag(TIF_NEED_FPU_LOAD)) | 
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| 215 | fpregs_restore_userregs(); | 
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| 216 |  | 
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| 217 | pagefault_disable(); | 
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| 218 | ret = copy_fpregs_to_sigframe(buf: buf_fx, pkru); | 
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| 219 | pagefault_enable(); | 
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| 220 | fpregs_unlock(); | 
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| 221 |  | 
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| 222 | if (ret) { | 
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| 223 | if (!__clear_user(addr: buf_fx, size: fpstate->user_size)) | 
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| 224 | goto retry; | 
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| 225 | return false; | 
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| 226 | } | 
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| 227 |  | 
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| 228 | /* Save the fsave header for the 32-bit frames. */ | 
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| 229 | if ((ia32_fxstate || !use_fxsr()) && !save_fsave_header(tsk, buf)) | 
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| 230 | return false; | 
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| 231 |  | 
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| 232 | if (use_fxsr() && !save_xstate_epilog(buf: buf_fx, ia32_frame: ia32_fxstate, fpstate)) | 
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| 233 | return false; | 
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| 234 |  | 
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| 235 | return true; | 
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| 236 | } | 
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| 237 |  | 
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| 238 | static int __restore_fpregs_from_user(void __user *buf, u64 ufeatures, | 
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| 239 | u64 xrestore, bool fx_only) | 
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| 240 | { | 
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| 241 | if (use_xsave()) { | 
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| 242 | u64 init_bv = ufeatures & ~xrestore; | 
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| 243 | int ret; | 
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| 244 |  | 
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| 245 | if (likely(!fx_only)) | 
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| 246 | ret = xrstor_from_user_sigframe(buf, mask: xrestore); | 
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| 247 | else | 
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| 248 | ret = fxrstor_from_user_sigframe(fx: buf); | 
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| 249 |  | 
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| 250 | if (!ret && unlikely(init_bv)) | 
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| 251 | os_xrstor(fpstate: &init_fpstate, mask: init_bv); | 
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| 252 | return ret; | 
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| 253 | } else if (use_fxsr()) { | 
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| 254 | return fxrstor_from_user_sigframe(fx: buf); | 
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| 255 | } else { | 
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| 256 | return frstor_from_user_sigframe(fx: buf); | 
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| 257 | } | 
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| 258 | } | 
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| 259 |  | 
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| 260 | /* | 
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| 261 | * Attempt to restore the FPU registers directly from user memory. | 
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| 262 | * Pagefaults are handled and any errors returned are fatal. | 
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| 263 | */ | 
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| 264 | static bool restore_fpregs_from_user(void __user *buf, u64 xrestore, bool fx_only) | 
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| 265 | { | 
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| 266 | struct fpu *fpu = x86_task_fpu(current); | 
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| 267 | int ret; | 
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| 268 |  | 
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| 269 | /* Restore enabled features only. */ | 
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| 270 | xrestore &= fpu->fpstate->user_xfeatures; | 
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| 271 | retry: | 
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| 272 | fpregs_lock(); | 
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| 273 | /* Ensure that XFD is up to date */ | 
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| 274 | xfd_update_state(fpstate: fpu->fpstate); | 
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| 275 | pagefault_disable(); | 
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| 276 | ret = __restore_fpregs_from_user(buf, ufeatures: fpu->fpstate->user_xfeatures, | 
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| 277 | xrestore, fx_only); | 
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| 278 | pagefault_enable(); | 
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| 279 |  | 
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| 280 | if (unlikely(ret)) { | 
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| 281 | /* | 
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| 282 | * The above did an FPU restore operation, restricted to | 
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| 283 | * the user portion of the registers, and failed, but the | 
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| 284 | * microcode might have modified the FPU registers | 
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| 285 | * nevertheless. | 
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| 286 | * | 
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| 287 | * If the FPU registers do not belong to current, then | 
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| 288 | * invalidate the FPU register state otherwise the task | 
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| 289 | * might preempt current and return to user space with | 
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| 290 | * corrupted FPU registers. | 
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| 291 | */ | 
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| 292 | if (test_thread_flag(TIF_NEED_FPU_LOAD)) | 
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| 293 | __cpu_invalidate_fpregs_state(); | 
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| 294 | fpregs_unlock(); | 
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| 295 |  | 
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| 296 | /* Try to handle #PF, but anything else is fatal. */ | 
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| 297 | if (ret != X86_TRAP_PF) | 
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| 298 | return false; | 
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| 299 |  | 
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| 300 | if (!fault_in_readable(uaddr: buf, size: fpu->fpstate->user_size)) | 
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| 301 | goto retry; | 
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| 302 | return false; | 
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| 303 | } | 
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| 304 |  | 
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| 305 | /* | 
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| 306 | * Restore supervisor states: previous context switch etc has done | 
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| 307 | * XSAVES and saved the supervisor states in the kernel buffer from | 
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| 308 | * which they can be restored now. | 
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| 309 | * | 
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| 310 | * It would be optimal to handle this with a single XRSTORS, but | 
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| 311 | * this does not work because the rest of the FPU registers have | 
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| 312 | * been restored from a user buffer directly. | 
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| 313 | */ | 
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| 314 | if (test_thread_flag(TIF_NEED_FPU_LOAD) && xfeatures_mask_supervisor()) | 
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| 315 | os_xrstor_supervisor(fpstate: fpu->fpstate); | 
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| 316 |  | 
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| 317 | fpregs_mark_activate(); | 
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| 318 | fpregs_unlock(); | 
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| 319 | return true; | 
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| 320 | } | 
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| 321 |  | 
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| 322 | static bool __fpu_restore_sig(void __user *buf, void __user *buf_fx, | 
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| 323 | bool ia32_fxstate) | 
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| 324 | { | 
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| 325 | struct task_struct *tsk = current; | 
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| 326 | struct fpu *fpu = x86_task_fpu(task: tsk); | 
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| 327 | struct user_i387_ia32_struct env; | 
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| 328 | bool success, fx_only = false; | 
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| 329 | union fpregs_state *fpregs; | 
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| 330 | u64 user_xfeatures = 0; | 
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| 331 |  | 
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| 332 | if (use_xsave()) { | 
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| 333 | struct _fpx_sw_bytes fx_sw_user; | 
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| 334 |  | 
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| 335 | if (!check_xstate_in_sigframe(fxbuf: buf_fx, fx_sw: &fx_sw_user)) | 
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| 336 | return false; | 
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| 337 |  | 
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| 338 | fx_only = !fx_sw_user.magic1; | 
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| 339 | user_xfeatures = fx_sw_user.xfeatures; | 
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| 340 | } else { | 
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| 341 | user_xfeatures = XFEATURE_MASK_FPSSE; | 
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| 342 | } | 
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| 343 |  | 
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| 344 | if (likely(!ia32_fxstate)) { | 
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| 345 | /* Restore the FPU registers directly from user memory. */ | 
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| 346 | return restore_fpregs_from_user(buf: buf_fx, xrestore: user_xfeatures, fx_only); | 
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| 347 | } | 
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| 348 |  | 
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| 349 | /* | 
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| 350 | * Copy the legacy state because the FP portion of the FX frame has | 
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| 351 | * to be ignored for histerical raisins. The legacy state is folded | 
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| 352 | * in once the larger state has been copied. | 
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| 353 | */ | 
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| 354 | if (__copy_from_user(to: &env, from: buf, n: sizeof(env))) | 
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| 355 | return false; | 
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| 356 |  | 
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| 357 | /* | 
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| 358 | * By setting TIF_NEED_FPU_LOAD it is ensured that our xstate is | 
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| 359 | * not modified on context switch and that the xstate is considered | 
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| 360 | * to be loaded again on return to userland (overriding last_cpu avoids | 
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| 361 | * the optimisation). | 
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| 362 | */ | 
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| 363 | fpregs_lock(); | 
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| 364 | if (!test_thread_flag(TIF_NEED_FPU_LOAD)) { | 
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| 365 | /* | 
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| 366 | * If supervisor states are available then save the | 
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| 367 | * hardware state in current's fpstate so that the | 
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| 368 | * supervisor state is preserved. Save the full state for | 
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| 369 | * simplicity. There is no point in optimizing this by only | 
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| 370 | * saving the supervisor states and then shuffle them to | 
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| 371 | * the right place in memory. It's ia32 mode. Shrug. | 
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| 372 | */ | 
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| 373 | if (xfeatures_mask_supervisor()) | 
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| 374 | os_xsave(fpstate: fpu->fpstate); | 
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| 375 | set_thread_flag(TIF_NEED_FPU_LOAD); | 
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| 376 | } | 
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| 377 | __fpu_invalidate_fpregs_state(fpu); | 
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| 378 | __cpu_invalidate_fpregs_state(); | 
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| 379 | fpregs_unlock(); | 
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| 380 |  | 
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| 381 | fpregs = &fpu->fpstate->regs; | 
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| 382 | if (use_xsave() && !fx_only) { | 
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| 383 | if (copy_sigframe_from_user_to_xstate(tsk, ubuf: buf_fx)) | 
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| 384 | return false; | 
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| 385 | } else { | 
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| 386 | if (__copy_from_user(to: &fpregs->fxsave, from: buf_fx, | 
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| 387 | n: sizeof(fpregs->fxsave))) | 
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| 388 | return false; | 
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| 389 |  | 
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| 390 | if (IS_ENABLED(CONFIG_X86_64)) { | 
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| 391 | /* Reject invalid MXCSR values. */ | 
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| 392 | if (fpregs->fxsave.mxcsr & ~mxcsr_feature_mask) | 
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| 393 | return false; | 
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| 394 | } else { | 
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| 395 | /* Mask invalid bits out for historical reasons (broken hardware). */ | 
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| 396 | fpregs->fxsave.mxcsr &= mxcsr_feature_mask; | 
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| 397 | } | 
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| 398 |  | 
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| 399 | /* Enforce XFEATURE_MASK_FPSSE when XSAVE is enabled */ | 
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| 400 | if (use_xsave()) | 
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| 401 | fpregs->xsave.header.xfeatures |= XFEATURE_MASK_FPSSE; | 
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| 402 | } | 
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| 403 |  | 
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| 404 | /* Fold the legacy FP storage */ | 
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| 405 | convert_to_fxsr(fxsave: &fpregs->fxsave, env: &env); | 
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| 406 |  | 
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| 407 | fpregs_lock(); | 
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| 408 | if (use_xsave()) { | 
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| 409 | /* | 
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| 410 | * Remove all UABI feature bits not set in user_xfeatures | 
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| 411 | * from the memory xstate header which makes the full | 
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| 412 | * restore below bring them into init state. This works for | 
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| 413 | * fx_only mode as well because that has only FP and SSE | 
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| 414 | * set in user_xfeatures. | 
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| 415 | * | 
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| 416 | * Preserve supervisor states! | 
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| 417 | */ | 
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| 418 | u64 mask = user_xfeatures | xfeatures_mask_supervisor(); | 
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| 419 |  | 
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| 420 | fpregs->xsave.header.xfeatures &= mask; | 
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| 421 | success = !os_xrstor_safe(fpstate: fpu->fpstate, | 
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| 422 | mask: fpu_kernel_cfg.max_features); | 
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| 423 | } else { | 
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| 424 | success = !fxrstor_safe(fx: &fpregs->fxsave); | 
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| 425 | } | 
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| 426 |  | 
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| 427 | if (likely(success)) | 
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| 428 | fpregs_mark_activate(); | 
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| 429 |  | 
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| 430 | fpregs_unlock(); | 
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| 431 | return success; | 
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| 432 | } | 
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| 433 |  | 
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| 434 | static inline unsigned int xstate_sigframe_size(struct fpstate *fpstate) | 
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| 435 | { | 
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| 436 | unsigned int size = fpstate->user_size; | 
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| 437 |  | 
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| 438 | return use_xsave() ? size + FP_XSTATE_MAGIC2_SIZE : size; | 
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| 439 | } | 
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| 440 |  | 
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| 441 | /* | 
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| 442 | * Restore FPU state from a sigframe: | 
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| 443 | */ | 
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| 444 | bool fpu__restore_sig(void __user *buf, int ia32_frame) | 
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| 445 | { | 
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| 446 | struct fpu *fpu = x86_task_fpu(current); | 
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| 447 | void __user *buf_fx = buf; | 
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| 448 | bool ia32_fxstate = false; | 
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| 449 | bool success = false; | 
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| 450 | unsigned int size; | 
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| 451 |  | 
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| 452 | if (unlikely(!buf)) { | 
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| 453 | fpu__clear_user_states(fpu); | 
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| 454 | return true; | 
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| 455 | } | 
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| 456 |  | 
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| 457 | size = xstate_sigframe_size(fpstate: fpu->fpstate); | 
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| 458 |  | 
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| 459 | ia32_frame &= (IS_ENABLED(CONFIG_X86_32) || | 
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| 460 | IS_ENABLED(CONFIG_IA32_EMULATION)); | 
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| 461 |  | 
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| 462 | /* | 
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| 463 | * Only FXSR enabled systems need the FX state quirk. | 
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| 464 | * FRSTOR does not need it and can use the fast path. | 
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| 465 | */ | 
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| 466 | if (ia32_frame && use_fxsr()) { | 
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| 467 | buf_fx = buf + sizeof(struct fregs_state); | 
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| 468 | size += sizeof(struct fregs_state); | 
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| 469 | ia32_fxstate = true; | 
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| 470 | } | 
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| 471 |  | 
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| 472 | if (!access_ok(buf, size)) | 
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| 473 | goto out; | 
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| 474 |  | 
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| 475 | if (!IS_ENABLED(CONFIG_X86_64) && !cpu_feature_enabled(X86_FEATURE_FPU)) { | 
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| 476 | success = !fpregs_soft_set(current, NULL, 0, | 
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| 477 | sizeof(struct user_i387_ia32_struct), | 
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| 478 | NULL, buf); | 
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| 479 | } else { | 
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| 480 | success = __fpu_restore_sig(buf, buf_fx, ia32_fxstate); | 
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| 481 | } | 
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| 482 |  | 
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| 483 | out: | 
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| 484 | if (unlikely(!success)) | 
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| 485 | fpu__clear_user_states(fpu); | 
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| 486 | return success; | 
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| 487 | } | 
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| 488 |  | 
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| 489 | unsigned long | 
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| 490 | fpu__alloc_mathframe(unsigned long sp, int ia32_frame, | 
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| 491 | unsigned long *buf_fx, unsigned long *size) | 
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| 492 | { | 
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| 493 | unsigned long frame_size = xstate_sigframe_size(fpstate: x86_task_fpu(current)->fpstate); | 
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| 494 |  | 
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| 495 | *buf_fx = sp = round_down(sp - frame_size, 64); | 
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| 496 | if (ia32_frame && use_fxsr()) { | 
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| 497 | frame_size += sizeof(struct fregs_state); | 
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| 498 | sp -= sizeof(struct fregs_state); | 
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| 499 | } | 
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| 500 |  | 
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| 501 | *size = frame_size; | 
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| 502 |  | 
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| 503 | return sp; | 
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| 504 | } | 
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| 505 |  | 
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| 506 | unsigned long __init fpu__get_fpstate_size(void) | 
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| 507 | { | 
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| 508 | unsigned long ret = fpu_user_cfg.max_size; | 
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| 509 |  | 
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| 510 | if (use_xsave()) | 
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| 511 | ret += FP_XSTATE_MAGIC2_SIZE; | 
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| 512 |  | 
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| 513 | /* | 
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| 514 | * This space is needed on (most) 32-bit kernels, or when a 32-bit | 
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| 515 | * app is running on a 64-bit kernel. To keep things simple, just | 
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| 516 | * assume the worst case and always include space for 'freg_state', | 
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| 517 | * even for 64-bit apps on 64-bit kernels. This wastes a bit of | 
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| 518 | * space, but keeps the code simple. | 
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| 519 | */ | 
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| 520 | if ((IS_ENABLED(CONFIG_IA32_EMULATION) || | 
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| 521 | IS_ENABLED(CONFIG_X86_32)) && use_fxsr()) | 
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| 522 | ret += sizeof(struct fregs_state); | 
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| 523 |  | 
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| 524 | return ret; | 
|---|
| 525 | } | 
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| 526 |  | 
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| 527 |  | 
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