| 1 | /* SPDX-License-Identifier: MIT */ | 
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| 2 | /* | 
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| 3 | * Copyright © 2021 Intel Corporation | 
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| 4 | */ | 
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| 5 |  | 
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| 6 | #include <drm/drm_framebuffer.h> | 
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| 7 |  | 
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| 8 | #include "gem/i915_gem_object.h" | 
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| 9 |  | 
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| 10 | #include "i915_drv.h" | 
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| 11 | #include "intel_display_core.h" | 
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| 12 | #include "intel_display_types.h" | 
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| 13 | #include "intel_fb.h" | 
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| 14 | #include "intel_fb_bo.h" | 
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| 15 |  | 
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| 16 | void intel_fb_bo_framebuffer_fini(struct drm_gem_object *obj) | 
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| 17 | { | 
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| 18 | /* Nothing to do for i915 */ | 
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| 19 | } | 
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| 20 |  | 
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| 21 | int intel_fb_bo_framebuffer_init(struct drm_framebuffer *fb, | 
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| 22 | struct drm_gem_object *_obj, | 
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| 23 | struct drm_mode_fb_cmd2 *mode_cmd) | 
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| 24 | { | 
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| 25 | struct drm_i915_gem_object *obj = to_intel_bo(gem: _obj); | 
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| 26 | struct intel_display *display = to_intel_display(obj->base.dev); | 
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| 27 | unsigned int tiling, stride; | 
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| 28 |  | 
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| 29 | i915_gem_object_lock(obj, NULL); | 
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| 30 | tiling = i915_gem_object_get_tiling(obj); | 
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| 31 | stride = i915_gem_object_get_stride(obj); | 
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| 32 | i915_gem_object_unlock(obj); | 
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| 33 |  | 
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| 34 | if (mode_cmd->flags & DRM_MODE_FB_MODIFIERS) { | 
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| 35 | /* | 
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| 36 | * If there's a fence, enforce that | 
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| 37 | * the fb modifier and tiling mode match. | 
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| 38 | */ | 
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| 39 | if (tiling != I915_TILING_NONE && | 
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| 40 | tiling != intel_fb_modifier_to_tiling(fb_modifier: mode_cmd->modifier[0])) { | 
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| 41 | drm_dbg_kms(display->drm, | 
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| 42 | "tiling_mode doesn't match fb modifier\n"); | 
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| 43 | return -EINVAL; | 
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| 44 | } | 
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| 45 | } else { | 
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| 46 | if (tiling == I915_TILING_X) { | 
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| 47 | mode_cmd->modifier[0] = I915_FORMAT_MOD_X_TILED; | 
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| 48 | } else if (tiling == I915_TILING_Y) { | 
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| 49 | drm_dbg_kms(display->drm, | 
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| 50 | "No Y tiling for legacy addfb\n"); | 
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| 51 | return -EINVAL; | 
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| 52 | } | 
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| 53 | } | 
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| 54 |  | 
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| 55 | /* | 
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| 56 | * gen2/3 display engine uses the fence if present, | 
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| 57 | * so the tiling mode must match the fb modifier exactly. | 
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| 58 | */ | 
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| 59 | if (DISPLAY_VER(display) < 4 && | 
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| 60 | tiling != intel_fb_modifier_to_tiling(fb_modifier: mode_cmd->modifier[0])) { | 
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| 61 | drm_dbg_kms(display->drm, | 
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| 62 | "tiling_mode must match fb modifier exactly on gen2/3\n"); | 
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| 63 | return -EINVAL; | 
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| 64 | } | 
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| 65 |  | 
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| 66 | /* | 
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| 67 | * If there's a fence, enforce that | 
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| 68 | * the fb pitch and fence stride match. | 
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| 69 | */ | 
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| 70 | if (tiling != I915_TILING_NONE && mode_cmd->pitches[0] != stride) { | 
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| 71 | drm_dbg_kms(display->drm, | 
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| 72 | "pitch (%d) must match tiling stride (%d)\n", | 
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| 73 | mode_cmd->pitches[0], stride); | 
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| 74 | return -EINVAL; | 
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| 75 | } | 
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| 76 |  | 
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| 77 | return 0; | 
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| 78 | } | 
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| 79 |  | 
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| 80 | struct drm_gem_object * | 
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| 81 | intel_fb_bo_lookup_valid_bo(struct drm_device *drm, | 
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| 82 | struct drm_file *filp, | 
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| 83 | const struct drm_mode_fb_cmd2 *mode_cmd) | 
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| 84 | { | 
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| 85 | struct drm_i915_private *i915 = to_i915(dev: drm); | 
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| 86 | struct drm_i915_gem_object *obj; | 
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| 87 |  | 
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| 88 | obj = i915_gem_object_lookup(file: filp, handle: mode_cmd->handles[0]); | 
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| 89 | if (!obj) | 
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| 90 | return ERR_PTR(error: -ENOENT); | 
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| 91 |  | 
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| 92 | /* object is backed with LMEM for discrete */ | 
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| 93 | if (HAS_LMEM(i915) && !i915_gem_object_can_migrate(obj, id: INTEL_REGION_LMEM_0)) { | 
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| 94 | /* object is "remote", not in local memory */ | 
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| 95 | i915_gem_object_put(obj); | 
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| 96 | drm_dbg_kms(&i915->drm, "framebuffer must reside in local memory\n"); | 
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| 97 | return ERR_PTR(error: -EREMOTE); | 
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| 98 | } | 
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| 99 |  | 
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| 100 | return intel_bo_to_drm_bo(obj); | 
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| 101 | } | 
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| 102 |  | 
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