1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright 2025 Intel Corporation.
4 */
5
6#ifndef __INTEL_PCH__
7#define __INTEL_PCH__
8
9struct intel_display;
10
11/*
12 * Sorted by south display engine compatibility.
13 * If the new PCH comes with a south display engine that is not
14 * inherited from the latest item, please do not add it to the
15 * end. Instead, add it right after its "parent" PCH.
16 */
17enum intel_pch {
18 PCH_NOP = -1, /* PCH without south display */
19 PCH_NONE = 0, /* No PCH present */
20 PCH_IBX, /* Ibexpeak PCH */
21 PCH_CPT, /* Cougarpoint/Pantherpoint PCH */
22 PCH_LPT_H, /* Lynxpoint/Wildcatpoint H PCH */
23 PCH_LPT_LP, /* Lynxpoint/Wildcatpoint LP PCH */
24 PCH_SPT, /* Sunrisepoint/Kaby Lake PCH */
25 PCH_CNP, /* Cannon/Comet Lake PCH */
26 PCH_ICP, /* Ice Lake/Jasper Lake PCH */
27 PCH_TGP, /* Tiger Lake/Mule Creek Canyon PCH */
28 PCH_ADP, /* Alder Lake PCH */
29
30 /* Fake PCHs, functionality handled on the same PCI dev */
31 PCH_DG1 = 1024,
32 PCH_DG2,
33 PCH_MTL,
34 PCH_LNL,
35};
36
37#define INTEL_PCH_TYPE(_display) ((_display)->pch_type)
38#define HAS_PCH_DG2(display) (INTEL_PCH_TYPE(display) == PCH_DG2)
39#define HAS_PCH_ADP(display) (INTEL_PCH_TYPE(display) == PCH_ADP)
40#define HAS_PCH_DG1(display) (INTEL_PCH_TYPE(display) == PCH_DG1)
41#define HAS_PCH_TGP(display) (INTEL_PCH_TYPE(display) == PCH_TGP)
42#define HAS_PCH_ICP(display) (INTEL_PCH_TYPE(display) == PCH_ICP)
43#define HAS_PCH_CNP(display) (INTEL_PCH_TYPE(display) == PCH_CNP)
44#define HAS_PCH_SPT(display) (INTEL_PCH_TYPE(display) == PCH_SPT)
45#define HAS_PCH_LPT_H(display) (INTEL_PCH_TYPE(display) == PCH_LPT_H)
46#define HAS_PCH_LPT_LP(display) (INTEL_PCH_TYPE(display) == PCH_LPT_LP)
47#define HAS_PCH_LPT(display) (INTEL_PCH_TYPE(display) == PCH_LPT_H || \
48 INTEL_PCH_TYPE(display) == PCH_LPT_LP)
49#define HAS_PCH_CPT(display) (INTEL_PCH_TYPE(display) == PCH_CPT)
50#define HAS_PCH_IBX(display) (INTEL_PCH_TYPE(display) == PCH_IBX)
51#define HAS_PCH_NOP(display) (INTEL_PCH_TYPE(display) == PCH_NOP)
52#define HAS_PCH_SPLIT(display) (INTEL_PCH_TYPE(display) != PCH_NONE)
53
54void intel_pch_detect(struct intel_display *display);
55
56#endif /* __INTEL_PCH__ */
57