1/*
2 * Copyright (C) 2015 Red Hat, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
26#include <linux/dma-mapping.h>
27#include <linux/moduleparam.h>
28
29#include "virtgpu_drv.h"
30
31static int virtio_gpu_virglrenderer_workaround = 1;
32module_param_named(virglhack, virtio_gpu_virglrenderer_workaround, int, 0400);
33
34int virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev, uint32_t *resid)
35{
36 if (virtio_gpu_virglrenderer_workaround) {
37 /*
38 * Hack to avoid re-using resource IDs.
39 *
40 * virglrenderer versions up to (and including) 0.7.0
41 * can't deal with that. virglrenderer commit
42 * "f91a9dd35715 Fix unlinking resources from hash
43 * table." (Feb 2019) fixes the bug.
44 */
45 static atomic_t seqno = ATOMIC_INIT(0);
46 int handle = atomic_inc_return(v: &seqno);
47 *resid = handle + 1;
48 } else {
49 int handle = ida_alloc(ida: &vgdev->resource_ida, GFP_KERNEL);
50
51 if (handle < 0)
52 return handle;
53 *resid = handle + 1;
54 }
55 return 0;
56}
57
58static void virtio_gpu_resource_id_put(struct virtio_gpu_device *vgdev, uint32_t id)
59{
60 if (!virtio_gpu_virglrenderer_workaround)
61 ida_free(&vgdev->resource_ida, id: id - 1);
62}
63
64void virtio_gpu_cleanup_object(struct virtio_gpu_object *bo)
65{
66 struct virtio_gpu_device *vgdev = bo->base.base.dev->dev_private;
67
68 virtio_gpu_resource_id_put(vgdev, id: bo->hw_res_handle);
69 if (virtio_gpu_is_shmem(bo)) {
70 drm_gem_shmem_free(shmem: &bo->base);
71 } else if (virtio_gpu_is_vram(bo)) {
72 struct virtio_gpu_object_vram *vram = to_virtio_gpu_vram(bo);
73
74 spin_lock(lock: &vgdev->host_visible_lock);
75 if (drm_mm_node_allocated(node: &vram->vram_node))
76 drm_mm_remove_node(node: &vram->vram_node);
77
78 spin_unlock(lock: &vgdev->host_visible_lock);
79
80 drm_gem_free_mmap_offset(obj: &vram->base.base.base);
81 drm_gem_object_release(obj: &vram->base.base.base);
82 kfree(objp: vram);
83 } else {
84 drm_gem_object_release(obj: &bo->base.base);
85 kfree(objp: bo);
86 }
87}
88
89static void virtio_gpu_free_object(struct drm_gem_object *obj)
90{
91 struct virtio_gpu_object *bo = gem_to_virtio_gpu_obj(obj);
92 struct virtio_gpu_device *vgdev = bo->base.base.dev->dev_private;
93
94 if (bo->created) {
95 virtio_gpu_cmd_unref_resource(vgdev, bo);
96 virtio_gpu_notify(vgdev);
97 /* completion handler calls virtio_gpu_cleanup_object() */
98 return;
99 }
100 virtio_gpu_cleanup_object(bo);
101}
102
103int virtio_gpu_detach_object_fenced(struct virtio_gpu_object *bo)
104{
105 struct virtio_gpu_device *vgdev = bo->base.base.dev->dev_private;
106 struct virtio_gpu_fence *fence;
107
108 if (!bo->attached)
109 return 0;
110
111 fence = virtio_gpu_fence_alloc(vgdev, base_fence_ctx: vgdev->fence_drv.context, ring_idx: 0);
112 if (!fence)
113 return -ENOMEM;
114
115 virtio_gpu_object_detach(vgdev, obj: bo, fence);
116 virtio_gpu_notify(vgdev);
117
118 dma_fence_wait(fence: &fence->f, intr: false);
119 dma_fence_put(fence: &fence->f);
120
121 return 0;
122}
123
124static const struct drm_gem_object_funcs virtio_gpu_shmem_funcs = {
125 .free = virtio_gpu_free_object,
126 .open = virtio_gpu_gem_object_open,
127 .close = virtio_gpu_gem_object_close,
128 .print_info = drm_gem_shmem_object_print_info,
129 .export = virtgpu_gem_prime_export,
130 .pin = drm_gem_shmem_object_pin,
131 .unpin = drm_gem_shmem_object_unpin,
132 .get_sg_table = drm_gem_shmem_object_get_sg_table,
133 .vmap = drm_gem_shmem_object_vmap,
134 .vunmap = drm_gem_shmem_object_vunmap,
135 .mmap = drm_gem_shmem_object_mmap,
136 .vm_ops = &drm_gem_shmem_vm_ops,
137};
138
139bool virtio_gpu_is_shmem(struct virtio_gpu_object *bo)
140{
141 return bo->base.base.funcs == &virtio_gpu_shmem_funcs;
142}
143
144struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev,
145 size_t size)
146{
147 struct virtio_gpu_object_shmem *shmem;
148 struct drm_gem_shmem_object *dshmem;
149
150 shmem = kzalloc(sizeof(*shmem), GFP_KERNEL);
151 if (!shmem)
152 return ERR_PTR(error: -ENOMEM);
153
154 dshmem = &shmem->base.base;
155 dshmem->base.funcs = &virtio_gpu_shmem_funcs;
156 return &dshmem->base;
157}
158
159static int virtio_gpu_object_shmem_init(struct virtio_gpu_device *vgdev,
160 struct virtio_gpu_object *bo,
161 struct virtio_gpu_mem_entry **ents,
162 unsigned int *nents)
163{
164 bool use_dma_api = !virtio_has_dma_quirk(vdev: vgdev->vdev);
165 struct scatterlist *sg;
166 struct sg_table *pages;
167 int si;
168
169 pages = drm_gem_shmem_get_pages_sgt(shmem: &bo->base);
170 if (IS_ERR(ptr: pages))
171 return PTR_ERR(ptr: pages);
172
173 if (use_dma_api)
174 *nents = pages->nents;
175 else
176 *nents = pages->orig_nents;
177
178 *ents = kvmalloc_array(*nents,
179 sizeof(struct virtio_gpu_mem_entry),
180 GFP_KERNEL);
181 if (!(*ents)) {
182 DRM_ERROR("failed to allocate ent list\n");
183 return -ENOMEM;
184 }
185
186 if (use_dma_api) {
187 for_each_sgtable_dma_sg(pages, sg, si) {
188 (*ents)[si].addr = cpu_to_le64(sg_dma_address(sg));
189 (*ents)[si].length = cpu_to_le32(sg_dma_len(sg));
190 (*ents)[si].padding = 0;
191 }
192 } else {
193 for_each_sgtable_sg(pages, sg, si) {
194 (*ents)[si].addr = cpu_to_le64(sg_phys(sg));
195 (*ents)[si].length = cpu_to_le32(sg->length);
196 (*ents)[si].padding = 0;
197 }
198 }
199
200 return 0;
201}
202
203int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
204 struct virtio_gpu_object_params *params,
205 struct virtio_gpu_object **bo_ptr,
206 struct virtio_gpu_fence *fence)
207{
208 struct virtio_gpu_object_array *objs = NULL;
209 struct drm_gem_shmem_object *shmem_obj;
210 struct virtio_gpu_object *bo;
211 struct virtio_gpu_mem_entry *ents = NULL;
212 unsigned int nents;
213 int ret;
214
215 *bo_ptr = NULL;
216
217 params->size = roundup(params->size, PAGE_SIZE);
218 shmem_obj = drm_gem_shmem_create(dev: vgdev->ddev, size: params->size);
219 if (IS_ERR(ptr: shmem_obj))
220 return PTR_ERR(ptr: shmem_obj);
221 bo = gem_to_virtio_gpu_obj(&shmem_obj->base);
222
223 ret = virtio_gpu_resource_id_get(vgdev, resid: &bo->hw_res_handle);
224 if (ret < 0)
225 goto err_free_gem;
226
227 bo->dumb = params->dumb;
228
229 ret = virtio_gpu_object_shmem_init(vgdev, bo, ents: &ents, nents: &nents);
230 if (ret != 0)
231 goto err_put_id;
232
233 if (fence) {
234 ret = -ENOMEM;
235 objs = virtio_gpu_array_alloc(nents: 1);
236 if (!objs)
237 goto err_free_entry;
238 virtio_gpu_array_add_obj(objs, obj: &bo->base.base);
239
240 ret = virtio_gpu_array_lock_resv(objs);
241 if (ret != 0)
242 goto err_put_objs;
243 }
244
245 if (params->blob) {
246 if (params->blob_mem == VIRTGPU_BLOB_MEM_GUEST)
247 bo->guest_blob = true;
248
249 virtio_gpu_cmd_resource_create_blob(vgdev, bo, params,
250 ents, nents);
251 } else if (params->virgl) {
252 virtio_gpu_cmd_resource_create_3d(vgdev, bo, params,
253 objs, fence);
254 virtio_gpu_object_attach(vgdev, obj: bo, ents, nents);
255 } else {
256 virtio_gpu_cmd_create_resource(vgdev, bo, params,
257 objs, fence);
258 virtio_gpu_object_attach(vgdev, obj: bo, ents, nents);
259 }
260
261 *bo_ptr = bo;
262 return 0;
263
264err_put_objs:
265 virtio_gpu_array_put_free(objs);
266err_free_entry:
267 kvfree(addr: ents);
268err_put_id:
269 virtio_gpu_resource_id_put(vgdev, id: bo->hw_res_handle);
270err_free_gem:
271 drm_gem_shmem_free(shmem: shmem_obj);
272 return ret;
273}
274