| 1 | // SPDX-License-Identifier: GPL-2.0-only | 
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| 2 | /* | 
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| 3 | * x86 APERF/MPERF KHz calculation for | 
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| 4 | * /sys/.../cpufreq/scaling_cur_freq | 
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| 5 | * | 
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| 6 | * Copyright (C) 2017 Intel Corp. | 
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| 7 | * Author: Len Brown <len.brown@intel.com> | 
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| 8 | */ | 
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| 9 | #include <linux/cpufreq.h> | 
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| 10 | #include <linux/delay.h> | 
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| 11 | #include <linux/ktime.h> | 
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| 12 | #include <linux/math64.h> | 
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| 13 | #include <linux/percpu.h> | 
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| 14 | #include <linux/rcupdate.h> | 
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| 15 | #include <linux/sched/isolation.h> | 
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| 16 | #include <linux/sched/topology.h> | 
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| 17 | #include <linux/smp.h> | 
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| 18 | #include <linux/syscore_ops.h> | 
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| 19 |  | 
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| 20 | #include <asm/cpu.h> | 
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| 21 | #include <asm/cpu_device_id.h> | 
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| 22 | #include <asm/intel-family.h> | 
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| 23 | #include <asm/msr.h> | 
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| 24 |  | 
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| 25 | #include "cpu.h" | 
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| 26 |  | 
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| 27 | struct aperfmperf { | 
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| 28 | seqcount_t	seq; | 
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| 29 | unsigned long	last_update; | 
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| 30 | u64		acnt; | 
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| 31 | u64		mcnt; | 
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| 32 | u64		aperf; | 
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| 33 | u64		mperf; | 
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| 34 | }; | 
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| 35 |  | 
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| 36 | static DEFINE_PER_CPU_SHARED_ALIGNED(struct aperfmperf, cpu_samples) = { | 
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| 37 | .seq = SEQCNT_ZERO(cpu_samples.seq) | 
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| 38 | }; | 
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| 39 |  | 
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| 40 | static void init_counter_refs(void) | 
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| 41 | { | 
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| 42 | u64 aperf, mperf; | 
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| 43 |  | 
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| 44 | rdmsrq(MSR_IA32_APERF, aperf); | 
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| 45 | rdmsrq(MSR_IA32_MPERF, mperf); | 
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| 46 |  | 
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| 47 | this_cpu_write(cpu_samples.aperf, aperf); | 
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| 48 | this_cpu_write(cpu_samples.mperf, mperf); | 
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| 49 | } | 
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| 50 |  | 
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| 51 | #if defined(CONFIG_X86_64) && defined(CONFIG_SMP) | 
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| 52 | /* | 
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| 53 | * APERF/MPERF frequency ratio computation. | 
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| 54 | * | 
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| 55 | * The scheduler wants to do frequency invariant accounting and needs a <1 | 
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| 56 | * ratio to account for the 'current' frequency, corresponding to | 
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| 57 | * freq_curr / freq_max. | 
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| 58 | * | 
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| 59 | * Since the frequency freq_curr on x86 is controlled by micro-controller and | 
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| 60 | * our P-state setting is little more than a request/hint, we need to observe | 
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| 61 | * the effective frequency 'BusyMHz', i.e. the average frequency over a time | 
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| 62 | * interval after discarding idle time. This is given by: | 
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| 63 | * | 
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| 64 | *   BusyMHz = delta_APERF / delta_MPERF * freq_base | 
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| 65 | * | 
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| 66 | * where freq_base is the max non-turbo P-state. | 
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| 67 | * | 
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| 68 | * The freq_max term has to be set to a somewhat arbitrary value, because we | 
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| 69 | * can't know which turbo states will be available at a given point in time: | 
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| 70 | * it all depends on the thermal headroom of the entire package. We set it to | 
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| 71 | * the turbo level with 4 cores active. | 
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| 72 | * | 
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| 73 | * Benchmarks show that's a good compromise between the 1C turbo ratio | 
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| 74 | * (freq_curr/freq_max would rarely reach 1) and something close to freq_base, | 
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| 75 | * which would ignore the entire turbo range (a conspicuous part, making | 
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| 76 | * freq_curr/freq_max always maxed out). | 
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| 77 | * | 
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| 78 | * An exception to the heuristic above is the Atom uarch, where we choose the | 
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| 79 | * highest turbo level for freq_max since Atom's are generally oriented towards | 
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| 80 | * power efficiency. | 
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| 81 | * | 
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| 82 | * Setting freq_max to anything less than the 1C turbo ratio makes the ratio | 
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| 83 | * freq_curr / freq_max to eventually grow >1, in which case we clip it to 1. | 
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| 84 | */ | 
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| 85 |  | 
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| 86 | DEFINE_STATIC_KEY_FALSE(arch_scale_freq_key); | 
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| 87 |  | 
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| 88 | static u64 arch_turbo_freq_ratio = SCHED_CAPACITY_SCALE; | 
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| 89 | static u64 arch_max_freq_ratio = SCHED_CAPACITY_SCALE; | 
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| 90 |  | 
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| 91 | void arch_set_max_freq_ratio(bool turbo_disabled) | 
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| 92 | { | 
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| 93 | arch_max_freq_ratio = turbo_disabled ? SCHED_CAPACITY_SCALE : | 
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| 94 | arch_turbo_freq_ratio; | 
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| 95 | } | 
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| 96 | EXPORT_SYMBOL_GPL(arch_set_max_freq_ratio); | 
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| 97 |  | 
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| 98 | static bool __init turbo_disabled(void) | 
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| 99 | { | 
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| 100 | u64 misc_en; | 
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| 101 | int err; | 
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| 102 |  | 
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| 103 | err = rdmsrq_safe(MSR_IA32_MISC_ENABLE, p: &misc_en); | 
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| 104 | if (err) | 
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| 105 | return false; | 
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| 106 |  | 
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| 107 | return (misc_en & MSR_IA32_MISC_ENABLE_TURBO_DISABLE); | 
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| 108 | } | 
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| 109 |  | 
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| 110 | static bool __init slv_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq) | 
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| 111 | { | 
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| 112 | int err; | 
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| 113 |  | 
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| 114 | err = rdmsrq_safe(MSR_ATOM_CORE_RATIOS, p: base_freq); | 
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| 115 | if (err) | 
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| 116 | return false; | 
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| 117 |  | 
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| 118 | err = rdmsrq_safe(MSR_ATOM_CORE_TURBO_RATIOS, p: turbo_freq); | 
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| 119 | if (err) | 
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| 120 | return false; | 
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| 121 |  | 
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| 122 | *base_freq = (*base_freq >> 16) & 0x3F;     /* max P state */ | 
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| 123 | *turbo_freq = *turbo_freq & 0x3F;           /* 1C turbo    */ | 
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| 124 |  | 
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| 125 | return true; | 
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| 126 | } | 
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| 127 |  | 
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| 128 | #define X86_MATCH(vfm)						\ | 
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| 129 | X86_MATCH_VFM_FEATURE(vfm, X86_FEATURE_APERFMPERF, NULL) | 
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| 130 |  | 
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| 131 | static const struct x86_cpu_id has_knl_turbo_ratio_limits[] __initconst = { | 
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| 132 | X86_MATCH(INTEL_XEON_PHI_KNL), | 
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| 133 | X86_MATCH(INTEL_XEON_PHI_KNM), | 
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| 134 | {} | 
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| 135 | }; | 
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| 136 |  | 
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| 137 | static const struct x86_cpu_id has_skx_turbo_ratio_limits[] __initconst = { | 
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| 138 | X86_MATCH(INTEL_SKYLAKE_X), | 
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| 139 | {} | 
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| 140 | }; | 
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| 141 |  | 
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| 142 | static const struct x86_cpu_id has_glm_turbo_ratio_limits[] __initconst = { | 
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| 143 | X86_MATCH(INTEL_ATOM_GOLDMONT), | 
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| 144 | X86_MATCH(INTEL_ATOM_GOLDMONT_D), | 
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| 145 | X86_MATCH(INTEL_ATOM_GOLDMONT_PLUS), | 
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| 146 | {} | 
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| 147 | }; | 
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| 148 |  | 
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| 149 | static bool __init knl_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq, | 
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| 150 | int num_delta_fratio) | 
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| 151 | { | 
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| 152 | int fratio, delta_fratio, found; | 
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| 153 | int err, i; | 
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| 154 | u64 msr; | 
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| 155 |  | 
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| 156 | err = rdmsrq_safe(MSR_PLATFORM_INFO, p: base_freq); | 
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| 157 | if (err) | 
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| 158 | return false; | 
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| 159 |  | 
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| 160 | *base_freq = (*base_freq >> 8) & 0xFF;	    /* max P state */ | 
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| 161 |  | 
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| 162 | err = rdmsrq_safe(MSR_TURBO_RATIO_LIMIT, p: &msr); | 
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| 163 | if (err) | 
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| 164 | return false; | 
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| 165 |  | 
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| 166 | fratio = (msr >> 8) & 0xFF; | 
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| 167 | i = 16; | 
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| 168 | found = 0; | 
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| 169 | do { | 
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| 170 | if (found >= num_delta_fratio) { | 
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| 171 | *turbo_freq = fratio; | 
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| 172 | return true; | 
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| 173 | } | 
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| 174 |  | 
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| 175 | delta_fratio = (msr >> (i + 5)) & 0x7; | 
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| 176 |  | 
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| 177 | if (delta_fratio) { | 
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| 178 | found += 1; | 
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| 179 | fratio -= delta_fratio; | 
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| 180 | } | 
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| 181 |  | 
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| 182 | i += 8; | 
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| 183 | } while (i < 64); | 
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| 184 |  | 
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| 185 | return true; | 
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| 186 | } | 
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| 187 |  | 
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| 188 | static bool __init skx_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq, int size) | 
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| 189 | { | 
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| 190 | u64 ratios, counts; | 
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| 191 | u32 group_size; | 
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| 192 | int err, i; | 
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| 193 |  | 
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| 194 | err = rdmsrq_safe(MSR_PLATFORM_INFO, p: base_freq); | 
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| 195 | if (err) | 
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| 196 | return false; | 
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| 197 |  | 
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| 198 | *base_freq = (*base_freq >> 8) & 0xFF;      /* max P state */ | 
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| 199 |  | 
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| 200 | err = rdmsrq_safe(MSR_TURBO_RATIO_LIMIT, p: &ratios); | 
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| 201 | if (err) | 
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| 202 | return false; | 
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| 203 |  | 
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| 204 | err = rdmsrq_safe(MSR_TURBO_RATIO_LIMIT1, p: &counts); | 
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| 205 | if (err) | 
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| 206 | return false; | 
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| 207 |  | 
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| 208 | for (i = 0; i < 64; i += 8) { | 
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| 209 | group_size = (counts >> i) & 0xFF; | 
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| 210 | if (group_size >= size) { | 
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| 211 | *turbo_freq = (ratios >> i) & 0xFF; | 
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| 212 | return true; | 
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| 213 | } | 
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| 214 | } | 
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| 215 |  | 
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| 216 | return false; | 
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| 217 | } | 
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| 218 |  | 
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| 219 | static bool __init core_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq) | 
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| 220 | { | 
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| 221 | u64 msr; | 
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| 222 | int err; | 
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| 223 |  | 
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| 224 | err = rdmsrq_safe(MSR_PLATFORM_INFO, p: base_freq); | 
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| 225 | if (err) | 
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| 226 | return false; | 
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| 227 |  | 
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| 228 | err = rdmsrq_safe(MSR_TURBO_RATIO_LIMIT, p: &msr); | 
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| 229 | if (err) | 
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| 230 | return false; | 
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| 231 |  | 
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| 232 | *base_freq = (*base_freq >> 8) & 0xFF;    /* max P state */ | 
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| 233 | *turbo_freq = (msr >> 24) & 0xFF;         /* 4C turbo    */ | 
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| 234 |  | 
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| 235 | /* The CPU may have less than 4 cores */ | 
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| 236 | if (!*turbo_freq) | 
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| 237 | *turbo_freq = msr & 0xFF;         /* 1C turbo    */ | 
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| 238 |  | 
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| 239 | return true; | 
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| 240 | } | 
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| 241 |  | 
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| 242 | static bool __init intel_set_max_freq_ratio(void) | 
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| 243 | { | 
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| 244 | u64 base_freq, turbo_freq; | 
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| 245 | u64 turbo_ratio; | 
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| 246 |  | 
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| 247 | if (slv_set_max_freq_ratio(base_freq: &base_freq, turbo_freq: &turbo_freq)) | 
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| 248 | goto out; | 
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| 249 |  | 
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| 250 | if (x86_match_cpu(match: has_glm_turbo_ratio_limits) && | 
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| 251 | skx_set_max_freq_ratio(base_freq: &base_freq, turbo_freq: &turbo_freq, size: 1)) | 
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| 252 | goto out; | 
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| 253 |  | 
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| 254 | if (x86_match_cpu(match: has_knl_turbo_ratio_limits) && | 
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| 255 | knl_set_max_freq_ratio(base_freq: &base_freq, turbo_freq: &turbo_freq, num_delta_fratio: 1)) | 
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| 256 | goto out; | 
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| 257 |  | 
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| 258 | if (x86_match_cpu(match: has_skx_turbo_ratio_limits) && | 
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| 259 | skx_set_max_freq_ratio(base_freq: &base_freq, turbo_freq: &turbo_freq, size: 4)) | 
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| 260 | goto out; | 
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| 261 |  | 
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| 262 | if (core_set_max_freq_ratio(base_freq: &base_freq, turbo_freq: &turbo_freq)) | 
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| 263 | goto out; | 
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| 264 |  | 
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| 265 | return false; | 
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| 266 |  | 
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| 267 | out: | 
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| 268 | /* | 
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| 269 | * Some hypervisors advertise X86_FEATURE_APERFMPERF | 
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| 270 | * but then fill all MSR's with zeroes. | 
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| 271 | * Some CPUs have turbo boost but don't declare any turbo ratio | 
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| 272 | * in MSR_TURBO_RATIO_LIMIT. | 
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| 273 | */ | 
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| 274 | if (!base_freq || !turbo_freq) { | 
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| 275 | pr_debug( "Couldn't determine cpu base or turbo frequency, necessary for scale-invariant accounting.\n"); | 
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| 276 | return false; | 
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| 277 | } | 
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| 278 |  | 
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| 279 | turbo_ratio = div_u64(dividend: turbo_freq * SCHED_CAPACITY_SCALE, divisor: base_freq); | 
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| 280 | if (!turbo_ratio) { | 
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| 281 | pr_debug( "Non-zero turbo and base frequencies led to a 0 ratio.\n"); | 
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| 282 | return false; | 
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| 283 | } | 
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| 284 |  | 
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| 285 | arch_turbo_freq_ratio = turbo_ratio; | 
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| 286 | arch_set_max_freq_ratio(turbo_disabled()); | 
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| 287 |  | 
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| 288 | return true; | 
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| 289 | } | 
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| 290 |  | 
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| 291 | #ifdef CONFIG_PM_SLEEP | 
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| 292 | static struct syscore_ops freq_invariance_syscore_ops = { | 
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| 293 | .resume = init_counter_refs, | 
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| 294 | }; | 
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| 295 |  | 
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| 296 | static void register_freq_invariance_syscore_ops(void) | 
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| 297 | { | 
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| 298 | register_syscore_ops(ops: &freq_invariance_syscore_ops); | 
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| 299 | } | 
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| 300 | #else | 
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| 301 | static inline void register_freq_invariance_syscore_ops(void) {} | 
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| 302 | #endif | 
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| 303 |  | 
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| 304 | static void freq_invariance_enable(void) | 
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| 305 | { | 
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| 306 | if (static_branch_unlikely(&arch_scale_freq_key)) { | 
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| 307 | WARN_ON_ONCE(1); | 
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| 308 | return; | 
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| 309 | } | 
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| 310 | static_branch_enable_cpuslocked(&arch_scale_freq_key); | 
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| 311 | register_freq_invariance_syscore_ops(); | 
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| 312 | pr_info( "Estimated ratio of average max frequency by base frequency (times 1024): %llu\n", arch_max_freq_ratio); | 
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| 313 | } | 
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| 314 |  | 
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| 315 | void freq_invariance_set_perf_ratio(u64 ratio, bool turbo_disabled) | 
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| 316 | { | 
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| 317 | arch_turbo_freq_ratio = ratio; | 
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| 318 | arch_set_max_freq_ratio(turbo_disabled); | 
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| 319 | freq_invariance_enable(); | 
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| 320 | } | 
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| 321 |  | 
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| 322 | static void __init bp_init_freq_invariance(void) | 
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| 323 | { | 
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| 324 | if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) | 
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| 325 | return; | 
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| 326 |  | 
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| 327 | if (intel_set_max_freq_ratio()) { | 
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| 328 | guard(cpus_read_lock)(); | 
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| 329 | freq_invariance_enable(); | 
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| 330 | } | 
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| 331 | } | 
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| 332 |  | 
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| 333 | static void disable_freq_invariance_workfn(struct work_struct *work) | 
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| 334 | { | 
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| 335 | int cpu; | 
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| 336 |  | 
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| 337 | static_branch_disable(&arch_scale_freq_key); | 
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| 338 |  | 
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| 339 | /* | 
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| 340 | * Set arch_freq_scale to a default value on all cpus | 
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| 341 | * This negates the effect of scaling | 
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| 342 | */ | 
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| 343 | for_each_possible_cpu(cpu) | 
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| 344 | per_cpu(arch_freq_scale, cpu) = SCHED_CAPACITY_SCALE; | 
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| 345 | } | 
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| 346 |  | 
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| 347 | static DECLARE_WORK(disable_freq_invariance_work, | 
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| 348 | disable_freq_invariance_workfn); | 
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| 349 |  | 
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| 350 | DEFINE_PER_CPU(unsigned long, arch_freq_scale) = SCHED_CAPACITY_SCALE; | 
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| 351 | EXPORT_PER_CPU_SYMBOL_GPL(arch_freq_scale); | 
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| 352 |  | 
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| 353 | static DEFINE_STATIC_KEY_FALSE(arch_hybrid_cap_scale_key); | 
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| 354 |  | 
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| 355 | struct arch_hybrid_cpu_scale { | 
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| 356 | unsigned long capacity; | 
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| 357 | unsigned long freq_ratio; | 
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| 358 | }; | 
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| 359 |  | 
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| 360 | static struct arch_hybrid_cpu_scale __percpu *arch_cpu_scale; | 
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| 361 |  | 
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| 362 | /** | 
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| 363 | * arch_enable_hybrid_capacity_scale() - Enable hybrid CPU capacity scaling | 
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| 364 | * | 
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| 365 | * Allocate memory for per-CPU data used by hybrid CPU capacity scaling, | 
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| 366 | * initialize it and set the static key controlling its code paths. | 
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| 367 | * | 
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| 368 | * Must be called before arch_set_cpu_capacity(). | 
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| 369 | */ | 
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| 370 | bool arch_enable_hybrid_capacity_scale(void) | 
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| 371 | { | 
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| 372 | int cpu; | 
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| 373 |  | 
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| 374 | if (static_branch_unlikely(&arch_hybrid_cap_scale_key)) { | 
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| 375 | WARN_ONCE(1, "Hybrid CPU capacity scaling already enabled"); | 
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| 376 | return true; | 
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| 377 | } | 
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| 378 |  | 
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| 379 | arch_cpu_scale = alloc_percpu(struct arch_hybrid_cpu_scale); | 
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| 380 | if (!arch_cpu_scale) | 
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| 381 | return false; | 
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| 382 |  | 
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| 383 | for_each_possible_cpu(cpu) { | 
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| 384 | per_cpu_ptr(arch_cpu_scale, cpu)->capacity = SCHED_CAPACITY_SCALE; | 
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| 385 | per_cpu_ptr(arch_cpu_scale, cpu)->freq_ratio = arch_max_freq_ratio; | 
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| 386 | } | 
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| 387 |  | 
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| 388 | static_branch_enable(&arch_hybrid_cap_scale_key); | 
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| 389 |  | 
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| 390 | pr_info( "Hybrid CPU capacity scaling enabled\n"); | 
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| 391 |  | 
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| 392 | return true; | 
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| 393 | } | 
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| 394 |  | 
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| 395 | /** | 
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| 396 | * arch_set_cpu_capacity() - Set scale-invariance parameters for a CPU | 
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| 397 | * @cpu: Target CPU. | 
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| 398 | * @cap: Capacity of @cpu at its maximum frequency, relative to @max_cap. | 
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| 399 | * @max_cap: System-wide maximum CPU capacity. | 
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| 400 | * @cap_freq: Frequency of @cpu corresponding to @cap. | 
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| 401 | * @base_freq: Frequency of @cpu at which MPERF counts. | 
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| 402 | * | 
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| 403 | * The units in which @cap and @max_cap are expressed do not matter, so long | 
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| 404 | * as they are consistent, because the former is effectively divided by the | 
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| 405 | * latter.  Analogously for @cap_freq and @base_freq. | 
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| 406 | * | 
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| 407 | * After calling this function for all CPUs, call arch_rebuild_sched_domains() | 
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| 408 | * to let the scheduler know that capacity-aware scheduling can be used going | 
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| 409 | * forward. | 
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| 410 | */ | 
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| 411 | void arch_set_cpu_capacity(int cpu, unsigned long cap, unsigned long max_cap, | 
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| 412 | unsigned long cap_freq, unsigned long base_freq) | 
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| 413 | { | 
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| 414 | if (static_branch_likely(&arch_hybrid_cap_scale_key)) { | 
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| 415 | WRITE_ONCE(per_cpu_ptr(arch_cpu_scale, cpu)->capacity, | 
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| 416 | div_u64(cap << SCHED_CAPACITY_SHIFT, max_cap)); | 
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| 417 | WRITE_ONCE(per_cpu_ptr(arch_cpu_scale, cpu)->freq_ratio, | 
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| 418 | div_u64(cap_freq << SCHED_CAPACITY_SHIFT, base_freq)); | 
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| 419 | } else { | 
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| 420 | WARN_ONCE(1, "Hybrid CPU capacity scaling not enabled"); | 
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| 421 | } | 
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| 422 | } | 
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| 423 |  | 
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| 424 | unsigned long arch_scale_cpu_capacity(int cpu) | 
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| 425 | { | 
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| 426 | if (static_branch_unlikely(&arch_hybrid_cap_scale_key)) | 
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| 427 | return READ_ONCE(per_cpu_ptr(arch_cpu_scale, cpu)->capacity); | 
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| 428 |  | 
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| 429 | return SCHED_CAPACITY_SCALE; | 
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| 430 | } | 
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| 431 | EXPORT_SYMBOL_GPL(arch_scale_cpu_capacity); | 
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| 432 |  | 
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| 433 | static void scale_freq_tick(u64 acnt, u64 mcnt) | 
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| 434 | { | 
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| 435 | u64 freq_scale, freq_ratio; | 
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| 436 |  | 
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| 437 | if (!arch_scale_freq_invariant()) | 
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| 438 | return; | 
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| 439 |  | 
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| 440 | if (check_shl_overflow(acnt, 2*SCHED_CAPACITY_SHIFT, &acnt)) | 
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| 441 | goto error; | 
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| 442 |  | 
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| 443 | if (static_branch_unlikely(&arch_hybrid_cap_scale_key)) | 
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| 444 | freq_ratio = READ_ONCE(this_cpu_ptr(arch_cpu_scale)->freq_ratio); | 
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| 445 | else | 
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| 446 | freq_ratio = arch_max_freq_ratio; | 
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| 447 |  | 
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| 448 | if (check_mul_overflow(mcnt, freq_ratio, &mcnt) || !mcnt) | 
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| 449 | goto error; | 
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| 450 |  | 
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| 451 | freq_scale = div64_u64(dividend: acnt, divisor: mcnt); | 
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| 452 | if (!freq_scale) | 
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| 453 | goto error; | 
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| 454 |  | 
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| 455 | if (freq_scale > SCHED_CAPACITY_SCALE) | 
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| 456 | freq_scale = SCHED_CAPACITY_SCALE; | 
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| 457 |  | 
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| 458 | this_cpu_write(arch_freq_scale, freq_scale); | 
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| 459 | return; | 
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| 460 |  | 
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| 461 | error: | 
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| 462 | pr_warn( "Scheduler frequency invariance went wobbly, disabling!\n"); | 
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| 463 | schedule_work(work: &disable_freq_invariance_work); | 
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| 464 | } | 
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| 465 | #else | 
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| 466 | static inline void bp_init_freq_invariance(void) { } | 
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| 467 | static inline void scale_freq_tick(u64 acnt, u64 mcnt) { } | 
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| 468 | #endif /* CONFIG_X86_64 && CONFIG_SMP */ | 
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| 469 |  | 
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| 470 | void arch_scale_freq_tick(void) | 
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| 471 | { | 
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| 472 | struct aperfmperf *s = this_cpu_ptr(&cpu_samples); | 
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| 473 | u64 acnt, mcnt, aperf, mperf; | 
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| 474 |  | 
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| 475 | if (!cpu_feature_enabled(X86_FEATURE_APERFMPERF)) | 
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| 476 | return; | 
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| 477 |  | 
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| 478 | rdmsrq(MSR_IA32_APERF, aperf); | 
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| 479 | rdmsrq(MSR_IA32_MPERF, mperf); | 
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| 480 | acnt = aperf - s->aperf; | 
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| 481 | mcnt = mperf - s->mperf; | 
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| 482 |  | 
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| 483 | s->aperf = aperf; | 
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| 484 | s->mperf = mperf; | 
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| 485 |  | 
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| 486 | raw_write_seqcount_begin(&s->seq); | 
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| 487 | s->last_update = jiffies; | 
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| 488 | s->acnt = acnt; | 
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| 489 | s->mcnt = mcnt; | 
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| 490 | raw_write_seqcount_end(&s->seq); | 
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| 491 |  | 
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| 492 | scale_freq_tick(acnt, mcnt); | 
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| 493 | } | 
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| 494 |  | 
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| 495 | /* | 
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| 496 | * Discard samples older than the define maximum sample age of 20ms. There | 
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| 497 | * is no point in sending IPIs in such a case. If the scheduler tick was | 
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| 498 | * not running then the CPU is either idle or isolated. | 
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| 499 | */ | 
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| 500 | #define MAX_SAMPLE_AGE	((unsigned long)HZ / 50) | 
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| 501 |  | 
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| 502 | int arch_freq_get_on_cpu(int cpu) | 
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| 503 | { | 
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| 504 | struct aperfmperf *s = per_cpu_ptr(&cpu_samples, cpu); | 
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| 505 | unsigned int seq, freq; | 
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| 506 | unsigned long last; | 
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| 507 | u64 acnt, mcnt; | 
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| 508 |  | 
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| 509 | if (!cpu_feature_enabled(X86_FEATURE_APERFMPERF)) | 
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| 510 | goto fallback; | 
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| 511 |  | 
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| 512 | do { | 
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| 513 | seq = raw_read_seqcount_begin(&s->seq); | 
|---|
| 514 | last = s->last_update; | 
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| 515 | acnt = s->acnt; | 
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| 516 | mcnt = s->mcnt; | 
|---|
| 517 | } while (read_seqcount_retry(&s->seq, seq)); | 
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| 518 |  | 
|---|
| 519 | /* | 
|---|
| 520 | * Bail on invalid count and when the last update was too long ago, | 
|---|
| 521 | * which covers idle and NOHZ full CPUs. | 
|---|
| 522 | */ | 
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| 523 | if (!mcnt || (jiffies - last) > MAX_SAMPLE_AGE) | 
|---|
| 524 | goto fallback; | 
|---|
| 525 |  | 
|---|
| 526 | return div64_u64(dividend: (cpu_khz * acnt), divisor: mcnt); | 
|---|
| 527 |  | 
|---|
| 528 | fallback: | 
|---|
| 529 | freq = cpufreq_quick_get(cpu); | 
|---|
| 530 | return freq ? freq : cpu_khz; | 
|---|
| 531 | } | 
|---|
| 532 |  | 
|---|
| 533 | static int __init bp_init_aperfmperf(void) | 
|---|
| 534 | { | 
|---|
| 535 | if (!cpu_feature_enabled(X86_FEATURE_APERFMPERF)) | 
|---|
| 536 | return 0; | 
|---|
| 537 |  | 
|---|
| 538 | init_counter_refs(); | 
|---|
| 539 | bp_init_freq_invariance(); | 
|---|
| 540 | return 0; | 
|---|
| 541 | } | 
|---|
| 542 | early_initcall(bp_init_aperfmperf); | 
|---|
| 543 |  | 
|---|
| 544 | void ap_init_aperfmperf(void) | 
|---|
| 545 | { | 
|---|
| 546 | if (cpu_feature_enabled(X86_FEATURE_APERFMPERF)) | 
|---|
| 547 | init_counter_refs(); | 
|---|
| 548 | } | 
|---|
| 549 |  | 
|---|