1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Enhanced Host Controller Interface (EHCI) driver for USB.
4 *
5 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 *
7 * Copyright (c) 2000-2004 by David Brownell
8 */
9
10#include <linux/module.h>
11#include <linux/pci.h>
12#include <linux/dmapool.h>
13#include <linux/kernel.h>
14#include <linux/delay.h>
15#include <linux/ioport.h>
16#include <linux/sched.h>
17#include <linux/vmalloc.h>
18#include <linux/errno.h>
19#include <linux/init.h>
20#include <linux/hrtimer.h>
21#include <linux/list.h>
22#include <linux/interrupt.h>
23#include <linux/usb.h>
24#include <linux/usb/hcd.h>
25#include <linux/usb/otg.h>
26#include <linux/moduleparam.h>
27#include <linux/dma-mapping.h>
28#include <linux/debugfs.h>
29#include <linux/platform_device.h>
30#include <linux/slab.h>
31
32#include <asm/byteorder.h>
33#include <asm/io.h>
34#include <asm/irq.h>
35#include <linux/unaligned.h>
36
37#if defined(CONFIG_PPC_PS3)
38#include <asm/firmware.h>
39#endif
40
41/*-------------------------------------------------------------------------*/
42
43/*
44 * EHCI hc_driver implementation ... experimental, incomplete.
45 * Based on the final 1.0 register interface specification.
46 *
47 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
48 * First was PCMCIA, like ISA; then CardBus, which is PCI.
49 * Next comes "CardBay", using USB 2.0 signals.
50 *
51 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
52 * Special thanks to Intel and VIA for providing host controllers to
53 * test this driver on, and Cypress (including In-System Design) for
54 * providing early devices for those host controllers to talk to!
55 */
56
57#define DRIVER_AUTHOR "David Brownell"
58#define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
59
60static const char hcd_name [] = "ehci_hcd";
61
62
63#undef EHCI_URB_TRACE
64
65/* magic numbers that can affect system performance */
66#define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
67#define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
68#define EHCI_TUNE_RL_TT 0
69#define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
70#define EHCI_TUNE_MULT_TT 1
71/*
72 * Some drivers think it's safe to schedule isochronous transfers more than
73 * 256 ms into the future (partly as a result of an old bug in the scheduling
74 * code). In an attempt to avoid trouble, we will use a minimum scheduling
75 * length of 512 frames instead of 256.
76 */
77#define EHCI_TUNE_FLS 1 /* (medium) 512-frame schedule */
78
79/* Initial IRQ latency: faster than hw default */
80static int log2_irq_thresh; // 0 to 6
81module_param (log2_irq_thresh, int, S_IRUGO);
82MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
83
84/* initial park setting: slower than hw default */
85static unsigned park;
86module_param (park, uint, S_IRUGO);
87MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
88
89/* for flakey hardware, ignore overcurrent indicators */
90static bool ignore_oc;
91module_param (ignore_oc, bool, S_IRUGO);
92MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
93
94#define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
95
96/*-------------------------------------------------------------------------*/
97
98#include "ehci.h"
99#include "pci-quirks.h"
100
101static void compute_tt_budget(u8 budget_table[EHCI_BANDWIDTH_SIZE],
102 struct ehci_tt *tt);
103
104/*
105 * The MosChip MCS9990 controller updates its microframe counter
106 * a little before the frame counter, and occasionally we will read
107 * the invalid intermediate value. Avoid problems by checking the
108 * microframe number (the low-order 3 bits); if they are 0 then
109 * re-read the register to get the correct value.
110 */
111static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci)
112{
113 unsigned uf;
114
115 uf = ehci_readl(ehci, regs: &ehci->regs->frame_index);
116 if (unlikely((uf & 7) == 0))
117 uf = ehci_readl(ehci, regs: &ehci->regs->frame_index);
118 return uf;
119}
120
121static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci)
122{
123 if (ehci->frame_index_bug)
124 return ehci_moschip_read_frame_index(ehci);
125 return ehci_readl(ehci, regs: &ehci->regs->frame_index);
126}
127
128#include "ehci-dbg.c"
129
130/*-------------------------------------------------------------------------*/
131
132/*
133 * ehci_handshake - spin reading hc until handshake completes or fails
134 * @ptr: address of hc register to be read
135 * @mask: bits to look at in result of read
136 * @done: value of those bits when handshake succeeds
137 * @usec: timeout in microseconds
138 *
139 * Returns negative errno, or zero on success
140 *
141 * Success happens when the "mask" bits have the specified value (hardware
142 * handshake done). There are two failure modes: "usec" have passed (major
143 * hardware flakeout), or the register reads as all-ones (hardware removed).
144 *
145 * That last failure should_only happen in cases like physical cardbus eject
146 * before driver shutdown. But it also seems to be caused by bugs in cardbus
147 * bridge shutdown: shutting down the bridge before the devices using it.
148 */
149int ehci_handshake(struct ehci_hcd *ehci, void __iomem *ptr,
150 u32 mask, u32 done, int usec)
151{
152 u32 result;
153
154 do {
155 result = ehci_readl(ehci, regs: ptr);
156 if (result == ~(u32)0) /* card removed */
157 return -ENODEV;
158 result &= mask;
159 if (result == done)
160 return 0;
161 udelay (usec: 1);
162 usec--;
163 } while (usec > 0);
164 return -ETIMEDOUT;
165}
166EXPORT_SYMBOL_GPL(ehci_handshake);
167
168/* check TDI/ARC silicon is in host mode */
169static int tdi_in_host_mode (struct ehci_hcd *ehci)
170{
171 u32 tmp;
172
173 tmp = ehci_readl(ehci, regs: &ehci->regs->usbmode);
174 return (tmp & 3) == USBMODE_CM_HC;
175}
176
177/*
178 * Force HC to halt state from unknown (EHCI spec section 2.3).
179 * Must be called with interrupts enabled and the lock not held.
180 */
181static int ehci_halt (struct ehci_hcd *ehci)
182{
183 u32 temp;
184
185 spin_lock_irq(lock: &ehci->lock);
186
187 /* disable any irqs left enabled by previous code */
188 ehci_writel(ehci, val: 0, regs: &ehci->regs->intr_enable);
189
190 if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) {
191 spin_unlock_irq(lock: &ehci->lock);
192 return 0;
193 }
194
195 /*
196 * This routine gets called during probe before ehci->command
197 * has been initialized, so we can't rely on its value.
198 */
199 ehci->command &= ~CMD_RUN;
200 temp = ehci_readl(ehci, regs: &ehci->regs->command);
201 temp &= ~(CMD_RUN | CMD_IAAD);
202 ehci_writel(ehci, val: temp, regs: &ehci->regs->command);
203
204 spin_unlock_irq(lock: &ehci->lock);
205 synchronize_irq(irq: ehci_to_hcd(ehci)->irq);
206
207 return ehci_handshake(ehci, &ehci->regs->status,
208 STS_HALT, STS_HALT, 16 * 125);
209}
210
211/* put TDI/ARC silicon into EHCI mode */
212static void tdi_reset (struct ehci_hcd *ehci)
213{
214 u32 tmp;
215
216 tmp = ehci_readl(ehci, regs: &ehci->regs->usbmode);
217 tmp |= USBMODE_CM_HC;
218 /* The default byte access to MMR space is LE after
219 * controller reset. Set the required endian mode
220 * for transfer buffers to match the host microprocessor
221 */
222 if (ehci_big_endian_mmio(ehci))
223 tmp |= USBMODE_BE;
224 ehci_writel(ehci, val: tmp, regs: &ehci->regs->usbmode);
225}
226
227/*
228 * Reset a non-running (STS_HALT == 1) controller.
229 * Must be called with interrupts enabled and the lock not held.
230 */
231int ehci_reset(struct ehci_hcd *ehci)
232{
233 int retval;
234 u32 command = ehci_readl(ehci, regs: &ehci->regs->command);
235
236 /* If the EHCI debug controller is active, special care must be
237 * taken before and after a host controller reset */
238 if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci)))
239 ehci->debug = NULL;
240
241 command |= CMD_RESET;
242 dbg_cmd (ehci, label: "reset", command);
243 ehci_writel(ehci, val: command, regs: &ehci->regs->command);
244 ehci->rh_state = EHCI_RH_HALTED;
245 ehci->next_statechange = jiffies;
246 retval = ehci_handshake(ehci, &ehci->regs->command,
247 CMD_RESET, 0, 250 * 1000);
248
249 if (ehci->has_hostpc) {
250 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
251 regs: &ehci->regs->usbmode_ex);
252 ehci_writel(ehci, TXFIFO_DEFAULT, regs: &ehci->regs->txfill_tuning);
253 }
254 if (retval)
255 return retval;
256
257 if (ehci_is_TDI(ehci))
258 tdi_reset (ehci);
259
260 if (ehci->debug)
261 dbgp_external_startup(ehci_to_hcd(ehci));
262
263 ehci->port_c_suspend = ehci->suspended_ports =
264 ehci->resuming_ports = 0;
265 return retval;
266}
267EXPORT_SYMBOL_GPL(ehci_reset);
268
269/*
270 * Idle the controller (turn off the schedules).
271 * Must be called with interrupts enabled and the lock not held.
272 */
273static void ehci_quiesce (struct ehci_hcd *ehci)
274{
275 u32 temp;
276
277 if (ehci->rh_state != EHCI_RH_RUNNING)
278 return;
279
280 /* wait for any schedule enables/disables to take effect */
281 temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
282 ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp,
283 16 * 125);
284
285 /* then disable anything that's still active */
286 spin_lock_irq(lock: &ehci->lock);
287 ehci->command &= ~(CMD_ASE | CMD_PSE);
288 ehci_writel(ehci, val: ehci->command, regs: &ehci->regs->command);
289 spin_unlock_irq(lock: &ehci->lock);
290
291 /* hardware can take 16 microframes to turn off ... */
292 ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0,
293 16 * 125);
294}
295
296/*-------------------------------------------------------------------------*/
297
298static void end_iaa_cycle(struct ehci_hcd *ehci);
299static void end_unlink_async(struct ehci_hcd *ehci);
300static void unlink_empty_async(struct ehci_hcd *ehci);
301static void ehci_work(struct ehci_hcd *ehci);
302static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
303static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
304static int ehci_port_power(struct ehci_hcd *ehci, int portnum, bool enable);
305
306#include "ehci-timer.c"
307#include "ehci-hub.c"
308#include "ehci-mem.c"
309#include "ehci-q.c"
310#include "ehci-sched.c"
311#include "ehci-sysfs.c"
312
313/*-------------------------------------------------------------------------*/
314
315/* On some systems, leaving remote wakeup enabled prevents system shutdown.
316 * The firmware seems to think that powering off is a wakeup event!
317 * This routine turns off remote wakeup and everything else, on all ports.
318 */
319static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
320{
321 int port = HCS_N_PORTS(ehci->hcs_params);
322
323 while (port--) {
324 spin_unlock_irq(lock: &ehci->lock);
325 ehci_port_power(ehci, portnum: port, enable: false);
326 spin_lock_irq(lock: &ehci->lock);
327 ehci_writel(ehci, PORT_RWC_BITS,
328 regs: &ehci->regs->port_status[port]);
329 }
330}
331
332/*
333 * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
334 * Must be called with interrupts enabled and the lock not held.
335 */
336static void ehci_silence_controller(struct ehci_hcd *ehci)
337{
338 ehci_halt(ehci);
339
340 spin_lock_irq(lock: &ehci->lock);
341 ehci->rh_state = EHCI_RH_HALTED;
342 ehci_turn_off_all_ports(ehci);
343
344 /* make BIOS/etc use companion controller during reboot */
345 ehci_writel(ehci, val: 0, regs: &ehci->regs->configured_flag);
346
347 /* unblock posted writes */
348 ehci_readl(ehci, regs: &ehci->regs->configured_flag);
349 spin_unlock_irq(lock: &ehci->lock);
350}
351
352/* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
353 * This forcibly disables dma and IRQs, helping kexec and other cases
354 * where the next system software may expect clean state.
355 */
356static void ehci_shutdown(struct usb_hcd *hcd)
357{
358 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
359
360 /**
361 * Protect the system from crashing at system shutdown in cases where
362 * usb host is not added yet from OTG controller driver.
363 * As ehci_setup() not done yet, so stop accessing registers or
364 * variables initialized in ehci_setup()
365 */
366 if (!ehci->sbrn)
367 return;
368
369 spin_lock_irq(lock: &ehci->lock);
370 ehci->shutdown = true;
371 ehci->rh_state = EHCI_RH_STOPPING;
372 ehci->enabled_hrtimer_events = 0;
373 spin_unlock_irq(lock: &ehci->lock);
374
375 ehci_silence_controller(ehci);
376
377 hrtimer_cancel(timer: &ehci->hrtimer);
378}
379
380/*-------------------------------------------------------------------------*/
381
382/*
383 * ehci_work is called from some interrupts, timers, and so on.
384 * it calls driver completion functions, after dropping ehci->lock.
385 */
386static void ehci_work (struct ehci_hcd *ehci)
387{
388 /* another CPU may drop ehci->lock during a schedule scan while
389 * it reports urb completions. this flag guards against bogus
390 * attempts at re-entrant schedule scanning.
391 */
392 if (ehci->scanning) {
393 ehci->need_rescan = true;
394 return;
395 }
396 ehci->scanning = true;
397
398 rescan:
399 ehci->need_rescan = false;
400 if (ehci->async_count)
401 scan_async(ehci);
402 if (ehci->intr_count > 0)
403 scan_intr(ehci);
404 if (ehci->isoc_count > 0)
405 scan_isoc(ehci);
406 if (ehci->need_rescan)
407 goto rescan;
408 ehci->scanning = false;
409
410 /* the IO watchdog guards against hardware or driver bugs that
411 * misplace IRQs, and should let us run completely without IRQs.
412 * such lossage has been observed on both VT6202 and VT8235.
413 */
414 turn_on_io_watchdog(ehci);
415}
416
417/*
418 * Called when the ehci_hcd module is removed.
419 */
420static void ehci_stop (struct usb_hcd *hcd)
421{
422 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
423
424 ehci_dbg (ehci, "stop\n");
425
426 /* no more interrupts ... */
427
428 spin_lock_irq(lock: &ehci->lock);
429 ehci->enabled_hrtimer_events = 0;
430 spin_unlock_irq(lock: &ehci->lock);
431
432 ehci_quiesce(ehci);
433 ehci_silence_controller(ehci);
434 ehci_reset (ehci);
435
436 hrtimer_cancel(timer: &ehci->hrtimer);
437 remove_sysfs_files(ehci);
438 remove_debug_files (bus: ehci);
439
440 /* root hub is shut down separately (first, when possible) */
441 spin_lock_irq (lock: &ehci->lock);
442 end_free_itds(ehci);
443 spin_unlock_irq (lock: &ehci->lock);
444 ehci_mem_cleanup (ehci);
445
446 if (ehci->amd_pll_fix == 1)
447 usb_amd_dev_put();
448
449 dbg_status (ehci, label: "ehci_stop completed",
450 status: ehci_readl(ehci, regs: &ehci->regs->status));
451}
452
453/* one-time init, only for memory state */
454static int ehci_init(struct usb_hcd *hcd)
455{
456 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
457 u32 temp;
458 int retval;
459 u32 hcc_params;
460 struct ehci_qh_hw *hw;
461
462 spin_lock_init(&ehci->lock);
463
464 /*
465 * keep io watchdog by default, those good HCDs could turn off it later
466 */
467 ehci->need_io_watchdog = 1;
468
469 hrtimer_setup(timer: &ehci->hrtimer, function: ehci_hrtimer_func, CLOCK_MONOTONIC, mode: HRTIMER_MODE_ABS);
470 ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
471
472 hcc_params = ehci_readl(ehci, regs: &ehci->caps->hcc_params);
473
474 /*
475 * by default set standard 80% (== 100 usec/uframe) max periodic
476 * bandwidth as required by USB 2.0
477 */
478 ehci->uframe_periodic_max = 100;
479
480 /*
481 * hw default: 1K periodic list heads, one per frame.
482 * periodic_size can shrink by USBCMD update if hcc_params allows.
483 */
484 ehci->periodic_size = DEFAULT_I_TDPS;
485 INIT_LIST_HEAD(list: &ehci->async_unlink);
486 INIT_LIST_HEAD(list: &ehci->async_idle);
487 INIT_LIST_HEAD(list: &ehci->intr_unlink_wait);
488 INIT_LIST_HEAD(list: &ehci->intr_unlink);
489 INIT_LIST_HEAD(list: &ehci->intr_qh_list);
490 INIT_LIST_HEAD(list: &ehci->cached_itd_list);
491 INIT_LIST_HEAD(list: &ehci->cached_sitd_list);
492 INIT_LIST_HEAD(list: &ehci->tt_list);
493
494 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
495 /* periodic schedule size can be smaller than default */
496 switch (EHCI_TUNE_FLS) {
497 case 0: ehci->periodic_size = 1024; break;
498 case 1: ehci->periodic_size = 512; break;
499 case 2: ehci->periodic_size = 256; break;
500 default: BUG();
501 }
502 }
503 if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
504 return retval;
505
506 /* controllers may cache some of the periodic schedule ... */
507 if (HCC_ISOC_CACHE(hcc_params)) // full frame cache
508 ehci->i_thresh = 0;
509 else // N microframes cached
510 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
511
512 /*
513 * dedicate a qh for the async ring head, since we couldn't unlink
514 * a 'real' qh without stopping the async schedule [4.8]. use it
515 * as the 'reclamation list head' too.
516 * its dummy is used in hw_alt_next of many tds, to prevent the qh
517 * from automatically advancing to the next td after short reads.
518 */
519 ehci->async->qh_next.qh = NULL;
520 hw = ehci->async->hw;
521 hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
522 hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
523#if defined(CONFIG_PPC_PS3)
524 hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
525#endif
526 hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
527 hw->hw_qtd_next = EHCI_LIST_END(ehci);
528 ehci->async->qh_state = QH_STATE_LINKED;
529 hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
530
531 /* clear interrupt enables, set irq latency */
532 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
533 log2_irq_thresh = 0;
534 temp = 1 << (16 + log2_irq_thresh);
535 if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
536 ehci->has_ppcd = 1;
537 ehci_dbg(ehci, "enable per-port change event\n");
538 temp |= CMD_PPCEE;
539 }
540 if (HCC_CANPARK(hcc_params)) {
541 /* HW default park == 3, on hardware that supports it (like
542 * NVidia and ALI silicon), maximizes throughput on the async
543 * schedule by avoiding QH fetches between transfers.
544 *
545 * With fast usb storage devices and NForce2, "park" seems to
546 * make problems: throughput reduction (!), data errors...
547 */
548 if (park) {
549 park = min_t(unsigned int, park, 3);
550 temp |= CMD_PARK;
551 temp |= park << 8;
552 }
553 ehci_dbg(ehci, "park %d\n", park);
554 }
555 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
556 /* periodic schedule size can be smaller than default */
557 temp &= ~(3 << 2);
558 temp |= (EHCI_TUNE_FLS << 2);
559 }
560 ehci->command = temp;
561
562 /* Accept arbitrarily long scatter-gather lists */
563 if (!hcd->localmem_pool)
564 hcd->self.sg_tablesize = ~0;
565
566 /* Prepare for unlinking active QHs */
567 ehci->old_current = ~0;
568 return 0;
569}
570
571/* start HC running; it's halted, ehci_init() has been run (once) */
572static int ehci_run (struct usb_hcd *hcd)
573{
574 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
575 u32 temp;
576 u32 hcc_params;
577 int rc;
578
579 hcd->uses_new_polling = 1;
580
581 /* EHCI spec section 4.1 */
582
583 ehci_writel(ehci, val: ehci->periodic_dma, regs: &ehci->regs->frame_list);
584 ehci_writel(ehci, val: (u32)ehci->async->qh_dma, regs: &ehci->regs->async_next);
585
586 /*
587 * hcc_params controls whether ehci->regs->segment must (!!!)
588 * be used; it constrains QH/ITD/SITD and QTD locations.
589 * dma_pool consistent memory always uses segment zero.
590 * streaming mappings for I/O buffers, like dma_map_single(),
591 * can return segments above 4GB, if the device allows.
592 *
593 * NOTE: the dma mask is visible through dev->dma_mask, so
594 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
595 * Scsi_Host.highmem_io, and so forth. It's readonly to all
596 * host side drivers though.
597 */
598 hcc_params = ehci_readl(ehci, regs: &ehci->caps->hcc_params);
599 if (HCC_64BIT_ADDR(hcc_params)) {
600 ehci_writel(ehci, val: 0, regs: &ehci->regs->segment);
601#if 0
602// this is deeply broken on almost all architectures
603 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
604 ehci_info(ehci, "enabled 64bit DMA\n");
605#endif
606 }
607
608
609 // Philips, Intel, and maybe others need CMD_RUN before the
610 // root hub will detect new devices (why?); NEC doesn't
611 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
612 ehci->command |= CMD_RUN;
613 ehci_writel(ehci, val: ehci->command, regs: &ehci->regs->command);
614 dbg_cmd (ehci, label: "init", command: ehci->command);
615
616 /*
617 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
618 * are explicitly handed to companion controller(s), so no TT is
619 * involved with the root hub. (Except where one is integrated,
620 * and there's no companion controller unless maybe for USB OTG.)
621 *
622 * Turning on the CF flag will transfer ownership of all ports
623 * from the companions to the EHCI controller. If any of the
624 * companions are in the middle of a port reset at the time, it
625 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
626 * guarantees that no resets are in progress. After we set CF,
627 * a short delay lets the hardware catch up; new resets shouldn't
628 * be started before the port switching actions could complete.
629 */
630 down_write(sem: &ehci_cf_port_reset_rwsem);
631 ehci->rh_state = EHCI_RH_RUNNING;
632 ehci_writel(ehci, FLAG_CF, regs: &ehci->regs->configured_flag);
633
634 /* Wait until HC become operational */
635 ehci_readl(ehci, regs: &ehci->regs->command); /* unblock posted writes */
636 msleep(msecs: 5);
637
638 /* For Aspeed, STS_HALT also depends on ASS/PSS status.
639 * Check CMD_RUN instead.
640 */
641 if (ehci->is_aspeed)
642 rc = ehci_handshake(ehci, &ehci->regs->command, CMD_RUN,
643 1, 100 * 1000);
644 else
645 rc = ehci_handshake(ehci, &ehci->regs->status, STS_HALT,
646 0, 100 * 1000);
647
648 up_write(sem: &ehci_cf_port_reset_rwsem);
649
650 if (rc) {
651 ehci_err(ehci, "USB %x.%x, controller refused to start: %d\n",
652 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f), rc);
653 return rc;
654 }
655
656 ehci->last_periodic_enable = ktime_get_real();
657
658 temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
659 ehci_info (ehci,
660 "USB %x.%x started, EHCI %x.%02x%s\n",
661 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
662 temp >> 8, temp & 0xff,
663 (ignore_oc || ehci->spurious_oc) ? ", overcurrent ignored" : "");
664
665 ehci_writel(ehci, INTR_MASK,
666 regs: &ehci->regs->intr_enable); /* Turn On Interrupts */
667
668 /* GRR this is run-once init(), being done every time the HC starts.
669 * So long as they're part of class devices, we can't do it init()
670 * since the class device isn't created that early.
671 */
672 create_debug_files(bus: ehci);
673 create_sysfs_files(ehci);
674
675 return 0;
676}
677
678int ehci_setup(struct usb_hcd *hcd)
679{
680 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
681 int retval;
682
683 ehci->regs = (void __iomem *)ehci->caps +
684 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
685 dbg_hcs_params(ehci, label: "reset");
686 dbg_hcc_params(ehci, label: "reset");
687
688 /* cache this readonly data; minimize chip reads */
689 ehci->hcs_params = ehci_readl(ehci, regs: &ehci->caps->hcs_params);
690
691 ehci->sbrn = HCD_USB2;
692
693 /* data structure init */
694 retval = ehci_init(hcd);
695 if (retval)
696 return retval;
697
698 retval = ehci_halt(ehci);
699 if (retval) {
700 ehci_mem_cleanup(ehci);
701 return retval;
702 }
703
704 ehci_reset(ehci);
705
706 return 0;
707}
708EXPORT_SYMBOL_GPL(ehci_setup);
709
710/*-------------------------------------------------------------------------*/
711
712static irqreturn_t ehci_irq (struct usb_hcd *hcd)
713{
714 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
715 u32 status, current_status, masked_status, pcd_status = 0;
716 u32 cmd;
717 int bh;
718
719 spin_lock(lock: &ehci->lock);
720
721 status = 0;
722 current_status = ehci_readl(ehci, regs: &ehci->regs->status);
723restart:
724
725 /* e.g. cardbus physical eject */
726 if (current_status == ~(u32) 0) {
727 ehci_dbg (ehci, "device removed\n");
728 goto dead;
729 }
730 status |= current_status;
731
732 /*
733 * We don't use STS_FLR, but some controllers don't like it to
734 * remain on, so mask it out along with the other status bits.
735 */
736 masked_status = current_status & (INTR_MASK | STS_FLR);
737
738 /* Shared IRQ? */
739 if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
740 spin_unlock(lock: &ehci->lock);
741 return IRQ_NONE;
742 }
743
744 /* clear (just) interrupts */
745 ehci_writel(ehci, val: masked_status, regs: &ehci->regs->status);
746
747 /* For edge interrupts, don't race with an interrupt bit being raised */
748 current_status = ehci_readl(ehci, regs: &ehci->regs->status);
749 if (current_status & INTR_MASK)
750 goto restart;
751
752 cmd = ehci_readl(ehci, regs: &ehci->regs->command);
753 bh = 0;
754
755 /* normal [4.15.1.2] or error [4.15.1.1] completion */
756 if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
757 if (likely ((status & STS_ERR) == 0)) {
758 INCR(ehci->stats.normal);
759 } else {
760 /* Force to check port status */
761 if (ehci->has_ci_pec_bug)
762 status |= STS_PCD;
763 INCR(ehci->stats.error);
764 }
765 bh = 1;
766 }
767
768 /* complete the unlinking of some qh [4.15.2.3] */
769 if (status & STS_IAA) {
770
771 /* Turn off the IAA watchdog */
772 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG);
773
774 /*
775 * Mild optimization: Allow another IAAD to reset the
776 * hrtimer, if one occurs before the next expiration.
777 * In theory we could always cancel the hrtimer, but
778 * tests show that about half the time it will be reset
779 * for some other event anyway.
780 */
781 if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG)
782 ++ehci->next_hrtimer_event;
783
784 /* guard against (alleged) silicon errata */
785 if (cmd & CMD_IAAD)
786 ehci_dbg(ehci, "IAA with IAAD still set?\n");
787 if (ehci->iaa_in_progress)
788 INCR(ehci->stats.iaa);
789 end_iaa_cycle(ehci);
790 }
791
792 /* remote wakeup [4.3.1] */
793 if (status & STS_PCD) {
794 unsigned i = HCS_N_PORTS (ehci->hcs_params);
795 u32 ppcd = ~0;
796
797 /* kick root hub later */
798 pcd_status = status;
799
800 /* resume root hub? */
801 if (ehci->rh_state == EHCI_RH_SUSPENDED)
802 usb_hcd_resume_root_hub(hcd);
803
804 /* get per-port change detect bits */
805 if (ehci->has_ppcd)
806 ppcd = status >> 16;
807
808 while (i--) {
809 int pstatus;
810
811 /* leverage per-port change bits feature */
812 if (!(ppcd & (1 << i)))
813 continue;
814 pstatus = ehci_readl(ehci,
815 regs: &ehci->regs->port_status[i]);
816
817 if (pstatus & PORT_OWNER)
818 continue;
819 if (!(test_bit(i, &ehci->suspended_ports) &&
820 ((pstatus & PORT_RESUME) ||
821 !(pstatus & PORT_SUSPEND)) &&
822 (pstatus & PORT_PE) &&
823 ehci->reset_done[i] == 0))
824 continue;
825
826 /* start USB_RESUME_TIMEOUT msec resume signaling from
827 * this port, and make hub_wq collect
828 * PORT_STAT_C_SUSPEND to stop that signaling.
829 */
830 ehci->reset_done[i] = jiffies +
831 msecs_to_jiffies(USB_RESUME_TIMEOUT);
832 set_bit(nr: i, addr: &ehci->resuming_ports);
833 ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
834 usb_hcd_start_port_resume(bus: &hcd->self, portnum: i);
835 mod_timer(timer: &hcd->rh_timer, expires: ehci->reset_done[i]);
836 }
837 }
838
839 /* PCI errors [4.15.2.4] */
840 if (unlikely ((status & STS_FATAL) != 0)) {
841 ehci_err(ehci, "fatal error\n");
842 dbg_cmd(ehci, label: "fatal", command: cmd);
843 dbg_status(ehci, label: "fatal", status);
844dead:
845 usb_hc_died(hcd);
846
847 /* Don't let the controller do anything more */
848 ehci->shutdown = true;
849 ehci->rh_state = EHCI_RH_STOPPING;
850 ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
851 ehci_writel(ehci, val: ehci->command, regs: &ehci->regs->command);
852 ehci_writel(ehci, val: 0, regs: &ehci->regs->intr_enable);
853 ehci_handle_controller_death(ehci);
854
855 /* Handle completions when the controller stops */
856 bh = 0;
857 }
858
859 if (bh)
860 ehci_work (ehci);
861 spin_unlock(lock: &ehci->lock);
862 if (pcd_status)
863 usb_hcd_poll_rh_status(hcd);
864 return IRQ_HANDLED;
865}
866
867/*-------------------------------------------------------------------------*/
868
869/*
870 * non-error returns are a promise to giveback() the urb later
871 * we drop ownership so next owner (or urb unlink) can get it
872 *
873 * urb + dev is in hcd.self.controller.urb_list
874 * we're queueing TDs onto software and hardware lists
875 *
876 * hcd-specific init for hcpriv hasn't been done yet
877 *
878 * NOTE: control, bulk, and interrupt share the same code to append TDs
879 * to a (possibly active) QH, and the same QH scanning code.
880 */
881static int ehci_urb_enqueue (
882 struct usb_hcd *hcd,
883 struct urb *urb,
884 gfp_t mem_flags
885) {
886 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
887 struct list_head qtd_list;
888
889 INIT_LIST_HEAD (list: &qtd_list);
890
891 switch (usb_pipetype (urb->pipe)) {
892 case PIPE_CONTROL:
893 /* qh_completions() code doesn't handle all the fault cases
894 * in multi-TD control transfers. Even 1KB is rare anyway.
895 */
896 if (urb->transfer_buffer_length > (16 * 1024))
897 return -EMSGSIZE;
898 fallthrough;
899 /* case PIPE_BULK: */
900 default:
901 if (!qh_urb_transaction (ehci, urb, head: &qtd_list, flags: mem_flags))
902 return -ENOMEM;
903 return submit_async(ehci, urb, qtd_list: &qtd_list, mem_flags);
904
905 case PIPE_INTERRUPT:
906 if (!qh_urb_transaction (ehci, urb, head: &qtd_list, flags: mem_flags))
907 return -ENOMEM;
908 return intr_submit(ehci, urb, qtd_list: &qtd_list, mem_flags);
909
910 case PIPE_ISOCHRONOUS:
911 if (urb->dev->speed == USB_SPEED_HIGH)
912 return itd_submit (ehci, urb, mem_flags);
913 else
914 return sitd_submit (ehci, urb, mem_flags);
915 }
916}
917
918/* remove from hardware lists
919 * completions normally happen asynchronously
920 */
921
922static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
923{
924 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
925 struct ehci_qh *qh;
926 unsigned long flags;
927 int rc;
928
929 spin_lock_irqsave (&ehci->lock, flags);
930 rc = usb_hcd_check_unlink_urb(hcd, urb, status);
931 if (rc)
932 goto done;
933
934 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
935 /*
936 * We don't expedite dequeue for isochronous URBs.
937 * Just wait until they complete normally or their
938 * time slot expires.
939 */
940 } else {
941 qh = (struct ehci_qh *) urb->hcpriv;
942 qh->unlink_reason |= QH_UNLINK_REQUESTED;
943 switch (qh->qh_state) {
944 case QH_STATE_LINKED:
945 if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)
946 start_unlink_intr(ehci, qh);
947 else
948 start_unlink_async(ehci, qh);
949 break;
950 case QH_STATE_COMPLETING:
951 qh->dequeue_during_giveback = 1;
952 break;
953 case QH_STATE_UNLINK:
954 case QH_STATE_UNLINK_WAIT:
955 /* already started */
956 break;
957 case QH_STATE_IDLE:
958 /* QH might be waiting for a Clear-TT-Buffer */
959 qh_completions(ehci, qh);
960 break;
961 }
962 }
963done:
964 spin_unlock_irqrestore (lock: &ehci->lock, flags);
965 return rc;
966}
967
968/*-------------------------------------------------------------------------*/
969
970// bulk qh holds the data toggle
971
972static void
973ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
974{
975 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
976 unsigned long flags;
977 struct ehci_qh *qh;
978
979 /* ASSERT: any requests/urbs are being unlinked */
980 /* ASSERT: nobody can be submitting urbs for this any more */
981
982rescan:
983 spin_lock_irqsave (&ehci->lock, flags);
984 qh = ep->hcpriv;
985 if (!qh)
986 goto done;
987
988 /* endpoints can be iso streams. for now, we don't
989 * accelerate iso completions ... so spin a while.
990 */
991 if (qh->hw == NULL) {
992 struct ehci_iso_stream *stream = ep->hcpriv;
993
994 if (!list_empty(head: &stream->td_list))
995 goto idle_timeout;
996
997 /* BUG_ON(!list_empty(&stream->free_list)); */
998 reserve_release_iso_bandwidth(ehci, stream, sign: -1);
999 kfree(objp: stream);
1000 goto done;
1001 }
1002
1003 qh->unlink_reason |= QH_UNLINK_REQUESTED;
1004 switch (qh->qh_state) {
1005 case QH_STATE_LINKED:
1006 if (list_empty(head: &qh->qtd_list))
1007 qh->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
1008 else
1009 WARN_ON(1);
1010 if (usb_endpoint_type(epd: &ep->desc) != USB_ENDPOINT_XFER_INT)
1011 start_unlink_async(ehci, qh);
1012 else
1013 start_unlink_intr(ehci, qh);
1014 fallthrough;
1015 case QH_STATE_COMPLETING: /* already in unlinking */
1016 case QH_STATE_UNLINK: /* wait for hw to finish? */
1017 case QH_STATE_UNLINK_WAIT:
1018idle_timeout:
1019 spin_unlock_irqrestore (lock: &ehci->lock, flags);
1020 schedule_timeout_uninterruptible(timeout: 1);
1021 goto rescan;
1022 case QH_STATE_IDLE: /* fully unlinked */
1023 if (qh->clearing_tt)
1024 goto idle_timeout;
1025 if (list_empty (head: &qh->qtd_list)) {
1026 if (qh->ps.bw_uperiod)
1027 reserve_release_intr_bandwidth(ehci, qh, sign: -1);
1028 qh_destroy(ehci, qh);
1029 break;
1030 }
1031 fallthrough;
1032 default:
1033 /* caller was supposed to have unlinked any requests;
1034 * that's not our job. just leak this memory.
1035 */
1036 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1037 qh, ep->desc.bEndpointAddress, qh->qh_state,
1038 list_empty (&qh->qtd_list) ? "" : "(has tds)");
1039 break;
1040 }
1041 done:
1042 ep->hcpriv = NULL;
1043 spin_unlock_irqrestore (lock: &ehci->lock, flags);
1044}
1045
1046static void
1047ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1048{
1049 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1050 struct ehci_qh *qh;
1051 int eptype = usb_endpoint_type(epd: &ep->desc);
1052 int epnum = usb_endpoint_num(epd: &ep->desc);
1053 int is_out = usb_endpoint_dir_out(epd: &ep->desc);
1054 unsigned long flags;
1055
1056 if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1057 return;
1058
1059 spin_lock_irqsave(&ehci->lock, flags);
1060 qh = ep->hcpriv;
1061
1062 /* For Bulk and Interrupt endpoints we maintain the toggle state
1063 * in the hardware; the toggle bits in udev aren't used at all.
1064 * When an endpoint is reset by usb_clear_halt() we must reset
1065 * the toggle bit in the QH.
1066 */
1067 if (qh) {
1068 if (!list_empty(head: &qh->qtd_list)) {
1069 WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1070 } else {
1071 /* The toggle value in the QH can't be updated
1072 * while the QH is active. Unlink it now;
1073 * re-linking will call qh_refresh().
1074 */
1075 usb_settoggle(qh->ps.udev, epnum, is_out, 0);
1076 qh->unlink_reason |= QH_UNLINK_REQUESTED;
1077 if (eptype == USB_ENDPOINT_XFER_BULK)
1078 start_unlink_async(ehci, qh);
1079 else
1080 start_unlink_intr(ehci, qh);
1081 }
1082 }
1083 spin_unlock_irqrestore(lock: &ehci->lock, flags);
1084}
1085
1086static int ehci_get_frame (struct usb_hcd *hcd)
1087{
1088 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
1089 return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1090}
1091
1092/*-------------------------------------------------------------------------*/
1093
1094/* Device addition and removal */
1095
1096static void ehci_remove_device(struct usb_hcd *hcd, struct usb_device *udev)
1097{
1098 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1099
1100 spin_lock_irq(lock: &ehci->lock);
1101 drop_tt(udev);
1102 spin_unlock_irq(lock: &ehci->lock);
1103}
1104
1105/*-------------------------------------------------------------------------*/
1106
1107#ifdef CONFIG_PM
1108
1109/* Clear wakeup signal locked in zhaoxin platform when device plug in. */
1110static void ehci_zx_wakeup_clear(struct ehci_hcd *ehci)
1111{
1112 u32 __iomem *reg = &ehci->regs->port_status[4];
1113 u32 t1 = ehci_readl(ehci, regs: reg);
1114
1115 t1 &= (u32)~0xf0000;
1116 t1 |= PORT_TEST_FORCE;
1117 ehci_writel(ehci, val: t1, regs: reg);
1118 t1 = ehci_readl(ehci, regs: reg);
1119 msleep(msecs: 1);
1120 t1 &= (u32)~0xf0000;
1121 ehci_writel(ehci, val: t1, regs: reg);
1122 ehci_readl(ehci, regs: reg);
1123 msleep(msecs: 1);
1124 t1 = ehci_readl(ehci, regs: reg);
1125 ehci_writel(ehci, val: t1 | PORT_CSC, regs: reg);
1126 ehci_readl(ehci, regs: reg);
1127}
1128
1129/* suspend/resume, section 4.3 */
1130
1131/* These routines handle the generic parts of controller suspend/resume */
1132
1133int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1134{
1135 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1136
1137 if (time_before(jiffies, ehci->next_statechange))
1138 msleep(msecs: 10);
1139
1140 /*
1141 * Root hub was already suspended. Disable IRQ emission and
1142 * mark HW unaccessible. The PM and USB cores make sure that
1143 * the root hub is either suspended or stopped.
1144 */
1145 ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1146
1147 spin_lock_irq(lock: &ehci->lock);
1148 ehci_writel(ehci, val: 0, regs: &ehci->regs->intr_enable);
1149 (void) ehci_readl(ehci, regs: &ehci->regs->intr_enable);
1150
1151 clear_bit(HCD_FLAG_HW_ACCESSIBLE, addr: &hcd->flags);
1152 spin_unlock_irq(lock: &ehci->lock);
1153
1154 synchronize_irq(irq: hcd->irq);
1155
1156 /* Check for race with a wakeup request */
1157 if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
1158 ehci_resume(hcd, force_reset: false);
1159 return -EBUSY;
1160 }
1161
1162 return 0;
1163}
1164EXPORT_SYMBOL_GPL(ehci_suspend);
1165
1166/* Returns 0 if power was preserved, 1 if power was lost */
1167int ehci_resume(struct usb_hcd *hcd, bool force_reset)
1168{
1169 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1170
1171 if (time_before(jiffies, ehci->next_statechange))
1172 msleep(msecs: 100);
1173
1174 /* Mark hardware accessible again as we are back to full power by now */
1175 set_bit(HCD_FLAG_HW_ACCESSIBLE, addr: &hcd->flags);
1176
1177 if (ehci->shutdown)
1178 return 0; /* Controller is dead */
1179
1180 if (ehci->zx_wakeup_clear_needed)
1181 ehci_zx_wakeup_clear(ehci);
1182
1183 /*
1184 * If CF is still set and reset isn't forced
1185 * then we maintained suspend power.
1186 * Just undo the effect of ehci_suspend().
1187 */
1188 if (ehci_readl(ehci, regs: &ehci->regs->configured_flag) == FLAG_CF &&
1189 !force_reset) {
1190 int mask = INTR_MASK;
1191
1192 ehci_prepare_ports_for_controller_resume(ehci);
1193
1194 spin_lock_irq(lock: &ehci->lock);
1195 if (ehci->shutdown)
1196 goto skip;
1197
1198 if (!hcd->self.root_hub->do_remote_wakeup)
1199 mask &= ~STS_PCD;
1200 ehci_writel(ehci, val: mask, regs: &ehci->regs->intr_enable);
1201 ehci_readl(ehci, regs: &ehci->regs->intr_enable);
1202 skip:
1203 spin_unlock_irq(lock: &ehci->lock);
1204 return 0;
1205 }
1206
1207 /*
1208 * Else reset, to cope with power loss or resume from hibernation
1209 * having let the firmware kick in during reboot.
1210 */
1211 usb_root_hub_lost_power(rhdev: hcd->self.root_hub);
1212 (void) ehci_halt(ehci);
1213 (void) ehci_reset(ehci);
1214
1215 spin_lock_irq(lock: &ehci->lock);
1216 if (ehci->shutdown)
1217 goto skip;
1218
1219 ehci_writel(ehci, val: ehci->command, regs: &ehci->regs->command);
1220 ehci_writel(ehci, FLAG_CF, regs: &ehci->regs->configured_flag);
1221 ehci_readl(ehci, regs: &ehci->regs->command); /* unblock posted writes */
1222
1223 ehci->rh_state = EHCI_RH_SUSPENDED;
1224 spin_unlock_irq(lock: &ehci->lock);
1225
1226 return 1;
1227}
1228EXPORT_SYMBOL_GPL(ehci_resume);
1229
1230#endif
1231
1232/*-------------------------------------------------------------------------*/
1233
1234/*
1235 * Generic structure: This gets copied for platform drivers so that
1236 * individual entries can be overridden as needed.
1237 */
1238
1239static const struct hc_driver ehci_hc_driver = {
1240 .description = hcd_name,
1241 .product_desc = "EHCI Host Controller",
1242 .hcd_priv_size = sizeof(struct ehci_hcd),
1243
1244 /*
1245 * generic hardware linkage
1246 */
1247 .irq = ehci_irq,
1248 .flags = HCD_MEMORY | HCD_DMA | HCD_USB2 | HCD_BH,
1249
1250 /*
1251 * basic lifecycle operations
1252 */
1253 .reset = ehci_setup,
1254 .start = ehci_run,
1255 .stop = ehci_stop,
1256 .shutdown = ehci_shutdown,
1257
1258 /*
1259 * managing i/o requests and associated device resources
1260 */
1261 .urb_enqueue = ehci_urb_enqueue,
1262 .urb_dequeue = ehci_urb_dequeue,
1263 .endpoint_disable = ehci_endpoint_disable,
1264 .endpoint_reset = ehci_endpoint_reset,
1265 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
1266
1267 /*
1268 * scheduling support
1269 */
1270 .get_frame_number = ehci_get_frame,
1271
1272 /*
1273 * root hub support
1274 */
1275 .hub_status_data = ehci_hub_status_data,
1276 .hub_control = ehci_hub_control,
1277 .bus_suspend = ehci_bus_suspend,
1278 .bus_resume = ehci_bus_resume,
1279 .relinquish_port = ehci_relinquish_port,
1280 .port_handed_over = ehci_port_handed_over,
1281 .get_resuming_ports = ehci_get_resuming_ports,
1282
1283 /*
1284 * device support
1285 */
1286 .free_dev = ehci_remove_device,
1287#ifdef CONFIG_USB_HCD_TEST_MODE
1288 /* EH SINGLE_STEP_SET_FEATURE test support */
1289 .submit_single_step_set_feature = ehci_submit_single_step_set_feature,
1290#endif
1291};
1292
1293void ehci_init_driver(struct hc_driver *drv,
1294 const struct ehci_driver_overrides *over)
1295{
1296 /* Copy the generic table to drv and then apply the overrides */
1297 *drv = ehci_hc_driver;
1298
1299 if (over) {
1300 drv->hcd_priv_size += over->extra_priv_size;
1301 if (over->reset)
1302 drv->reset = over->reset;
1303 if (over->port_power)
1304 drv->port_power = over->port_power;
1305 }
1306}
1307EXPORT_SYMBOL_GPL(ehci_init_driver);
1308
1309/*-------------------------------------------------------------------------*/
1310
1311MODULE_DESCRIPTION(DRIVER_DESC);
1312MODULE_AUTHOR (DRIVER_AUTHOR);
1313MODULE_LICENSE ("GPL");
1314
1315#ifdef CONFIG_USB_EHCI_SH
1316#include "ehci-sh.c"
1317#endif
1318
1319#ifdef CONFIG_PPC_PS3
1320#include "ehci-ps3.c"
1321#endif
1322
1323#ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1324#include "ehci-ppc-of.c"
1325#endif
1326
1327#ifdef CONFIG_XPS_USB_HCD_XILINX
1328#include "ehci-xilinx-of.c"
1329#endif
1330
1331#ifdef CONFIG_SPARC_LEON
1332#include "ehci-grlib.c"
1333#endif
1334
1335static struct platform_driver * const platform_drivers[] = {
1336#ifdef CONFIG_USB_EHCI_SH
1337 &ehci_hcd_sh_driver,
1338#endif
1339#ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1340 &ehci_hcd_ppc_of_driver,
1341#endif
1342#ifdef CONFIG_XPS_USB_HCD_XILINX
1343 &ehci_hcd_xilinx_of_driver,
1344#endif
1345#ifdef CONFIG_SPARC_LEON
1346 &ehci_grlib_driver,
1347#endif
1348};
1349
1350static int __init ehci_hcd_init(void)
1351{
1352 int retval = 0;
1353
1354 if (usb_disabled())
1355 return -ENODEV;
1356
1357 set_bit(USB_EHCI_LOADED, addr: &usb_hcds_loaded);
1358 if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1359 test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1360 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1361 " before uhci_hcd and ohci_hcd, not after\n");
1362
1363 pr_debug("%s: block sizes: qh %zd qtd %zd itd %zd sitd %zd\n",
1364 hcd_name,
1365 sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1366 sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1367
1368#ifdef CONFIG_DYNAMIC_DEBUG
1369 ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1370#endif
1371
1372 retval = platform_register_drivers(platform_drivers, ARRAY_SIZE(platform_drivers));
1373 if (retval < 0)
1374 goto clean0;
1375
1376#ifdef CONFIG_PPC_PS3
1377 retval = ps3_ehci_driver_register(&ps3_ehci_driver);
1378 if (retval < 0)
1379 goto clean1;
1380#endif
1381
1382 return 0;
1383
1384#ifdef CONFIG_PPC_PS3
1385clean1:
1386#endif
1387 platform_unregister_drivers(drivers: platform_drivers, ARRAY_SIZE(platform_drivers));
1388clean0:
1389#ifdef CONFIG_DYNAMIC_DEBUG
1390 debugfs_remove(ehci_debug_root);
1391 ehci_debug_root = NULL;
1392#endif
1393 clear_bit(USB_EHCI_LOADED, addr: &usb_hcds_loaded);
1394 return retval;
1395}
1396module_init(ehci_hcd_init);
1397
1398static void __exit ehci_hcd_cleanup(void)
1399{
1400#ifdef CONFIG_PPC_PS3
1401 ps3_ehci_driver_unregister(&ps3_ehci_driver);
1402#endif
1403 platform_unregister_drivers(drivers: platform_drivers, ARRAY_SIZE(platform_drivers));
1404#ifdef CONFIG_DYNAMIC_DEBUG
1405 debugfs_remove(ehci_debug_root);
1406#endif
1407 clear_bit(USB_EHCI_LOADED, addr: &usb_hcds_loaded);
1408}
1409module_exit(ehci_hcd_cleanup);
1410