| 1 | // SPDX-License-Identifier: MIT | 
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| 2 | /* | 
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| 3 | * Copyright © 2023 Intel Corporation | 
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| 4 | */ | 
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| 5 |  | 
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| 6 | #include <linux/ctype.h> | 
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| 7 | #include <linux/debugfs.h> | 
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| 8 | #include <linux/int_log.h> | 
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| 9 | #include <linux/math.h> | 
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| 10 |  | 
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| 11 | #include <drm/drm_fixed.h> | 
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| 12 | #include <drm/drm_print.h> | 
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| 13 |  | 
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| 14 | #include "intel_atomic.h" | 
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| 15 | #include "intel_crtc.h" | 
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| 16 | #include "intel_display_core.h" | 
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| 17 | #include "intel_display_types.h" | 
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| 18 | #include "intel_dp.h" | 
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| 19 | #include "intel_dp_mst.h" | 
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| 20 | #include "intel_dp_tunnel.h" | 
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| 21 | #include "intel_fdi.h" | 
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| 22 | #include "intel_link_bw.h" | 
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| 23 |  | 
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| 24 | static int get_forced_link_bpp_x16(struct intel_atomic_state *state, | 
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| 25 | const struct intel_crtc *crtc) | 
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| 26 | { | 
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| 27 | struct intel_digital_connector_state *conn_state; | 
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| 28 | struct intel_connector *connector; | 
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| 29 | int force_bpp_x16 = INT_MAX; | 
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| 30 | int i; | 
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| 31 |  | 
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| 32 | for_each_new_intel_connector_in_state(state, connector, conn_state, i) { | 
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| 33 | if (conn_state->base.crtc != &crtc->base) | 
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| 34 | continue; | 
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| 35 |  | 
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| 36 | if (!connector->link.force_bpp_x16) | 
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| 37 | continue; | 
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| 38 |  | 
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| 39 | force_bpp_x16 = min(force_bpp_x16, connector->link.force_bpp_x16); | 
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| 40 | } | 
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| 41 |  | 
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| 42 | return force_bpp_x16 < INT_MAX ? force_bpp_x16 : 0; | 
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| 43 | } | 
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| 44 |  | 
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| 45 | /** | 
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| 46 | * intel_link_bw_init_limits - initialize BW limits | 
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| 47 | * @state: Atomic state | 
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| 48 | * @limits: link BW limits | 
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| 49 | * | 
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| 50 | * Initialize @limits. | 
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| 51 | */ | 
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| 52 | void intel_link_bw_init_limits(struct intel_atomic_state *state, | 
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| 53 | struct intel_link_bw_limits *limits) | 
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| 54 | { | 
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| 55 | struct intel_display *display = to_intel_display(state); | 
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| 56 | enum pipe pipe; | 
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| 57 |  | 
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| 58 | limits->force_fec_pipes = 0; | 
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| 59 | limits->bpp_limit_reached_pipes = 0; | 
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| 60 | for_each_pipe(display, pipe) { | 
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| 61 | struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe); | 
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| 62 | const struct intel_crtc_state *crtc_state = | 
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| 63 | intel_atomic_get_new_crtc_state(state, crtc); | 
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| 64 | int forced_bpp_x16 = get_forced_link_bpp_x16(state, crtc); | 
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| 65 |  | 
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| 66 | if (state->base.duplicated && crtc_state) { | 
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| 67 | limits->max_bpp_x16[pipe] = crtc_state->max_link_bpp_x16; | 
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| 68 | if (crtc_state->fec_enable) | 
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| 69 | limits->force_fec_pipes |= BIT(pipe); | 
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| 70 | } else { | 
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| 71 | limits->max_bpp_x16[pipe] = INT_MAX; | 
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| 72 | } | 
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| 73 |  | 
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| 74 | if (forced_bpp_x16) | 
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| 75 | limits->max_bpp_x16[pipe] = min(limits->max_bpp_x16[pipe], forced_bpp_x16); | 
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| 76 | } | 
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| 77 | } | 
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| 78 |  | 
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| 79 | /** | 
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| 80 | * __intel_link_bw_reduce_bpp - reduce maximum link bpp for a selected pipe | 
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| 81 | * @state: atomic state | 
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| 82 | * @limits: link BW limits | 
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| 83 | * @pipe_mask: mask of pipes to select from | 
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| 84 | * @reason: explanation of why bpp reduction is needed | 
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| 85 | * @reduce_forced_bpp: allow reducing bpps below their forced link bpp | 
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| 86 | * | 
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| 87 | * Select the pipe from @pipe_mask with the biggest link bpp value and set the | 
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| 88 | * maximum of link bpp in @limits below this value. Modeset the selected pipe, | 
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| 89 | * so that its state will get recomputed. | 
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| 90 | * | 
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| 91 | * This function can be called to resolve a link's BW overallocation by reducing | 
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| 92 | * the link bpp of one pipe on the link and hence reducing the total link BW. | 
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| 93 | * | 
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| 94 | * Returns | 
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| 95 | *   - 0 in case of success | 
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| 96 | *   - %-ENOSPC if no pipe can further reduce its link bpp | 
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| 97 | *   - Other negative error, if modesetting the selected pipe failed | 
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| 98 | */ | 
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| 99 | static int __intel_link_bw_reduce_bpp(struct intel_atomic_state *state, | 
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| 100 | struct intel_link_bw_limits *limits, | 
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| 101 | u8 pipe_mask, | 
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| 102 | const char *reason, | 
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| 103 | bool reduce_forced_bpp) | 
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| 104 | { | 
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| 105 | struct intel_display *display = to_intel_display(state); | 
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| 106 | enum pipe max_bpp_pipe = INVALID_PIPE; | 
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| 107 | struct intel_crtc *crtc; | 
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| 108 | int max_bpp_x16 = 0; | 
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| 109 |  | 
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| 110 | for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) { | 
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| 111 | struct intel_crtc_state *crtc_state; | 
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| 112 | int link_bpp_x16; | 
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| 113 |  | 
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| 114 | if (limits->bpp_limit_reached_pipes & BIT(crtc->pipe)) | 
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| 115 | continue; | 
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| 116 |  | 
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| 117 | crtc_state = intel_atomic_get_crtc_state(state: &state->base, | 
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| 118 | crtc); | 
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| 119 | if (IS_ERR(ptr: crtc_state)) | 
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| 120 | return PTR_ERR(ptr: crtc_state); | 
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| 121 |  | 
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| 122 | if (crtc_state->dsc.compression_enable) | 
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| 123 | link_bpp_x16 = crtc_state->dsc.compressed_bpp_x16; | 
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| 124 | else | 
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| 125 | /* | 
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| 126 | * TODO: for YUV420 the actual link bpp is only half | 
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| 127 | * of the pipe bpp value. The MST encoder's BW allocation | 
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| 128 | * is based on the pipe bpp value, set the actual link bpp | 
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| 129 | * limit here once the MST BW allocation is fixed. | 
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| 130 | */ | 
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| 131 | link_bpp_x16 = fxp_q4_from_int(val_int: crtc_state->pipe_bpp); | 
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| 132 |  | 
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| 133 | if (!reduce_forced_bpp && | 
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| 134 | link_bpp_x16 <= get_forced_link_bpp_x16(state, crtc)) | 
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| 135 | continue; | 
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| 136 |  | 
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| 137 | if (link_bpp_x16 > max_bpp_x16) { | 
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| 138 | max_bpp_x16 = link_bpp_x16; | 
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| 139 | max_bpp_pipe = crtc->pipe; | 
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| 140 | } | 
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| 141 | } | 
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| 142 |  | 
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| 143 | if (max_bpp_pipe == INVALID_PIPE) | 
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| 144 | return -ENOSPC; | 
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| 145 |  | 
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| 146 | limits->max_bpp_x16[max_bpp_pipe] = max_bpp_x16 - 1; | 
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| 147 |  | 
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| 148 | return intel_modeset_pipes_in_mask_early(state, reason, | 
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| 149 | BIT(max_bpp_pipe)); | 
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| 150 | } | 
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| 151 |  | 
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| 152 | int intel_link_bw_reduce_bpp(struct intel_atomic_state *state, | 
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| 153 | struct intel_link_bw_limits *limits, | 
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| 154 | u8 pipe_mask, | 
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| 155 | const char *reason) | 
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| 156 | { | 
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| 157 | int ret; | 
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| 158 |  | 
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| 159 | /* Try to keep any forced link BPP. */ | 
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| 160 | ret = __intel_link_bw_reduce_bpp(state, limits, pipe_mask, reason, reduce_forced_bpp: false); | 
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| 161 | if (ret == -ENOSPC) | 
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| 162 | ret = __intel_link_bw_reduce_bpp(state, limits, pipe_mask, reason, reduce_forced_bpp: true); | 
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| 163 |  | 
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| 164 | return ret; | 
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| 165 | } | 
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| 166 |  | 
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| 167 | /** | 
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| 168 | * intel_link_bw_compute_pipe_bpp - compute pipe bpp limited by max link bpp | 
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| 169 | * @crtc_state: the crtc state | 
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| 170 | * | 
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| 171 | * Compute the pipe bpp limited by the CRTC's maximum link bpp. Encoders can | 
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| 172 | * call this function during state computation in the simple case where the | 
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| 173 | * link bpp will always match the pipe bpp. This is the case for all non-DP | 
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| 174 | * encoders, while DP encoders will use a link bpp lower than pipe bpp in case | 
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| 175 | * of DSC compression. | 
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| 176 | * | 
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| 177 | * Returns %true in case of success, %false if pipe bpp would need to be | 
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| 178 | * reduced below its valid range. | 
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| 179 | */ | 
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| 180 | bool intel_link_bw_compute_pipe_bpp(struct intel_crtc_state *crtc_state) | 
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| 181 | { | 
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| 182 | int pipe_bpp = min(crtc_state->pipe_bpp, | 
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| 183 | fxp_q4_to_int(crtc_state->max_link_bpp_x16)); | 
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| 184 |  | 
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| 185 | pipe_bpp = rounddown(pipe_bpp, 2 * 3); | 
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| 186 |  | 
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| 187 | if (pipe_bpp < 6 * 3) | 
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| 188 | return false; | 
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| 189 |  | 
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| 190 | crtc_state->pipe_bpp = pipe_bpp; | 
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| 191 |  | 
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| 192 | return true; | 
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| 193 | } | 
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| 194 |  | 
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| 195 | /** | 
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| 196 | * intel_link_bw_set_bpp_limit_for_pipe - set link bpp limit for a pipe to its minimum | 
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| 197 | * @state: atomic state | 
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| 198 | * @old_limits: link BW limits | 
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| 199 | * @new_limits: link BW limits | 
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| 200 | * @pipe: pipe | 
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| 201 | * | 
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| 202 | * Set the link bpp limit for @pipe in @new_limits to its value in | 
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| 203 | * @old_limits and mark this limit as the minimum. This function must be | 
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| 204 | * called after a pipe's compute config function failed, @old_limits | 
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| 205 | * containing the bpp limit with which compute config previously passed. | 
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| 206 | * | 
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| 207 | * The function will fail if setting a minimum is not possible, either | 
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| 208 | * because the old and new limits match (and so would lead to a pipe compute | 
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| 209 | * config failure) or the limit is already at the minimum. | 
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| 210 | * | 
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| 211 | * Returns %true in case of success. | 
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| 212 | */ | 
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| 213 | bool | 
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| 214 | intel_link_bw_set_bpp_limit_for_pipe(struct intel_atomic_state *state, | 
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| 215 | const struct intel_link_bw_limits *old_limits, | 
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| 216 | struct intel_link_bw_limits *new_limits, | 
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| 217 | enum pipe pipe) | 
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| 218 | { | 
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| 219 | struct intel_display *display = to_intel_display(state); | 
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| 220 |  | 
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| 221 | if (pipe == INVALID_PIPE) | 
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| 222 | return false; | 
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| 223 |  | 
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| 224 | if (new_limits->max_bpp_x16[pipe] == | 
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| 225 | old_limits->max_bpp_x16[pipe]) | 
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| 226 | return false; | 
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| 227 |  | 
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| 228 | if (drm_WARN_ON(display->drm, | 
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| 229 | new_limits->bpp_limit_reached_pipes & BIT(pipe))) | 
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| 230 | return false; | 
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| 231 |  | 
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| 232 | new_limits->max_bpp_x16[pipe] = | 
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| 233 | old_limits->max_bpp_x16[pipe]; | 
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| 234 | new_limits->bpp_limit_reached_pipes |= BIT(pipe); | 
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| 235 |  | 
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| 236 | return true; | 
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| 237 | } | 
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| 238 |  | 
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| 239 | static int check_all_link_config(struct intel_atomic_state *state, | 
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| 240 | struct intel_link_bw_limits *limits) | 
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| 241 | { | 
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| 242 | /* TODO: Check additional shared display link configurations like MST */ | 
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| 243 | int ret; | 
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| 244 |  | 
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| 245 | ret = intel_dp_mst_atomic_check_link(state, limits); | 
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| 246 | if (ret) | 
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| 247 | return ret; | 
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| 248 |  | 
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| 249 | ret = intel_dp_tunnel_atomic_check_link(state, limits); | 
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| 250 | if (ret) | 
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| 251 | return ret; | 
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| 252 |  | 
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| 253 | ret = intel_fdi_atomic_check_link(state, limits); | 
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| 254 | if (ret) | 
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| 255 | return ret; | 
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| 256 |  | 
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| 257 | return 0; | 
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| 258 | } | 
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| 259 |  | 
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| 260 | static bool | 
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| 261 | assert_link_limit_change_valid(struct intel_display *display, | 
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| 262 | const struct intel_link_bw_limits *old_limits, | 
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| 263 | const struct intel_link_bw_limits *new_limits) | 
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| 264 | { | 
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| 265 | bool bpps_changed = false; | 
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| 266 | enum pipe pipe; | 
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| 267 |  | 
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| 268 | /* FEC can't be forced off after it was forced on. */ | 
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| 269 | if (drm_WARN_ON(display->drm, | 
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| 270 | (old_limits->force_fec_pipes & new_limits->force_fec_pipes) != | 
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| 271 | old_limits->force_fec_pipes)) | 
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| 272 | return false; | 
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| 273 |  | 
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| 274 | for_each_pipe(display, pipe) { | 
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| 275 | /* The bpp limit can only decrease. */ | 
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| 276 | if (drm_WARN_ON(display->drm, | 
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| 277 | new_limits->max_bpp_x16[pipe] > | 
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| 278 | old_limits->max_bpp_x16[pipe])) | 
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| 279 | return false; | 
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| 280 |  | 
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| 281 | if (new_limits->max_bpp_x16[pipe] < | 
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| 282 | old_limits->max_bpp_x16[pipe]) | 
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| 283 | bpps_changed = true; | 
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| 284 | } | 
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| 285 |  | 
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| 286 | /* At least one limit must change. */ | 
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| 287 | if (drm_WARN_ON(display->drm, | 
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| 288 | !bpps_changed && | 
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| 289 | new_limits->force_fec_pipes == | 
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| 290 | old_limits->force_fec_pipes)) | 
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| 291 | return false; | 
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| 292 |  | 
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| 293 | return true; | 
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| 294 | } | 
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| 295 |  | 
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| 296 | /** | 
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| 297 | * intel_link_bw_atomic_check - check display link states and set a fallback config if needed | 
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| 298 | * @state: atomic state | 
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| 299 | * @new_limits: link BW limits | 
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| 300 | * | 
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| 301 | * Check the configuration of all shared display links in @state and set new BW | 
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| 302 | * limits in @new_limits if there is a BW limitation. | 
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| 303 | * | 
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| 304 | * Returns: | 
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| 305 | *   - 0 if the configuration is valid | 
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| 306 | *   - %-EAGAIN, if the configuration is invalid and @new_limits got updated | 
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| 307 | *     with fallback values with which the configuration of all CRTCs | 
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| 308 | *     in @state must be recomputed | 
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| 309 | *   - Other negative error, if the configuration is invalid without a | 
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| 310 | *     fallback possibility, or the check failed for another reason | 
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| 311 | */ | 
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| 312 | int intel_link_bw_atomic_check(struct intel_atomic_state *state, | 
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| 313 | struct intel_link_bw_limits *new_limits) | 
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| 314 | { | 
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| 315 | struct intel_display *display = to_intel_display(state); | 
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| 316 | struct intel_link_bw_limits old_limits = *new_limits; | 
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| 317 | int ret; | 
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| 318 |  | 
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| 319 | ret = check_all_link_config(state, limits: new_limits); | 
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| 320 | if (ret != -EAGAIN) | 
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| 321 | return ret; | 
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| 322 |  | 
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| 323 | if (!assert_link_limit_change_valid(display, old_limits: &old_limits, new_limits)) | 
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| 324 | return -EINVAL; | 
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| 325 |  | 
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| 326 | return -EAGAIN; | 
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| 327 | } | 
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| 328 |  | 
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| 329 | static int force_link_bpp_show(struct seq_file *m, void *data) | 
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| 330 | { | 
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| 331 | struct intel_connector *connector = m->private; | 
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| 332 |  | 
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| 333 | seq_printf(m, FXP_Q4_FMT "\n", FXP_Q4_ARGS(connector->link.force_bpp_x16)); | 
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| 334 |  | 
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| 335 | return 0; | 
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| 336 | } | 
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| 337 |  | 
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| 338 | static int str_to_fxp_q4_nonneg_int(const char *str, int *val_x16) | 
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| 339 | { | 
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| 340 | unsigned int val; | 
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| 341 | int err; | 
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| 342 |  | 
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| 343 | err = kstrtouint(s: str, base: 10, res: &val); | 
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| 344 | if (err) | 
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| 345 | return err; | 
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| 346 |  | 
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| 347 | if (val > INT_MAX >> 4) | 
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| 348 | return -ERANGE; | 
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| 349 |  | 
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| 350 | *val_x16 = fxp_q4_from_int(val_int: val); | 
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| 351 |  | 
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| 352 | return 0; | 
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| 353 | } | 
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| 354 |  | 
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| 355 | /* modifies str */ | 
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| 356 | static int str_to_fxp_q4_nonneg(char *str, int *val_x16) | 
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| 357 | { | 
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| 358 | const char *int_str; | 
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| 359 | char *frac_str; | 
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| 360 | int frac_digits; | 
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| 361 | int frac_val; | 
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| 362 | int err; | 
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| 363 |  | 
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| 364 | int_str = strim(str); | 
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| 365 | frac_str = strchr(int_str, '.'); | 
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| 366 |  | 
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| 367 | if (frac_str) | 
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| 368 | *frac_str++ = '\0'; | 
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| 369 |  | 
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| 370 | err = str_to_fxp_q4_nonneg_int(str: int_str, val_x16); | 
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| 371 | if (err) | 
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| 372 | return err; | 
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| 373 |  | 
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| 374 | if (!frac_str) | 
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| 375 | return 0; | 
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| 376 |  | 
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| 377 | /* prevent negative number/leading +- sign mark */ | 
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| 378 | if (!isdigit(c: *frac_str)) | 
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| 379 | return -EINVAL; | 
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| 380 |  | 
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| 381 | err = str_to_fxp_q4_nonneg_int(str: frac_str, val_x16: &frac_val); | 
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| 382 | if (err) | 
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| 383 | return err; | 
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| 384 |  | 
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| 385 | frac_digits = strlen(frac_str); | 
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| 386 | if (frac_digits > intlog10(INT_MAX) >> 24 || | 
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| 387 | frac_val > INT_MAX - int_pow(base: 10, exp: frac_digits) / 2) | 
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| 388 | return -ERANGE; | 
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| 389 |  | 
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| 390 | frac_val = DIV_ROUND_CLOSEST(frac_val, (int)int_pow(10, frac_digits)); | 
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| 391 |  | 
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| 392 | if (*val_x16 > INT_MAX - frac_val) | 
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| 393 | return -ERANGE; | 
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| 394 |  | 
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| 395 | *val_x16 += frac_val; | 
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| 396 |  | 
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| 397 | return 0; | 
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| 398 | } | 
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| 399 |  | 
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| 400 | static int user_str_to_fxp_q4_nonneg(const char __user *ubuf, size_t len, int *val_x16) | 
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| 401 | { | 
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| 402 | char *kbuf; | 
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| 403 | int err; | 
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| 404 |  | 
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| 405 | kbuf = memdup_user_nul(ubuf, len); | 
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| 406 | if (IS_ERR(ptr: kbuf)) | 
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| 407 | return PTR_ERR(ptr: kbuf); | 
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| 408 |  | 
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| 409 | err = str_to_fxp_q4_nonneg(str: kbuf, val_x16); | 
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| 410 |  | 
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| 411 | kfree(objp: kbuf); | 
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| 412 |  | 
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| 413 | return err; | 
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| 414 | } | 
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| 415 |  | 
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| 416 | static bool connector_supports_dsc(struct intel_connector *connector) | 
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| 417 | { | 
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| 418 | struct intel_display *display = to_intel_display(connector); | 
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| 419 |  | 
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| 420 | switch (connector->base.connector_type) { | 
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| 421 | case DRM_MODE_CONNECTOR_eDP: | 
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| 422 | return intel_dp_has_dsc(connector); | 
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| 423 | case DRM_MODE_CONNECTOR_DisplayPort: | 
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| 424 | if (connector->mst.dp) | 
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| 425 | return HAS_DSC_MST(display); | 
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| 426 |  | 
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| 427 | return HAS_DSC(display); | 
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| 428 | default: | 
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| 429 | return false; | 
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| 430 | } | 
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| 431 | } | 
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| 432 |  | 
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| 433 | static ssize_t | 
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| 434 | force_link_bpp_write(struct file *file, const char __user *ubuf, size_t len, loff_t *offp) | 
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| 435 | { | 
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| 436 | struct seq_file *m = file->private_data; | 
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| 437 | struct intel_connector *connector = m->private; | 
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| 438 | struct intel_display *display = to_intel_display(connector); | 
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| 439 | int min_bpp; | 
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| 440 | int bpp_x16; | 
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| 441 | int err; | 
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| 442 |  | 
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| 443 | err = user_str_to_fxp_q4_nonneg(ubuf, len, val_x16: &bpp_x16); | 
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| 444 | if (err) | 
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| 445 | return err; | 
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| 446 |  | 
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| 447 | /* TODO: Make the non-DSC min_bpp value connector specific. */ | 
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| 448 | if (connector_supports_dsc(connector)) | 
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| 449 | min_bpp = intel_dp_dsc_min_src_compressed_bpp(); | 
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| 450 | else | 
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| 451 | min_bpp = intel_display_min_pipe_bpp(); | 
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| 452 |  | 
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| 453 | if (bpp_x16 && | 
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| 454 | (bpp_x16 < fxp_q4_from_int(val_int: min_bpp) || | 
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| 455 | bpp_x16 > fxp_q4_from_int(val_int: intel_display_max_pipe_bpp(display)))) | 
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| 456 | return -EINVAL; | 
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| 457 |  | 
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| 458 | err = drm_modeset_lock_single_interruptible(lock: &display->drm->mode_config.connection_mutex); | 
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| 459 | if (err) | 
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| 460 | return err; | 
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| 461 |  | 
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| 462 | connector->link.force_bpp_x16 = bpp_x16; | 
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| 463 |  | 
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| 464 | drm_modeset_unlock(lock: &display->drm->mode_config.connection_mutex); | 
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| 465 |  | 
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| 466 | *offp += len; | 
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| 467 |  | 
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| 468 | return len; | 
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| 469 | } | 
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| 470 | DEFINE_SHOW_STORE_ATTRIBUTE(force_link_bpp); | 
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| 471 |  | 
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| 472 | void intel_link_bw_connector_debugfs_add(struct intel_connector *connector) | 
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| 473 | { | 
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| 474 | struct intel_display *display = to_intel_display(connector); | 
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| 475 | struct dentry *root = connector->base.debugfs_entry; | 
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| 476 |  | 
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| 477 | switch (connector->base.connector_type) { | 
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| 478 | case DRM_MODE_CONNECTOR_DisplayPort: | 
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| 479 | case DRM_MODE_CONNECTOR_eDP: | 
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| 480 | case DRM_MODE_CONNECTOR_HDMIA: | 
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| 481 | break; | 
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| 482 | case DRM_MODE_CONNECTOR_VGA: | 
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| 483 | case DRM_MODE_CONNECTOR_SVIDEO: | 
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| 484 | case DRM_MODE_CONNECTOR_LVDS: | 
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| 485 | case DRM_MODE_CONNECTOR_DVID: | 
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| 486 | if (HAS_FDI(display)) | 
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| 487 | break; | 
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| 488 |  | 
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| 489 | return; | 
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| 490 | default: | 
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| 491 | return; | 
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| 492 | } | 
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| 493 |  | 
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| 494 | debugfs_create_file( "intel_force_link_bpp", 0644, root, | 
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| 495 | connector, &force_link_bpp_fops); | 
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| 496 | } | 
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| 497 |  | 
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